FUJITSU SEMICONDUCTOR DATA SHEET DS04-27401-4E ASSP Power Supply Monitor with Watch-Dog Timer MB3773 ■ DESCRIPTION The Fujitsu MB3773 is designed to monitor the voltage level of a power supply (+5V or an arbitrary voltage) in a microprocessor circuit, memory board in a large-size computer, for example. The MB3773 also contains a watch-dog timer function to detect uncontrol. Table status of processor and reset system/processor. If the circuit’s power supply deviates more than a specified amount, then the MB3773 generates a reset signal to the microprocessor. Thus, the computer data is protected from accidental erasure. When the MB3773 does not receive the clock pulse from the processor in the specified period, the MB3773 generates a reset signal to the mciroprocessor. PLASTIC PACKAGE DIP-8P-M01 Using the MB3773 requires few external components. To monitor only a +5 volt supply, the MB3773 requires the connection of one external capacitor. The MB3773 is available in an 8-pin Dual In-Line package space saving Flat Package, or a Single In-Line Package. •Precision voltage detection (VS = 4.2V ±2.5%) •Threshold level with hysterisis •Low voltage output for reset signal (VCC = 0.8V typ.) PLASTIC PACKAGE FPT-8P-M01 •Precision reference voltage output (VREF = 1.245 V±1.5%) •External clock monitor and reset signal generator •Negative-edge input watch-dog timer •Minimal number of external components (one capacitor min.) •Available in a variety of packages • 8-pin Dual In-Line Package • 8-pin Flat Package PLASTIC PACKAGE SIP-8P-M03 • 8-pin Single In-Line Package This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. 1 MB3773 ■ PIN ASSIGNMENT CT 1 RESET 2 8 RESET 7 VS Front View Top View CK 3 6 VREF GND 4 5 VCC (DIP-8P-M01) (FPT-8P-M01) 8 RESET 7 VS 6 VREF 5 VCC 4 GND 3 CK 2 RESET 1 CT (SIP-8P-M03) ■ ABSOLUTE MAXIMUM RATINGS Parameter Supply voltage Symbol Rating Unit VCC -0.3 to +18 V VS -0.3 to VCC +0.3 (≤+18) V VS -0.3 to +18 V VOH -0.3 to VCC +0.3 (≤+18) V PD 200 mW TSTG -55 to +125 °C Input voltage RESET, RESET Supply voltage Power dissipation(Ta ≤ 85°C) Storage temperature NOTE: 2 Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. MB3773 ■ BLOCK DIAGRAM VCC 5 Reference AMP. ≅ 1.24V Reference Voltage Generator ≅ 100 kΩ ≅1.2µA COMP.S ≅ 1.24V + _ _ R _ COMP.O + + + 6 V REF 4 GND ≅10µA ≅10µA Q _ VS 7 S ≅ 40kΩ Inhibit CK Watch Dog Timer 3 P.G 1 CT ■ 8 2 RESET RESET RECOMMENDED OPERATING CONDITIONS Parameter Symbol Value Unit Supply voltage VCC +3.5 to +16 V Reset, reset sink current IOL 0 to 20 mA VREF output current IOUT -200 to +5 µA Watch clock setting time tWD 0.1 to 1000 ms tFC, tRC <100 µs Terminal capacitance CT 0.001 to 10 µF Operating ambient temperature Ta -40 to +85 °C Rising/falling time 3 MB3773 ■ ELECTORICAL CHARACTERISTICS (1) DC Characteristics (VCC=5V, Ta=25°C) Value Parameter Supply current Condition Watch dog timer operating Symbol ICC VCC Min Typ Max - 600 900 4.10 4.20 4.30 4.05 4.20 4.35 Unit µA VSL Ta = -40°C to +85°C V Detection voltage 4.20 4.30 4.40 4.15 4.30 4.45 VHYS 50 100 150 VREF 1.227 1.245 1.263 1.215 1.245 1.275 VCC VSH Ta = -40°C to +85°C Hysterisis width VCC - Reference voltage Ta = -40°C to +85°C V Reference voltage change rate VCC = 3.5 to 16V ∆VREF1 - 3 10 mV Reference voltage output loading change rate IOUT = -200µA to+5µA ∆VREF2 -5 - +5 mV CK threshold voltage Ta = -40°C to +85°C VTH 0.8 1.25 2.0 V VCK = 5.0V IIH - 0 1.0 VCK = 0.0V IIL -1.0 -0.1 - Watch dog timer operating VCT = 1.0V ICTD 7 10 14 VS open, IRESET = -5µA VOH1 4.5 4.9 - VS = 0V, IRESET = -5µA VOH2 4.5 4.9 - VS = 0V, IRESET = 3mA VOL1 - 0.2 0.4 VS = 0V, IRESET = 10mA VOL2 - 0.3 0.5 VS open, IRESET = 3mA VOL3 - 0.2 0.4 VS open, IRESET = 10mA VOL4 - 0.3 0.5 VS = 0V, VRESET = 1.0V IOL1 20 60 - VS open, VRESET = 1.0V IOL2 20 60 - CK input current CK input current Output saturation voltage µA µA V High level output voltage V Output sink current 4 mV mA MB3773 (1) DC Characteristics (Continued) (VCC=5V, Ta=25°C) Parameter Condition Symbol Value Unit Min Typ Max ICTU 0.5 1.2 2.5 µA CT charge current Power on reset operating VCT = 1.0V Min. supply voltage for RESET VRESET = 0.4V IRESET = 0.2mA VCCL1 - 0.8 1.2 V Min. supply voltage for RESET VRESET =VCC -0.1V RL (2 pin - GND) = 1MΩ VCCL2 - 0.8 1.2 V (2)AC Characteristics (VCC=5V, Ta=25°C) Parameter Condition VCC input pulse width 5V VCC 4V CK input pulse width CK or CK input frequency Symbol Value Unit Min Typ Max TPI 8.0 - - µs TCKW 3.0 - - µs TCK 20 - - µs Watch dog timer watching time CT = 0.1µF TWD 5 10 15 ms Watch dog timer reset time CT = 0.1µF TWR 1 2 3 ms Rising reset hold time CT = 0.1µF, VCC TPR 50 100 150 ms RESET, RL = 2.2kΩ CL = 100pF TPD1 - 2 10 RESET, RL = 2.2kΩ CL = 100pF TPD2 - 3 10 Output propagation Delay time from VCC µs Output rising time * RL = 2.2kΩ CL = 100pF tR - 1.0 1.5 Output falling time * RL = 2.2kΩ CL = 100pF tF - 0.1 0.5 µs * Output rising/falling time are measured at 10% to 90% of voltage. 5 MB3773 Fig. 1 - MB3773 Basic Operation VCC VCC CT Logic Circuit RESET RESET RESET RESET TPR (ms) TWD (ms) TWR (ms) CK CK GND VCC VSH VSL 0.8V CK TCK CT TPR TWD TPR RESET TWR 6 1000 · CT 100 · C T 20 · CT (µF) (µF) (µF) CT = 0.1µF (100ms) (10ms) (2ms) MB3773 ■ TYPICAL CHARACTERISTIC CURVES Fig. 2 - Supply current vs. supply voltage Fig. 3 - Output voltag vs. supply voltage (RESET pin) 6.0 Pull up 2.2kΩ (V) Ta = 85°C Ta = 25°C 0.65 Ta = -40°C 0.55 C T = 0.1µF Ta = -40°C 0.45 Ta = 25°C 0.35 Ta = 85°C 0.25 0.15 0 2.0 4.0 Output voltage V RESET Supply current I cc (mA) 0.75 5.0 Ta = -40°C, 25°C, 85°C 4.0 3.0 2.0 1.0 0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 20.0 Supply voltage VCC (V) 1.0 2.0 3.0 4.0 5.0 Supply voltage VCC (V) (RESET pin) Detection voltage VSH , V SL (V) Output voltage V RESET (V) (RESET, RESET pin) 4.50 Pull up 2.2kΩ 5.0 4.0 3.0 Ta = 85°C 2.0 Ta = 25°C 1.0 Ta = -40°C 0 1.0 2.0 3.0 4.0 5.0 Supply voltage VCC (V) 6.0 4.44 VSH 4.30 VSL 4.20 4.10 4.00 -40 7.0 300 Ta = 25°C Ta = 85°C 200 100 0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 Output sink current IOL2 (mA) 80 100 (RESET pin) Output saturation Voltage VOL8 (mV) Output saturation voltage V OL2 (mV) 400 0 20 40 60 Temperature Ta (°C) 500 (RESET pin) CT = 0.1µF -20 Fig. 7 - Output saturation voltage vs. output sink current Fig. 6 - Output saturation voltage vs. output sink current Ta = -40°C 7.0 Fig. 5 - Detection voltage (VSH, VSL) vs. temperature Fig. 4 - Output voltag vs. supply voltage 6.0 6.0 CT = 0.1µF Ta = -40°C 400 Ta = 25°C 300 Ta = 85°C 200 100 0 2.0 4.0 6.0 8.0 10.0 12.0 14.0 16.0 18.0 Output sink current IOL8 (mA) 7 MB3773 ■ TYPICAL CHARACTERISTIC CURVES (Continued) Fig. 9 - High level output voltage vs. high level output current (RESET pin) 5.0 High level output voltage V OH8 (V) High level output voltage V OH2 (V) Fig. 8 - High level output voltage vs. high level output current CT = 0.1µF Ta = 25°C 4.5 Ta = -40°C Ta= 85°C 4.0 -5 -10 High level output current IOH2 (µA) 0 (RESET pin) 5.0 CT = 0.1µF Ta = 25 Ta = 85 4.5 Ta = -40°C 4.0 -15 0 Fig. 10 - Reference voltage vs. supply voltage Ta = 25°C Ta = -40°C 1.240 1.238 CT = 0.1µF 1.236 1.234 0 3.0 5.0 CT = 0.1µF (V) Ta = 85°C 1.255 REF 1.244 1.242 -15 Fig. 11 - Reference voltage vs. reference current Reference voltage V Reference voltage V REF (V) 1.246 -5 -10 High level output current IOH8 (µA) 1.250 Ta= 25°C 1.245 Ta= 85°C Ta = -40°C 1.240 0 7.0 9.0 11.0 13.0 15.0 17.0 19.0 21.0 Supply voltage VCC (V) Fig. 12 - Reference voltage vs. temperature -40 -80 -120 -160 -200 Reference current IREF (µA) -240 Fig. 13 - Rising reset hold time vs. temperature 1.27 160 1.25 1.24 1.23 1.22 1.21 0 8 Rising reset hold time T PR (msec) Reference voltage V REF (V) 1.26 VCC = 5V CT = 0.1µF 140 120 100 80 60 40 0 -40 -20 0 20 40 60 Temperature Ta(°C) 80 100 -40 -20 0 20 40 60 Temperature Ta(°C) 80 100 MB3773 TYPICAL CHARACTERISTIC CURVES (Continued) Fig. 14 - Reset time vs. temperature Fig. 15 - Watch dog timer watching time vs. temperature (At watch dog timer) 16 Watch dog timer watching time T WD (msec) Rwset time TWR (msec) 3 VCC = 5V CT = 0.1µF 2 1 12 10 8 6 4 0 -40 -20 0 20 40 60 Temperature Ta (°C) Fig. 16 - Terminal capacitance vs. rising reset hold time Fig. 17 - Terminal capacitance vs. reset time 106 2 10 Ta = -40°C 101 Ta = 25°C 85°C 10-1 (ms) 105 101 Ta= 25°C, 85°C 100 -1 10 Watch dog timer watching time T WD 103 Reset time T WR (ms) 104 Ta = -40°C 10-2 10-2 10-3 Fig. 18 - Terminal capacitance vs. watch dog timer watching time (at watch dog timer) 105 100 -40 -20 0 20 40 60 80 100 Temperature Ta (°C) 80 100 106 102 VCC = 5V CT = 0.1µF 14 0 Rising reset hold time T PR (ms) ■ 10-3 10-2 10-1 100 101 102 104 103 Ta = -40°C 102 101 100 Ta = 25°C, 85°C 10-1 10-2 10-3 10-3 1 10 10 10 10 10 10 -3 -2 -1 0 10-3 10-2 10-1 100 101 102 2 Terminal capacitance CT (µF) Terminal capacitance CT (µF) Terminal capacitance CT (µF) 9 MB3773 ■ APPLICATION CIRCUIT EXAMPLE 1 : Monitoring 5V Supply Voltage and Watch-dog Timer VCC (5V) MB3773 CT Logic circuit 1 8 RESET 2 7 RESET 3 6 CK 4 5 GND • Supply voltage is monitored using Vs. Detection voltage are VSH and VSL. EXAMPLE 2 : 5V Supply Voltage Monitoring (external fine-tuning type) VCC (5V) MB3773 CT R1 Logic circuit 1 8 RESET 2 7 RESET 3 6 4 5 CK R2 GND • Vs detection voltage can be adjusted externally. • Selecting R1 and R2 values that are sufficiently lower than the resistance of the IC’s internal voltage divider allows the detection voltage to be set according to the resistance ratio between R1 and R2. (See the table below.) 10 R1 (kΩ) R2 (kΩ) Detection voltage:VSL (V) Detection voltage:VSH (V) 10 3.9 4.4 4.5 9.1 3.9 4.1 4.2 MB3773 EXAMPLE 3 : With Forced Reset (with reset hold) a VCC MB3773 CT Logic circuit 1 8 RESET 2 7 RESET 3 6 4 CK SW 5 GND • Grouding pin 7 at the time of SW ON sets RESET (pin 8) to Low and RESET (pin 2) to High. b VCC MB3773 Cr Logic circuit 1 8 2 7 3 6 4 5 RESET Tr RESET 10k CK GND 10k RESIN • Feeding the signal to pin RESIN and turning on Tr sets the RESET pin to Low and the RESET pin to High. 11 MB3773 EXAMPLE 4 : Montitoring Two Supply Voltages (with hysterisis, reset output and NMI) VCC2(12V) VCC1 (5V) Logic circuit MB3773 CT 1 8 RESET 2 7 RESET 3 6 4 CK 100k R3 5 NMI or port 180k 10k R6 R4 GND + _ + _ Comp. 1 1.2k R1 Comp. 2 5.1k R2 Example 4.7k R5 : Comp. 1, Comp. 2 : MB4204, MB47393 NOTE: The 5V supply voltage is monitored by the MB3773. The 12V supply viltage is monitored by the external circuit. Its output is connected to the NMI pin and, when voltage drops, Comp. 2 interrrupts the logic circuit. • Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. • The detection voltage of the VCC2 (=12V) supply voltage is approximately 0.2V. VCC2 detection voltage and hysterisis width can be found using the following formulas: →Detection voltage V2H = V2L = →Hysterisis width 12 R3 + (R4 // R5) × VREF R 4 // R5 (Approx. 9.4V in the above illustration) R3 + R5 × VREF R5 VHYS = V2H - V2L (Approx. 9.2V in the above illustration) MB3773 EXAMPLE 5 : Montitoring Two (M) Supply Voltages (with hysterisis and reset output) VCC2 (12V) VCC1 (5V) 20k R6 MB3773 CT 1 8 2 7 3 6 4 5 Logic circuit RESET RESET 30k R3 Diode CK GND 180k R4 + _ + _ Comp. 1 1.2k R1 5.1k R2 Example Comp. 2 4.7k R5 : Comp. 1, Comp. 2 : MB4204, MB47393 NOTE: When either 5V or 12V supply voltage decreases below its detection voltage (VSL), the MB3773 RESET pin is set to High and the MB3773 RESET pin is set to Low. • Use VCC1 (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. • The detection voltage of the VCC2 (=12V) supply voltage is approximately 9.2V/9.4V and has a hysterisis width of approximately 0.2V. For the formulas for finding hysterisis width and detection voltage, see section 4. 13 MB3773 EXAMPLE 6 : Montitoring Low voltage and Overvoltage Monitoring (with hysterisis) VCC (5V) 20k R6 MB3773 CT 1 8 2 7 3 6 4 5 Logic circuit RESET RESET Diode 30k R3 CK GND 180k R4 _ _ + 5.6k R2 + Comp. 1 1.2k R1 Comp. 2 4.7k R5 Example : Comp. 1, Comp. 2 : MB4204, MB47393 RESET 0 VCC V1L V1H V2L V2H • Comp. 1 and Comp. 2 are used to monitor for overvoltage while the MB3773 is used to monitor for low voltage. Detection voltages V1/V1H at the time of low voltage areappoximately 4.2V/4.3V. Detection voltages V2L/V2H at the time of overvoltage are approximately 6.0V/6.1V. For the formulas for finding hysterisis width and detection voltage, see section 4. • Use VCC (=5V) to power the comparators (Comp. 1 and Comp. 2) in the external circuit shown above. 14 MB3773 EXAMPLE 7 : Monitoring Supply Voltage Using Delayed Trigger VCC VCC 5V 4V MB3773 CT Logic circuit 1 8 RESET 2 7 RESET 3 6 4 5 CK C1 GND • Adding voltage such as shown in the figure to VCC increases the minimum input pulse width by 50 microseconds (C1 = 1000pF). 15 MB3773 EXAMPLE 8 : Stopping Watch-dog Timer (Monitering only supply voltage) These are example application circuts in which the MB3773 monitors supply voltage alone without resetting the microcomputer even if the latter, used in standby mode, stops sending the clock pulse to the MB3773. •The watch-dog timer is inhibited by clamping the Cr pin voltage to VREF . The supply voltage is constantly monitored even while the watch-dog timer is inhibited. For this reason, a reset signal is output at the occurrence of either instataneous disruption or a sudden drop to low voltage. Note that in application examples a and b, the hold signal is inactive when the watch-dog timer is inhibited at the time of resetting. If the hold signal is active when tie microcomputer is reset, the solution is to add a gate, as in examples c and d. a Using NPN transistor VCC(5V) MB3773 Logic circuit 1 8 RESET 2 7 RESET 3 6 CK 4 5 HALT GND R2=1k R1=1M CT b Using PNP transistor VCC (5V) MB3773 Logic circuit 1 8 RESET 2 7 RESET 3 6 CK 4 5 HALT GND R2=1k R1=51k CT (Continued) 16 MB3773 (Continued) c Using NPN transistor VCC (5V) MB3773 Logic circuit 1 8 2 7 3 6 4 5 RESET RESET R1=1M CK HALT GND R2=1k CT d Using PNP transistor VCC (5V) MB3773 Logic circuit 1 8 2 7 3 6 4 5 RESET RESET R 1=51k CK HALT GND R2=1k CT 17 MB3773 EXAMPLE 9 : Reducing Reset Hold Time VCC(=5V) VCC (=5V) MB3773 CT MB3773 Logic circuit 1 8 RESET 2 7 RESET 3 6 CK 4 5 CT GND (a) TPR reduction method Logic circuit 1 8 RESET 2 7 RESET 3 6 CK 4 5 GND (b) Standard usage • RESET is the only output that can be used. • Standard TPR, TWD and TWR value can be found using the following formulas. Formulas : TPR (ms) 100 × CT (µF) TWD (ms) 100 × CT (µF) TWR (ms) 16 × CT (µF) • The above formulas allow fo standard values in determining TPR, TWD and TWR. Reset hold time is compared below between the reduction circuit and the standard circuit. CT = 0.1µF 18 TPR reduction circuit Standard circuit TPR 10ms 100ms TWD 10ms 10ms TWR 1.6ms 2.0ms MB3773 EXAMPLE 10 : Circuit for Monitoring Multiple Microcomputers FF1 FF2 S FF3 S Q1 D1 VCC (=5V) S Q2 D2 Q3 D3 CK1 Q1 CK2 Q2 CK3 Q3 R R R R2 R1 RESET RESET RESET RESET RESET RESET CK CK CK GND GND GND CT 1 8 2 7 3 6 4 5 MB3773 • Figure 1 connects from FF1 and FF2 outputs Q1 and Q2 to the NOR input. Depending on timing, these connections may not be necessary. Example:R 1 = R2 = 2.2kΩ CT = 0.1µF CK1 Q1 CK2 Q2 CK3 Q3 NOR Output Figure 2 19 MB3773 Description of Application Circuits Using one MB3773, this application circuit monitors multiple microcomputers in one system. Signals from each microcomputer are sent to FF1, FF2 and FF3 clock inputs. Figure 2 shows these timings. Each flip-flop operates using signals sent from microcomputers as its clock pulse. When even one signal stops, the relevant receiving flip-flop stops operating. As a result, cyclical pulses are not generated at output Q3. Since the clock pulse stops arriving at the CK pin of the MB3773, the MB3773 generates a reset signal. Note that output Q3 frequncy f will be in the following range, where the clock frequencies of CK1, CK2 and CK3 are f1, f2 and f3 respectively. 1 1 1 1 1 ---- ≤ --- ≤ ---- + ---- + ---f0 f f1 f2 f3 where f0 is the lowest frequency among f1, f2 and f3. 20 MB3773 EXAMPLE 11 : Circuit for Limiting Upper Clock Input Frequency VCC (5V) R2 CT 1 8 RESET 2 7 RESET 3 6 4 5 R1=10kΩ CK Tr1 GND C2 • This is an example application to limit upper frequency fH of clock pulses sent from the microcomputer. If the CK cycle sent from the microcomputer exceeds fH, the circuit generates a reset signal. (The lower freqency has already been set using Cr.) • When a clock pulse such as shown below is sent to pin CK, a short T2 prevents C2 voltage from reaching the CK input threshold level ( ≅1.25V), and will cause a reset signal to be output. The T1 value can be found using the following formula : T1 ≅ 0.3 C2R2 T2 where VCC = 5V, T3 ≥ 3.0µsec, T2 ≥ 20µsec CK waveform T3 C 2 voltage T1 Example : Setting C and R allow the upper T1 value to be set (See the table below.) C R T1 0.01µF 10kΩ 30µs 0.1µF 10kΩ 300µs 21 MB3773 ■ PACKAGE DIMENSIONS 8 pin, Plastic DIP (DIP-8P-M01) +0.40 9.40 –0.30 +.016 .370 –.012 6.20±0.25 (.244±.010) 1 PIN INDEX 0.51(.020)MIN 4.36(.172)MAX 0.25±0.05 (.010±.002) 3.00(.118)MIN +0.30 0.99 –0 +.012 .039 –0 +0.35 0.89 –0.30 +.014 .035 –.012 0.46±0.08 (.018±.003) +0.30 1.52 –0 +.012 .060 –0 2.54(.100) TYP 7.62(.300) TYP 15°MAX Dimensions in mm (inches). C 22 1994 FUJITSU LIMITED D08006S-2C-3 MB3773 ■ PACKAGE DIMENSIONS (Continued) 8 pin, Plastic SOP (FPT-8P-M01) 2.25(.089)MAX +0.25 +.010 6.35 –0.20 .250 –.008 0.05(.002)MIN (STAND OFF) 5.30±0.30 (.209±.012) INDEX 1.27(.050) TYP 0.45±0.10 (.018±.004) 3.81(.150)REF +0.40 6.80 –0.20 +.016 .268 –.008 7.80±0.40 (.307±.016) +0.05 Ø0.13(.005) M 0.15 –0.02 +.002 .006 –.001 0.50±0.20 (.020±.008) Details of "A" part 0.20(.008) 0.50(.020) "A" 0.18(.007)MAX 0.10(.004) 0.68(.027)MAX Dimensions in mm (inches). C 1994 FUJITSU LIMITED F08002S-4C-4 23 MB3773 ■ PACKAGE DIMENSIONS (Continued) 8 pin, Plastic SIP (SIP-8P-M03) 3.26±0.25 (.128±.010) +0.15 19.65 –0.35 +.006 .774 –.014 INDEX-1 6.20±0.25 (.244±.010) 8.20±0.30 (.323±.012) INDEX-2 +0.30 0.99 –0 4.00±0.30 (.157±.012) +.012 .039 –0 2.54(.100) TYP +0.30 1.52 –0 +.012 .060 –0 0.50±0.08 (.020±.003) 0.25±0.05 (.010±.002) Dimensions in mm (inches). C 24 1994 FUJITSU LIMITED S08010S-3C-2 MB3773 FUJITSU LIMITED For further information please contact: Japan FUJITSU LIMITED Corporate Global Business Support Division Electronic Devices KAWASAKI PLANT, 4-1-1, Kamikodanaka Nakahara-ku, Kawasaki-shi Kanagawa 211-8588, Japan Tel: (044) 754-3763 Fax: (044) 754-3329 http://www.fujitsu.co.jp/ North and South America FUJITSU MICROELECTRONICS, INC. Semiconductor Division 3545 North First Street San Jose, CA 95134-1804, USA Tel: (408) 922-9000 Fax: (408) 922-9179 Customer Response Center Mon. - Fri.: 7 am - 5 pm (PST) Tel: (800) 866-8608 Fax: (408) 922-9179 http://www.fujitsumicro.com/ Europe FUJITSU MIKROELEKTRONIK GmbH Am Siebenstein 6-10 D-63303 Dreieich-Buchschlag Germany Tel: (06103) 690-0 Fax: (06103) 690-122 http://www.fujitsu-ede.com/ Asia Pacific FUJITSU MICROELECTRONICS ASIA PTE LTD #05-08, 151 Lorong Chuan New Tech Park Singapore 556741 Tel: (65) 281-0770 Fax: (65) 281-0220 All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information and circuit diagrams in this document presented as examples of semiconductor device applications, and are not intended to be incorporated in devices for actual use. Also, FUJITSU is unable to assume responsibility for infringement of any patent rights or other rights of third parties arising from the use of this information or circuit diagrams. FUJITSU semiconductor devices are intended for use in standard applications (computers, office automation and other office equipment, industrial, communications, and measurement equipment, personal or household devices, etc.). CAUTION: Customers considering the use of our products in special applications where failure or abnormal operation may directly affect human lives or cause physical injury or property damage, or where extremely high levels of reliability are demanded (such as aerospace systems, atomic energy controls, sea floor repeaters, vehicle operating controls, medical devices for life support, etc.) are requested to consult with FUJITSU sales representatives before such use. The company will not be responsible for damages arising from such use without prior approval. Any semiconductor devices have inherently a certain rate of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Control Law of Japan, the prior authorization by Japanese government should be required for export of those products from Japan. http://www.fmap.com.sg/ F9803 FUJITSU LIMITED Printed in Japan 25