FUJITSU MB3891

FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27801-1E
ASSP For Power Management Applications (Mobile Phones)
Power Management IC
for GSM Mobile Phone
MB3891
■ DESCRIPTION
MB3891 is intended to be used in future GSM-phones, Dual Band phones and Dual Mode phones. It contains all
the necessary functions to support all Digital, Analog and RF blocks in these phones. A Charge-pump including
a Logic Level Translation circuit is built in to support SIM-card (SmartCard) of both 3 and 5 Volt technology. The
circuit contains a charger for a rechargeable Lithium coin cell of a Real Time Clock.
A complex control circuit is built in to generate main reset and to turn on and off the different LDO’s.
■ FEATURES
• Supply voltage range
: 3 V to 5.5 V
• Low power consumption current during standby
: 400 µA (MAX)
• 6-channel low-saturation voltage type series regulator
: 2.1 V/2 channels, 2.8 V/3 channels, 2.5 V/2.8 V switch
• Error prevention function during Low voltage
• Power on reset function
• 3 V/5 V SW for SIM-Card
• SIM interface function
• Backflow prevention function for Battery-Backup
• Temperature prevention function
■ PACKAGE
64-pin plastic LQFP
(FPT-64P-M03)
MB3891
■ PIN ASSIGNMENT
33 : RESET-IN
34 : CLK-IN
35 : µP-IO
36 : RST
37 : CLK
38 : SIM-IO
39 : GND4
40 : OUT4
41 : OUT4
42 : VBAT4
43 : VBAT4
44 : CONT4
45 : SW1-OUTPUT
46 : SW1-INPUT
47 : SW3-OUTPUT
48 : SW3-INPUT
(TOP VIEW)
N.C. : 49
32 : GND-VSIM
N.C. : 50
31 : VCAP−
SW2-OUTPUT : 51
30 : VCAP+
SW2-INPUT : 52
29 : VSIMOUT
SW1-ON : 53
28 : OSC
SW2-ON : 54
27 : SIMPROG
SW3-ON : 55
26 : VSIM-ON
CONT3 : 56
25 : VCC-VSIM
CONT5 : 57
24 : REF-OUT
OUT5 : 58
23 : VFIL
GND5 : 59
22 : VREF
VBAT3 : 60
21 : V-BACKUP
VBAT3 : 61
20 : VBAT2
VBAT3 : 62
19 : GND1
(FPT-64P-M03)
2
CONT2 : 16
CONT6 : 15
CONT1 : 14
OUT1 : 13
OUT1 : 12
VBAT1 : 11
VBAT1 : 10
VBAT1 : 9
VBAT1 : 8
OUT2 : 7
OUT2 : 6
GND3 : 5
OUT3 : 4
17 : XPOWERGOOD
OUT3 : 3
N.C. : 64
N.C. : 2
18 : DELAYCAP
N.C. : 1
N.C. : 63
MB3891
■ PIN DESCRIPTION
Pin No.
Symbol
I/O
Descriptions
1, 2
N.C.

Non connection.
3, 4
OUT3
O
LDO3 output pin.
5
GND3

LDO3 ground pin.
6, 7
OUT2
O
LDO2 output pin.
8, 9, 10, 11
VBAT1

Battery voltage input pin for LDO1 and LDO2.
12, 13
OUT1
O
LDO1 output pin.
14
CONT1
I
Power on input from keypad (Active low, Pulled up to VBAT2).
15
CONT6
I
“CONT6” input from digital system µP (Active high).
16
CONT2
I
External accessory supply voltage Enable (Active high).
17
XPOWERGOOD
O
Generates the main reset. (Active low, when OUT1 is out of regulation).
18
DELAYCAP

Timing capacitor for XPOWERGOOD delay.
19
GND1

LDO1, LDO2, V-BACKUP, Reference and System ground pin.
20
VBAT2

Battery voltage input pin for both UVLO’s, Reference and V-BACKUP
LDO.
21
V-BACKUP
O
Supply voltage for Charger for rechargeable Lithium coin cell.
22
VREF
O
Supply voltage for Reference.
23
VFIL
O
Reference voltage Filter.
24
REF-OUT
O
Reference output voltage (Present when BACKUP UVLO is high).
25
VCC-VSIM

Input voltage for charge pump. (Supplied by VBAT1).
26
VSIM-ON
I
VSIM supply Enable (Active high).
27
SIMPROG
I
VSIM programming: Low = 3 V SIM, High = 5 V SIM.
28
OSC

Oscillator output pin.
29
VSIMOUT
O
Supply voltage for 3 or 5 V SIM-Card (SmartCard).
30
VCAP+

Positive side of boost capacitor.
31
VCAP−

Negative side of boost capacitor.
32
GND-VSIM

3 or 5 V SIM-Card (SmartCard) ground pin.
33
RESET-IN
I
Non level shifted SIM reset (µP side).
34
CLK-IN
I
Non level shifted clock (µP side).
35
µP-IO
I/O
Non level shifted bi-directional data input/output (µP side).
36
RST
O
Level shifted SIM reset (SmartCard side).
37
CLK
O
Level shifted SIM clock (SmartCard side).
38
SIM-IO
I/O
Level shifted bi-directional SIM data input/output (SmartCard side).
39
GND4

LDO4 ground pin.
40, 41
OUT4
O
LDO4 output pin.
(Continued)
3
MB3891
4
(Continued)
Pin No.
Symbol
I/O
42, 43
VBAT4

44
CONT4
I
OUT4 output voltage selection (“L”=2.8 V,“H”=2.5 V).
45
SW1-OUTPUT
O
Output of general purpose switch number 1 (Drain).
46
SW1-INPUT
I
Input of general purpose switch number 1 (Source).
47
SW3-OUTPUT
O
Output of general purpose switch number 3 (Drain).
48
SW3-INPUT
I
Input of general purpose switch number 3 (Source).
49, 50
N.C.

Non connection.
51
SW2-OUTPUT
O
Output of general purpose switch number 2 (Drain).
52
SW2-INPUT
I
Input of general purpose switch number 2 (Source).
53
SW1-ON
I
General purpose switch number 1 Enable (Active high).
54
SW2-ON
I
General purpose switch number 2 Enable (Active high).
55
SW3-ON
I
General purpose switch number 3 Enable (Active high).
56
CONT3
I
OUT3 and OUT4 supply voltage Enable (Active high).
57
CONT5
I
OUT5 supply voltage Enable (Active high).
58
OUT5
O
Output terminal of LDO5.
59
GND5

LDO5 ground pin.
60, 61, 62
VBAT3

Supply voltage for LDO and LDO5.
63, 64
N.C.

Non connection.
Descriptions
Supply voltage for LDO4.
MB3891
■ BLOCK DIAGRAM
VBAT2
20
VBAT1
8 9 10 11
LDO1
Over
Temp
Protection
CONT1 14
ON
12
OUT1
13
OUT
POR
Main
UVLO
17 XPOWERGOOD
18 DELAYCAP
19 GND1
CONT6 15
LDO2
ON
OUT
6
OUT2
7
CONT2 16
46 SW1-INPUT
SW1
SW1-ON 53
45 SW1-OUTPUT
SW2-ON 54
52 SW2-INPUT
SW2
SW3-ON 55
51 SW2-OUTPUT
48 SW3-INPUT
SW3
47 SW3-OUTPUT
CONT3 56
60
61 VBAT3
62
CONT5 57
LDO3
CONT4 44
ON
OUT
VREF 22
VFIL 23
5 GND3
VREF
+
VREF-AMP
42
VBAT4
43
LDO4
−
OUT
ON
CONT4
REF-OUT 24
RESET-IN 33
RST 36
40
OUT4
41
39 GND4
LDO5
CLK-IN 34
µP-IO 35
3
OUT3
4
GSM/SIM
Logic
Level
Translation
ON
OUT
58 OUT5
59 GND5
CLK 37
LDO6
SIM-IO 38
BACKUP
UVLO
VCC-VSIM 25
ON OUT
21 V-BACKUP
VSIM-ON 26
VSIMOUT
Charge-pump
SIMPROG 27
30 VCAP+
31 VCAP−
OSC 28
32
29
GND-VSIM
VSIMOUT
N.C.
Pin : 1, 2, 49, 50, 63, 64
5
MB3891
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Power supply voltage
Symbol
Conditions
VBAT
VCC-VSIM
Rating
Unit
Min.
Max.

−0.3
7
V

−0.3
7
V
IO
OUT1 pin

120
mA
IO
OUT2 pin

50
mA
IO
OUT3 pin

100
mA
IO
OUT4 pin

100
mA
IO
OUT5 pin

50
mA
VSIMOUT chargepump
IO
VSIMOUT pin

10
mA
Power dissipation
PD
Ta ≤ +25 °C

800*
mW
−55
+125
°C
LDO regulator
Storage temperature

Tstg
* : The packages are mounted on the dual-sided epoxy board(10 cm × 10 cm)
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Conditions
VBAT
Value
Unit
Min.
Typ.
Max.

3.0
3.6
5.5
V
VCC-VSIM

3.0
3.6
5.5
V
LDO capacitor guarantee value
CO
OUT1 to OUT5, V-BACKUP pin
0.8
1.0

µF
REF-OUT capacitor guarantee
value
CO
REF-OUT pin

0.027

µF
VSIMOUT capacitor guarantee
value
CO
VSIMOUT pin

10

µF
Operating ambient temperature
Ta
−20
+25
+85
°C
Power supply voltage

WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
6
MB3891
■ ELECTRICAL CHARACTERISTICS
Parameter
Symbol
Pin No.
(Ta = +25 °C, VBAT1 to VBAT4 = VCC-VSIM = 3.6 V)
Value
Conditions
Unit
Min.
Typ.
Max.
IBAT1
8, 9, 10, 11,
UVLO = “L”,
20, 42, 43,
BACKUP UVLO = “L”
60, 61, 62


80
µA
IBAT2
8, 9, 10, 11,
UVLO = “L”,
20, 42, 43,
BACKUP UVLO = “H”
60, 61, 62


160
µA
Standby supply
current
IBAT3
8, 9, 10, 11,
All circuit’s = On
20, 42, 43,
(No load)
60, 61, 62


400
µA
Operating ground
current
IGND


10
mA
Shutdown supply
current
4, 5, 19,
32, 59
All circuit’s -VSIM =
On Max. load on all
regulators
VTHH
8, 9, 10, 11,
20, 42, 43, OUT1 = ON
60, 61, 62
2.980
3.080
3.180
V
VTHL
8, 9, 10, 11,
20, 42, 43, OUT1 = OFF
60, 61, 62
2.780
2.880
2.980
V
VTHH
8, 9, 10, 11,
20, 42, 43, V-BACKUP = ON
60, 61, 62
2.980
3.080
3.180
V
VTHL
8, 9, 10, 11,
20, 42, 43, V-BACKUP = OFF
60, 61, 62
2.580
2.680
2.780
V
UVLO threshold
voltage
General BACKUP UVLO
threshold voltage
VIH
16, 56, 57

0.7 ×
OUT1

OUT1
V
VIL
16, 56, 57

0

0.3 ×
OUT1
V
VIH
14, 15, 44

0.7 ×
VBAT

VBAT
V
VIL
14, 15, 44

0

0.3 ×
VBAT
V
VIH
26, 27


VCC-VSIM
V
VIL
26, 27

0

RPU
17


15*

kΩ
RPU
14, 57


200*

kΩ
RPD
15, 53, 54, 55


200*

kΩ
Input voltage
Pull-up resistor
Pull-down resistor
0.7 ×
VCC-VSIM
0.3 ×
VCC-VSIM
V
* : Standard design value
(Continued)
7
MB3891
Parameter
LDO1
(OUT1)
12, 13 −50 µA > OUT1 > −120 mA 2.000 2.100 2.200
VO
Line regulation
Line
12, 13 3.1 V < VBAT1 < 5.5 V


10
mV
Load reguration
Load
12, 13 −50 µA > OUT1 > −120 mA


30
mV
Ripple rejection
∆VBAT1/∆OUT1
R.R
12, 13 f = 217 Hz
45


dB
Dropout voltage
VDO
12, 13 OUT1 = −120 mA


500
mV
GND current at low load
IGND
19
OUT1 > −1 mA


30
µA
GND current at max. load
IGND
19
OUT1 = −120 mA


2
mA
Output noise volt. (RMS)
VNOVL
12, 13
f = 10 Hz to 1 MHz,
OUT1 = 1 µF


500
µV
VOH
17

0.8 ×
OUT1

OUT1
V
VOL
17

0

0.1 ×
OUT1
V
TXPG
17
DELAYCAP = 0.033 µF
10
25
40
ms
Output voltage
VO
6, 7
−50 µA > OUT2 > −50 mA 2.700 2.800 2.900
Line regulation
Line
6, 7
3.1 V < VBAT1 < 5.5 V


10
mV
Load regulation
Load
6, 7
−50 µA > OUT2 > −50 mA


30
mV
Ripple rejection
∆VBAT1/∆OUT2
R.R
6, 7
f = 217 Hz
45


dB
Dropout voltage
VDO
6, 7
OUT2 = −50 mA


250
mV
GND current at low load
IGND
19
OUT2 > −1 mA


30
µA
GND current at max. load
IGND
19
OUT2 = −50 mA


1
mA
Output noise volt. (RMS)
VNOVL
6, 7
f = 10 Hz to 1 MHz,
OUT2 = 1 µF


350
µV
RSW1
45, 46
SW1-INPUT = 2.8 V
(Gate/Source = 2.8 V)


4.0
Ω
RSW2
51, 52
SW2-INPUT = 2.8 V
(Gate/Source = 2.8 V)


7.0
Ω
RSW3
47, 48
SW3-INPUT = 2.8 V
(Gate/Source = 2.8 V)


7.0
Ω
Hold time
General
purpose
switches
Pin
No.
Output voltage
XPOWER- Output voltage
GOOD
(RESET)
LDO2
(OUT2)
Symbol
(Ta = +25 °C, VBAT1 to VBAT4 = VCC-VSIM = 3.6 V)
Value
Conditions
Unit
Min. Typ. Max.
Input/Output resistance
V
V
(Continued)
8
MB3891
Parameter
LDO3
(OUT3)
Symbol Pin No.
Output voltage
VO
3, 4
−50 µA > OUT3 > −100 mA 2.700 2.800 2.900
Line regulation
Line
3, 4
3.1 V < VBAT3 < 5.5 V


10
mV
Load regulation
Load
3, 4
−50 µA > OUT3 > −100 mA


30
mV
Ripple rejection
∆VBAT3/∆OUT3
R.R
3, 4
f = 217 Hz
45


dB
Dropout voltage
VDO
3, 4
OUT3 = −100 mA


250
mV
GND current at low load
IGND
5
OUT3 > −1 mA


30
µA
GND current at max.
load
IGND
5
OUT3 = −100 mA


2
mA
VNOVL
3, 4
f = 10 Hz to 1 MHz,
OUT3 = 1 µF


350
µV
VO
40, 41
−50 µA > OUT4 > −100 mA,
2.700 2.800 2.900
CONT4 = “L”
V
VO
40, 41
−50 µA > OUT4 > −100 mA,
2.400 2.500 2.600
CONT4 = “H”
V
Output noise volt. (RMS)
Output voltage
LDO4
(OUT4)
V
Line regulation
Line
40, 41 3.1 V < VBAT4 < 5.5 V


10
mV
Load regulation
Load
40, 41 −50 µA > OUT4 > −100 mA


30
mV
Ripple rejection
∆VBAT4 - OUT4/∆OUT4
R.R
40, 41 f = 217 Hz
45


dB
Dropout voltage
VDO
40, 41 OUT4 = −100 mA


250
mV
GND current at low load
IGND
39
OUT4 > −1 mA


30
µA
GND current at max.
load
IGND
39
OUT4 = −100 mA


2
mA
VNOVL
40, 41
f = 10 Hz to 1 MHz,
OUT4 = 1 µF


500
µV
Output voltage
VO
58
−50 µA > OUT5 > −50 mA 2.700 2.800 2.900
Line regulation
Line
58
3.1 V < VBAT3 < 5.5 V


10
mV
Load regulation
Load
58
−50 µA > OUT5 > −50 mA


30
mV
Ripple rejection
∆VBAT3/∆OUT5
R.R
58
f = 217 Hz
45


dB
Dropout voltage
VDO
58
OUT5 = −50 mA


250
mV
GND current at low load
IGND
59
OUT5 > −500 µA


20
µA
GND current at max.
load
IGND
59
OUT5 = −50 mA


1
mA
VNOVL
58
f = 10 Hz to 1 MHz,
OUT5 = 1 µF


350
µV
Output noise volt. (RMS)
LDO5
(OUT5)
(Ta = +25 °C, VBAT1 to VBAT4 = VCC-VSIM = 3.6 V)
Value
Conditions
Unit
Min. Typ. Max.
Output noise volt. (RMS)
V
(Continued)
9
MB3891
Parameter
Output voltage
VO
21
−10 µA > V-BACKUP
> −250 µA
Line regulation
Line
21
3.1 V < VBAT2 < 5.5 V


10
mV
Load regulation
Load
21
−10 µA > V-BACKUP
> −250 µA


30
mV
Ripple rejection
∆VBAT2/
∆V-BACKUP
R.R
21
f = 217 Hz
25


dB
IGND
19
V-BACKUP > −10 µA


10
µA
IGND
19
V-BACKUP = −250 µA


50
µA
Output noise volt.
(RMS)
VNOVL
21
f = 10 Hz to 1 MHz,
V-BACKUP = 1 µF


500
µV
Reverse current
IRC
21
VBAT2 = 0 V,
V-BACKUP = 3.0 V


100
nA
Output voltage
VO
24
0 µA > REF-OUT > −50 µA
Line regulation
Line
24
3.1 V < VBAT2 < 5.5 V


10
mV
Load regulation
Load
24
0 µA > REF-OUT > −50 µA


6
mV
Ripple rejection
∆VBAT2/
∆REF-OUT
R.R
24
f = 217 Hz
50


dB
Output noise volt.
(RMS)
VNOVL
24
f = 10 Hz to 1 MHz,
REF-OUT = 27 nF


250
µV
VO
29
−50 µA > VSIMOUT > −10 mA,
4.600 5.000 5.400
SIMPROG = “H”
V
VO
29
−50 µA > VSIMOUT > −10 mA,
2.760 3.000 3.240
SIMPROG = “L”
V
Line regulation
Line
29
3.1 V < VCC-VSIM < 5.5 V


50
mV
Load regulation
Load
29
−50 µA > VSIMOUT > −10 mA


100
mV
LDO6
(V-BACKUP) GND current at
low load
GND current at
max. load
REF-OUT
Symbol Pin No.
(Ta = +25 °C, VBAT1 to VBAT4 = VCC-VSIM = 3.6 V)
Value
Conditions
Unit
Min. Typ. Max.
Output voltage
VSIMOUT
chargepump
2.000 2.100 2.200
1.200 1.225 1.250
V
V
(Continued)
10
MB3891
Parameter
Ripple rejection
∆VCC-VSIM/
∆VSIMOUT
Symbol Pin No.
(Ta = +25 °C, VBAT1 to VBAT4 = VCC-VSIM = 3.6 V)
Value
Conditions
Unit
Min.
Typ.
Max.
R.R
29
f = 217 Hz
30


dB
IO
29
3.1 V < VCC-VSIM < 5.5 V,
VSIMOUT = 5 V
10


mA
IO
29
3.1 V < VCC-VSIM < 5.5 V,
VSIMOUT = 3 V
6


mA
IGND
32
VSIMOUT > −50 µA


100
µA
Efficiency at
max. load
η
25, 29
VSIMOUT = −10 mA,
VSIMOUT = 5 V
85


%
Output ripple
voltage
VRP
29
f = 10 Hz to 1 MHz,
VSIMOUT = 10 µF


100
mVPP
Shutdown supply current
ILDO
25
VSIM-ON = “L”


100
nA
VIH
33, 34,
35

0.7 ×
OUT1

OUT1
V
VIL
33, 34,
35

0

0.3 ×
OUT1
V
VOH
35
µP-IO (max.) = −20 µA
0.8 ×
OUT1

OUT1
V
VOL
35
µP-IO (max.) = 1 mA
0

0.2 ×
OUT1
V
Output current
VSIMOUT
GND current at
chargepump
no load
Input voltage
GSM/SIM
logic level
translation
µp interface
Output voltage
(Continued)
11
MB3891
(Continued)
Parameter
Symbol Pin No.
(Ta = +25 °C, VBAT1 to VBAT4 = VCC-VSIM = 3.6 V)
Value
Conditions
Unit
Min.
Typ.
Max.
VOH
36
RST (max.) = −20 µA
VSIMOUT
VOL
36
RST (max.) = 200 µA
Rise time
TR
36
Fall time
TF

VSIMOUT
V
0

0.6
V
RESET-IN = RST = 30 pF


400
µs
36
RESET-IN = RST = 30 pF


400
µs
VOH
37
CLK (max.) = −20 µA

VSIMOUT
V
VOL
37
CLK (max.) = 200 µA
0

0.5
V
TR
37
CLK-IN = CLK = 30 pF


27
ns
TF
37
CLK-IN = CLK = 30 pF


27
ns
VOH
38
SIM-IO (max.) = −20 µA
3.8

VSIMOUT
V
VOL
38
SIM-IO (max.) = 1 mA
0

0.4
V
VIH
38


VSIMOUT
V
VIL
38

0

0.8
V
Rise time
TR
38
SIM-IO = 30 pF


1
µs
Fall time
TF
38
SIM-IO = 30 pF


1
µs
VOH
36
RST (max.) = −20 µA

VSIMOUT
V
VOL
36
RST (max.) = 200 µA
0

Rise time
TR
36
RESET-IN = RST = 30 pF


400
µs
Fall time
TF
36
RESET-IN = RST = 30 pF


400
µs
VOH
37
CLK (max.) = −20 µA

VSIMOUT
V
VOL
37
CLK (max.) = 200 µA
0

TR
37
CLK-IN = CLK = 30 pF


50
ns
TF
37
CLK-IN = CLK = 30 pF


50
ns
VOH
38
SIM-IO (max.) = −20 µA

VSIMOUT
V
VOL
38
SIM-IO (max.) = 1 mA

0.4
V
VIH
38


VSIMOUT
V
VIL
38

Rise time
TR
38
Fall time
TF
38
Output voltage
Output voltage
SIM
interface
Rise time
5V
(SIMPROG Fall time
= H)
Output voltage
Input voltage
Output voltage
Output voltage
SIM
interface
Rise time
3V
(SIMPROG Fall time
= L)
Output voltage
Input voltage
12
− 0.7
0.7 ×
VSIMOUT
0.7 ×
VSIMOUT
0.8 ×
VSIMOUT
0.7 ×
VSIMOUT
0.7 ×
VSIMOUT
0
0.7 ×
VSIMOUT
0.2 ×
VSIMOUT
0.2 ×
VSIMOUT
0.2 ×
V
V
0

SIM-IO = 30 pF


1
µs
SIM-IO = 30 pF


1
µs
VSIMOUT
V
MB3891
■ TYPICAL CHARACTERISTICS
400
Ta = +25 °C
CONT1 = “L”
CONT2 = “H”
CONT3 = “H”
CONT4 = OPEN
CONT5 = OPEN
CONT6 = OPEN
VSIM-ON = “H”
SIMPROG = “H”
350
300
250
200
OUT1 = No load
OUT2 = No load
OUT3 = No load
OUT4 = No load
OUT5 = No load
V-BACKUP = No load
VSIMOUT = No load
150
100
50
0
0
Power supply current vs. power supply voltage
Power supply current IBAT (µA)
Power supply current IBAT (µA)
Power supply current vs. power supply voltage
1
3
2
4
5
350
Ta = +25 °C
CONT1 = OPEN
300 CONT2 = “H”
CONT3 = “H”
250 CONT4 = OPEN
CONT5 = OPEN
200 CONT6 = “H”
VSIM-ON = “H”
150 SIMPROG = “H”
100
50
0
0
Power supply voltage VBAT (V)
CONT4 = OPEN
250
50
0
1
200
OUT1 = 18 Ω
OUT2 = 56 Ω
OUT3 = 28 Ω
OUT4 = 28 Ω
OUT5 = 56 Ω
V-BACKUP = 8.4 kΩ
VSIMOUT = 510 Ω
100
0
300
IGND
2
3
4
150
100
50
Output voltage VOUT1 (V)
350
GND current IGND (µA)
Power supply current IBAT (mA)
400
CONT2 = “H”
150
4
5
2.5
2.0
1.5
1.0
Ta = +25 °C
OUT1 = 1 µF
CONT1 = OPEN
CONT6 = “H”
0.5
0.0
0
0
5
1
2
3
4
5
6
7
Power supply voltage VBAT (V)
Power supply voltage VBAT (V)
Output voltage vs. power supply voltage (LDO1)
Output voltage vs. load current (LDO1)
2.2
3.0
Ta = +25 °C
OUT1 = 1 µF
2.5
CONT1 = “L”
CONT6 = OPEN
2.0
Output voltage VOUT1 (V)
Output voltage VOUT1 (V)
3
3.0
450
350 CONT3 = “H”
200 SIMPROG = “H”
2
Output voltage vs. power supply
voltage (LDO1)
IBAT
300 CONT5 = OPEN
= “H”
250 CONT6
VSIM-ON = “H”
1
Power supply voltage VBAT (V)
Power supply current , GND current vs.
power supply voltage
450 Ta = +25 °C
400 CONT1 = OPEN
OUT1 = No load
OUT2 = No load
OUT3 = No load
OUT4 = No load
OUT5 = No load
V-BACKUP = No load
VSIMOUT = No load
1.5
1.0
0.5
0.0
2.1
2.0
1.9
Ta = +25 °C
VBAT = 3.6 V
CONT1 = “L”
CONT6 = OPEN
1.8
1.7
0
1
2
3
4
Power supply voltage VBAT (V)
5
0
−100 −200 −300 −400 −500 −600 −700 −800
Load current ILOAD (mA)
(Continued)
13
MB3891
Ripple rejection vs. frequency (LDO1)
0
Ripple rejection R.R (dBm)
Ripple rejection R.R (dBm)
Ripple rejection vs. frequency (LDO1)
−20
−40
Ta = +25 °C
VBAT = 3.6 V
OUT1 = 1 µF
OUT1 = 18 Ω
CONT1 = “L”
CONT6 = OPEN
−60
−80
−100
10
100
1k
10 k
100 k
0
Ta = +25 °C
VBAT = 3.6 V
OUT1 = 1 µF
CONT1 = “L”
CONT6 = OPEN
−20
−40
−60
−80
−100
1M
10
100
Frequency f (Hz)
Output voltage VOUT1 (V)
Dropout voltage VDO (V)
Ta = +85 °C
0.4
0.3
Ta = −20 °C
0.2
Ta = +25 °C
0.1
0.0
0
−50
−100
−150
VBAT
0
1.5
1.0
Ta = +25°C
OUT1 = 18 Ω
CONT1 = “L”
CONT6 = OPEN
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
14
2.0
0.5
0.0
Output voltage VOUT1 (V)
Power supply voltage VBAT
10
OUT1
2.11
2.10
2.09
−20
0
20
40
60
80
Ambient temperature Ta ( °C)
Output voltage rising waveforms (LDO1)
t (ms)
1M
VBAT = 3.6 V
CONT1 = OPEN
CONT6 = “H”
2.12
2.08
−40
−200
Load current ILOAD (mA)
5
100 k
Output voltage vs. ambient temperature (LDO1)
2.13
VBAT = 2.1 V
CONT1 = OPEN
CONT6 = “H”
0.5
10 k
Frequency f (Hz)
Dropout voltage vs. load current (LDO1)
0.6
1k
100
Ta = +25°C
OUT1 = No load
CONT1 = “L”
CONT6 = OPEN
3
2
1
VBAT
2
0
1
OUT1
0
0
4
2
VBAT
0
2
1
OUT1
t (s)
Output voltage rising waveforms (LDO1)
4
2
CONT1
OUT1
2
1
0
20
40
60
0
Output voltage VOUT1 (V)
Input voltage VCONT1 (V)
Input voltage VCONT1 (V)
t (ms)
Ta = +25°C
VBAT = 3.6 V
OUT1 = 18 Ω
CONT6 = OPEN
Output voltage falling waveforms (LDO1)
10
CONT1
5
Ta = +25°C
VBAT = 3.6 V
OUT1 = No load
CONT6 = OPEN
0
0.5
0.0
20
40
60
VBAT = 3.6 V
Ta = +25°C
VBAT = 3.6 V
CONT1 = “L”
CONT6 = OPEN
1.5
1.0
2
0.5
1
0.0
VC
0
30
40
−120 mA
50
60
70
80
NPN collector voltage VC (V)
Output voltage VOUT1 (V)
[Measurement diagram]
OUT1
2.0
20
80 100 120 140 160 180 200
t (ms)
Waveform at rapid change of output load
(LDO1)
10
1.5
OUT1
t (µs)
0
2.0
1.0
0
80 100 120 140 160 180 200
OUT1 = 0 A
0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
50 100 150 200 250 300 350 400 450 500
0
Ta = +25°C
VBAT = 1 µF
OUT1 = No load
CONT1 = “L”
CONT6 = OPEN
Output voltage VOUT1 (V)
4
Output voltage falling waveforms (LDO1)
Output voltage VOUT1 (V)
Output voltage falling waveforms (LDO1)
Output voltage VOUT1 (V)
Power supply voltage VBAT (V)
Power supply voltage VBAT (V)
MB3891
VREF = 1.225 V
(IC internal)
LDO1
OUT1 120 mA
1 µF VC
4V
0V
90 100
t (µs)
(Continued)
15
Waveform at rapid change of output load (LDO1)
OUT1
2.0
1.5
1.0
VC
0.5
2
Ta = +25°C
VBAT = 3.6 V
CONT1 = “L”
CONT6 = OPEN
0.0
1
0
OUT1 = −120 mA 0 A
NPN Collector voltage VC (V)
Output voltage VOUT1 (V)
MB3891
[Measurement diagram]
VBAT = 3.6 V
VREF = 1.225 V
(IC internal) LDO1
OUT1 120 mA
1 µF VC
4V
0V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
t (ms)
3.0
OUT2
Ta = +25°C
VBAT = 3.6 V
CONT1 = “L”
CONT2 = “H”
CONT6 = OPEN
2.5
2.0
1.5
1.0
3
2
0.5
1
VC
0.0
0
OUT2 = 0 A −50 mA
0
10
20 30
40
50
60
70
80
[Measurement diagram]
VBAT = 3.6 V
NPN Collector voltage VC (V)
Output voltage VOUT2 (V)
Waveform at rapid change of output load (LDO2)
VREF = 1.225 V
(IC internal)
LDO2
OUT2 50 mA
1 µF VC
4V
0V
90 100
t (µs)
3.0
OUT2
2.5
2.0
VC
1.5
1.0
3
Ta = +25°C
VBAT = 3.6 V
CONT1 = “L”
CONT2 = “H”
CONT6 = OPEN
OUT2 = −50 mA 0 A
0.5
0.0
0
10
20
30
40
50
60
70
80
2
1
0
NPN Collector voltage VC (V)
Output voltage VOUT2 (V)
Waveform at rapid change of output load (LDO2)
[Measurement diagram]
VBAT = 3.6 V
VREF = 1.225 V
(IC internal) LDO2
OUT2 50 mA
1 µF VC
4V
0V
90 100
t (ms)
(Continued)
16
MB3891
Reference voltage vs. power supply voltage
Reference voltage vs. ambient temperature
1.24
Reference voltage VFIL (V)
Reference voltage VFIL (V)
1.4
1.2
1.0
0.8
0.6
0.4
Ta = +25 °C
VFIL = 0.1 µF
0.2
0.0
0
1
2
3
4
5
6
7
VBAT = 3.6 V
1.23
1.22
1.21
1.20
1.19
−40
−20
10000
1000
VSIMOUT = No load
100
Ta = +25 °C
VBAT = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
0
1
2
3
4
5
Power supply voltage VCC-VSIM (V)
Power supply current ICC-VSIM (µA)
Power supply current ICC-VSIM (µA)
VSIMOUT = 510 Ω
1
40
60
80
100
Power supply current vs. power supply voltage
(VSIMOUT Chargepump)
Power supply current vs. power supply voltage
(VSIMOUT Chargepump)
10
20
Ambient temperature Ta ( °C)
Power supply voltage VBAT (V)
100000
0
100000
VSIMOUT = 510 Ω
10000
1000
VSIMOUT = No load
100
Ta = +25 °C
VBAT = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
10
1
0
1
2
3
4
5
Power supply voltage VCC-VSIM (V)
Output voltage VSIMOUT (V)
Output voltage vs. power supply voltage
(VSIMOUT Chargepump)
5
SIMPROG = “H”
VSIMOUT = No load
4
3
SIMPROG = “L”
VSIMOUT = No load
2
Ta = +25 °C
VBAT = 3.6 V
VSIM-ON = “H”
1
0
0
1
2
3
4
5
6
7
Power supply voltage VCC-VSIM (V)
(Continued)
17
MB3891
3.00
2.99
2.98
2.97
2.96
2.95
2.94
2.93
2.92
2.91
2.90
Output voltage vs. load current
(VSIMOUT Chargepump)
Ta = +25 °C
VSIM-ON = “H”
SIMPROG = “L”
VCC-VISM = 5.5 V
VCC-VISM = 3.1 V
VCC-VISM = 3.6 V
0
−5
−10
−15
5.00
Output voltage VSIMOUT (V)
Output voltage VSIMOUT (V)
Output voltage vs. load current
(VSIMOUT Chargepump)
−20
Ta = +25 °C
VSIM-ON = “H”
SIMPROG = “H”
4.95
4.90
4.80
VCC-VISM = 3.1 V
4.75
4.65
4.60
0
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
VCAP+  VCAP− = 0.1 µF
VSIMOUT = 10 µF
VSIMOUT = 510 Ω
Ripple rejection R.R (dBm)
100
1k
10 k
100 k
0
−15
−20
−40
−60
−80
−100
100
1k
10 k
100 k
Frequency f (Hz)
Frequency f (Hz)
Ripple rejection vs. frequency
(VSIMOUT Chargepump)
Ripple rejection vs. frequency
(VSIMOUT Chargepump)
−20
−40
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
VCAP+  VCAP− = 0.1 µF
VSIMOUT = 10 µF
VSIMOUT = 510 Ω
−60
−80
−100
100
1k
10 k
Frequency f (Hz)
100 k
−20
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
VCAP+  VCAP− = 0.1 µF
VSIMOUT = 10 µF
10
1M
0
10
Ripple rejection R.R (dBm)
−40
1M
Ripple rejection R.R (dBm)
Ripple rejection R.R (dBm)
−20
10
−10
Ripple rejection vs. frequency
(VSIMOUT Chargepump)
0
−100
−5
Load current ILOAD (mA)
Ripple rejection vs. frequency
(VSIMOUT Chargepump)
−80
VCC-VISM
= 3.6 V
4.70
Load current ILOAD (mA)
−60
VCC-VISM = 5.5 V
4.85
0
1M
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
VCAP+  VCAP− = 0.1 µF
VSIMOUT = 10 µF
−20
−30
−40
−80
−100
10
100
1k
10 k
100 k
1M
Frequency f (Hz)
(Continued)
18
MB3891
Ta = +25 °C
VSIM-ON = “H”
SIMPROG = “L”
ILOAD = −10 mA
ILOAD = −1 mA
3.5
4.5
4.0
5.0
5.5
ILOAD = −10 mA
ILOAD = −1 mA
3.0
3.5
4.5
4.0
5.0
5.5
Power supply voltage VCC-VSIM (V)
Efficiency vs. load current
(VSIMOUT Chargepump)
Efficiency vs. load current
(VSIMOUT Chargepump)
Efficiency η (%)
VCC-VSIM = 5.5 V
VCC-VSIM = 3.6 V
VCC-VSIM = 3.1 V
−5
−10
−15
−20
0
VSIMOUT
5
4
3
2
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
SIMPROG = “H”
VSIMOUT = 510 Ω
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
t (ms)
1
0
Output voltage VSIMOUT (V)
Input voltage VSIM-ON (V)
10
VSIM-ON
VCC-VSIM = 3.1 V
VCC-VSIM = 3.6 V
VCC-VSIM = 5.5 V
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
−5
−10
−15
−20
Load current ILOAD (mA)
Output voltage rising waveforms
(VSIMOUT Chargepump)
5
100
90
80
70
60
50
40
30
20
10
0
0
Load current ILOAD (mA)
Input voltage VSIM-ON (V)
Ta = +25 °C
VSIM-ON = “H”
SIMPROG = “H”
Power supply voltage VCC-VSIM (V)
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
0
100
90
80
70
60
50
40
30
20
10
0
Output voltage rising waveforms
(VSIMOUT Chargepump)
10
5
VSIM-ON
0
VSIMOUT
3
2
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
SIMPROG = “L”
VSIMOUT = 510 Ω
1
0
Output voltage VSIMOUT (V)
100
90
80
70
60
50
40
30
20
10
0
Efficiency vs. power supply voltage
(VSIMOUT Chargepump)
Efficiency η (%)
100
90
80
70
60
50
40
30
20
10
0
3.0
Efficiency η (%)
Efficiency η (%)
Efficiency vs. power supply voltage
(VSIMOUT Chargepump)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
t (ms)
(Continued)
19
5
SIMPROG
0
VSIMOUT
5
4
3
2
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIMOUT = 510 Ω
VSIM-ON = “H”
1
0
Output voltage falling waveforms
(VSIMOUT Chargepump)
10
5
SIMPROG
4
VSIMOUT
Ta = +25 °C
VBAT = VCC-SIM = 3.6 V
VSIMOUT = 510 Ω
VSIM-ON = “H”
2
1
VSIMOUT
0
15
20
25
30
35
40
45
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
SIMPROG = “L”
VSIMOUT = 510 Ω
5
0
VSIM-ON
3
2
1
VSIMOUT
0
0
50
5
10
15
20
t (ms)
Output voltage VSIMOUT (mV)
Output voltage VSIMOUT (mV)
0
−20
−40
0
2
4
6
8
10
t (µs)
35
40
45
50
Output voltage waveforms
(VSIMOUT Chargepump)
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
VSIMOUT = No load
AC COUPLED
20
30
t (ms)
Output voltage waveforms
(VSIMOUT Chargepump)
40
25
Output voltage VSIMOUT (V)
3
10
Output voltage VSIMOUT (V)
Input voltage VSIM-ON (V)
Input voltage VSIM-ON (V)
5
4
5
Output voltage falling waveforms
(VSIMOUT Chargepump)
10
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
SIMPROG = “H”
VSIMOUT = 510 Ω
VSIM-ON
0
0
t (ms)
Output voltage falling waveforms
(VSIMOUT Chargepump)
0
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
t (ms)
5
3
2
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
10
5
0
Output voltage VSIMOUT (V)
10
Input voltage VSIMPROG (V)
Output voltage rising waveforms
(VSIMOUT Chargepump)
Output voltage VSIMOUT (V)
Input voltage VSIMPROG (V)
MB3891
12
14
16
18
20
Ta = +25 °C
VBAT = VCC-SIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
VSIMOUT = No load
AC COUPLED
20
0
−20
0
2
4
6
8
10
12
14
16
18
20
t (µs)
(Continued)
20
MB3891
Output voltage waveforms
(VSIMOUT Chargepump)
40
20
0
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
VSIMOUT = 510 Ω
AC COUPLED
−20
−40
0
2
4
6
8
10
12
14
16
18
Output voltage VSIMOUT (mV)
Output voltage VSIMOUT (mV)
Output voltage waveforms
(VSIMOUT Chargepump)
20
0
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
VSIMOUT = 5.1 kΩ
AC COUPLED
−20
20
0
2
4
6
8
10
t (µs)
40
20
0
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
VSIMOUT = 510 Ω
AC COUPLED
−40
0
2
4
6
8
10
16
20
18
12
14
16
18
60
40
20
0
−20
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
VSIMOUT = 5.1 kΩ
AC COUPLED
−40
−60
20
0
2
4
6
8
t (µs)
10
12
14
16
18
20
t (µs)
Output voltage vs. input voltage (SIM Inter-
Output voltage vs. input voltage (SIM Interface)
5
2.5
SIMPROG = "H"
4
SIMPROG = "L"
3
2
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = "H"
CONT1 = "L"
CONT6 = OPEN
1
0
0.0
0.5
1.0
1.5
2.0
Input voltage VUPIO (V)
2.5
Output voltage VUPIO (V)
Output voltage VSIMIO (V)
14
Output voltage waveforms
(VSIMOUT Chargepump)
Output voltage VSIMOUT (mV)
Output voltage VSIMOUT (mV)
Output voltage waveforms
(VSIMOUT Chargepump)
−20
12
t (µs)
2.0
1.5
Ta = +25 °C
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L” or “H”
CONT1 = “L”
CONT6 = OPEN
1.0
0.5
0.0
0
1
2
3
4
5
Input voltage VSIMIO (V)
(Continued)
21
MB3891
(Continued)
Output voltage vs. ambient temperature
(SIM Interface)
Output voltage vs. ambient temperature
(SIM Interface)
5.00
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “L”
3.05
Output voltage VSIMOUT (V)
Output voltage VSIMOUT (V)
3.10
3.00
2.95
2.90
2.85
2.80
−40
−20
20
0
40
60
80
100
Ambient temperature Ta ( °C)
Power dissipation PD (mW)
1000
800
600
400
200
−20
0
20
40
60
80
Ambient temperature Ta ( °C)
22
4.90
4.85
4.80
4.75
4.70
−40
−20
0
20
40
60
80
Ambient temperature Ta ( °C)
Power dissipation vs. ambient temperature
0
−40
VBAT = VCC-VSIM = 3.6 V
VSIM-ON = “H”
SIMPROG = “H”
4.95
100
100
MB3891
■ FUNCTIONAL DESCRIPTION
(1) MAIN UVLO/BACKUP UVLO
Transient power-on surge states or sudden drops in supply voltage (VBAT2) can cause an IC to operate abnormally, leading to destruction or damage to system elements. To prevent this type of fault, the undervoltage lockout
circuits (UVLO/ Backup UVLO) will shut off the output from OUT1 to V-BACKUP if the supply voltage falls below
the UVLO circuit threshold voltage (3.0 V/2.8 V typ.). System operation is restored as soon as the supply voltage
rises above the UVLO circuits threshold voltage (3.2 V typ.).
(2) LDO1
The LDO1 circuits uses the reference voltage supply and generates an output voltage (2.1 V typ.) at the OUT1
terminal (pin 12,13). Power can be drawn from the OUT1 terminal for external use, up to a maximum load current
of 120 mA.
(3) XPOWERGOOD (RESET)
When the OUT1 terminal (pin 12,13) voltage exceeds 2.0 V (typ.), after a delay interval set by a capacitor
(CDELAYCAP) connected to the DELAYCAP terminal (pin 18), the XPOWERGOOD terminal (pin 17) goes to “H”
level and resets the microcomputer. At the same time, the LDO2, LDO3, and LDO4 output is controlled ON/OFF.
(4) LDO2
The LDO2 circuit uses the reference voltage supply and generates an output voltage (2.8 V typ.) at the OUT2
terminal (pin 6,7) when the XPOWERGOOD terminal (pin 17) voltage is at “H” level and an “H” level signal is
input at the CONT2 terminal (pin 16). Power can be drawn from the OUT2 terminal for external use, up to a
maximum load current of 50 mA.
(5) General Purpose switches
Any of the OUT terminals can be connected to any SW-INPUT terminal so that when the corresponding SWON terminal is at “H” level, the OUT terminal voltage can be drawn from the associated SW-OUTPUT terminal.
(6) LDO3
The LDO3 circuits uses the reference voltage supply and generates an output voltage (2.8 V typ.) at the OUT3
terminal (pin 3,4) when the XPOWERGOOD terminal (pin 17) voltage is at “H” level and an “H” level signal is
input at the CONT3 terminal (pin 56). Power can be drawn from the OUT3 terminal for external use, up to a
maximum load current of 100 mA.
(7) LDO4
The LDO4 circuits uses the reference voltage supply and generates an output voltage (2.8 V typ.) at the OUT4
terminal (pin 40,41) when the XPOWERGOOD terminal (pin 17) voltage is at “H” level and an “H” level signal is
input at the CONT3 terminal (pin 56) , and an “L” level signal is input at the CONT4 terminal (pin 44). When an
“H” level signal is input at the CONT4 terminal, the output voltage at the OUT4 terminal is 2.5 V (typ.). Power
can be drawn from the OUT4 terminal for external use, up to a maximum load current of 100 mA.
23
MB3891
(8) LDO5
The LDO5 circuits uses the reference voltage supply and generates an output voltage (2.8 V typ.) at the OUT5
terminal (pin 57) when the OUT1 terminal (pin 12,13) is in output state and an “H” level signal is input at the
CONT5 terminal (pin 57). Power can be drawn from the OUT5 terminal for external use, up to a maximum load
current of 50 mA.
(9) LDO6
The LDO6 circuit uses the reference voltage supply and generates an output voltage (2.1 V typ.) at the V-BACKUP
terminal (pin 21). Power can be drawn for external use, from the V-BACKUP terminal, up to a maximum load
current of 250 µA.
(10) REF-OUT
This circuit uses the reference voltage generated by the reference voltage block (1.225 V typ.) to produce a
temperature compensated reference voltage (1.225 V typ.) at the REF-OUT terminal(pin 24) by means of a
voltage follower. The reference voltage can also be drawn from the REF-OUT terminal for external use, up to a
load current of 50 µA.
(11) VSIMOUT Chargepump
The VSIMOUT charge pump uses the voltage from the battery and generates 5.0 V (typ.) voltage at the VSIMOUT
terminal (pin 29) when an “H” level signal is input at the SIMPROG terminal (pin 27) , or 3.0 V (typ.) voltage
when an “L” level signal input at the SIMPROG terminal. This voltage can also be drawn from the VSIMOUT
terminal for external use, up to a load current of 10 mA.
(12) GSM/SIM Logic Translation µP Interface
When a signal is input from the microprocessor to the RESET-IN terminal(pin 33) and CLK-IN terminal (pin 34),
a level-shifted voltage is output from the RST terminal (pin 36) and CLK terminal (pin 37) to the SIM card. The
µP-IO terminal (pin 35) and SIM-IO terminal (pin 38) are input/output pins and carry signals between the
microprocessor and SIM card.
(13) SIM Interface 5 V (SIMPROG = “H”)
When an “H” level signal is input to the SIMPROG terminal (pin 27), 5.0 V (typ.) voltage is generated from the
VSIMOUT terminal (pin 29) as a power supply for the SIM card.
(14) SIM Interface 3 V (SIMPROG = “L”)
When an “L” level signal is input to the SIMPROG terminal (pin 27), 3.0 V (typ.) voltage is generated from the
VSIMOUT terminal (pin 29) as a power supply for the SIM card.
■ SETTING THE XPOWERGOOD TIME
When the OUT1 terminal (pin 12,13) voltage exceeds 2.0 V (typ.), the capacitor (CDELAYCAP) connected to the
DELAYCAP terminal (pin 18) starts charging, the XPOWERGOOD terminal (pin 17) voltage rises. The XPOWERGOOD terminal voltage rising time (XPOWERGOOD time) can be set by a capacitor connected to the
DELAYCAP terminal.
XPOWERGOOD time : TXPG (s) =: 0.8 × CDELAYCAP (µF)
24
MB3891
■ OPERATION TIMING CHART
Input
VBAT1 to VBAT4,
VCC-VSIM
CONT1
CONT6
CONT5
CONT2
CONT3
SW1-ON
SW2-ON (SW3-ON)
VSIM-ON
SIMPROG
Output
REF-OUT
OUT6
2.0 V
OUT1
XPOWERGOOD
delay
OUT5
OUT2
OUT3 (OUT4)
SW1-OUTPUT
SW2-OUTPUT
(SW3-OUTPUT)
VSIMOUT = 3 V
VSIMOUT
(1)
(1) : Battery controlled
(2) : BACKUP UVLO ON
(3) : phone turned on
(4) : XPOWERGOOD on
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
VSIMOUT = 5 V
(10) (11) (12) (13) (14) (15) (16) (17)
(5) : OUT1 hold
(6) to (12) : µP controlled
(14) : Main UVLO off
(16) : BACKUP UVLO off
25
MB3891
■ APPLICATION EXAMPLE
C12
1 µF
20
VBAT2
KEYPAD
C11
1 µF
8 9 10 11
VBAT1
14 CONT1
µP
15 CONT6
R1
200 kΩ
OUT1
12
13
C1
1 µF
16 CONT2
XPOWERGOOD 17
53 SW1-ON
DELAYCAP 18
54 SW2-ON
GND1 19
C2
0.033 µF
55 SW3-ON
R2
200 kΩ
56 CONT3
57 CONT5
R3
200 kΩ
R4
200 kΩ
R5
200 kΩ
6
7
C3
1 µF
SW2-INPUT 52
44 CONT4
SW2-OUTPUT 51
22 VREF
C8
0.1 µF
OUT2
23 VFIL
24 REF-OUT
26 VSIM-ON
SW3-INPUT 48
SW3-OUTPUT 47
60
VBAT3 61
62
27 SIMPROG
OUT3
3
4
33 RESET-IN
34 CLK-IN
35 µP-IO
C13
1 µF
C4
1 µF
GND3 5
SW1-INPUT 46
SW1-OUTPUT 45
25 VCC-VSIM
OUT5 58
C5
1 µF
28 OSC
GND5 59
C9
10 µF
29 VSIMOUT
C10
0.1 µF
30 VCAP+
31 VCAP−
36 RST
SIM
42
VBAT4 43
37 CLK
OUT4
40
41
C14
1 µF
C6
1 µF
GND4 39
38 SIM-IO
V-BACKUP 21
32 GND-VSIM
C7
1 µF
N.C.
Pin : 1, 2, 49, 50, 63, 64
26
MB3891
■ USAGE PRECAUTIONS
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or Containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personal should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages
The use of negative voltages below -0.3V may create parasitic transistors on LSI lines, Which can cause abnormal
operation.
■ ORDERING INFORMATION
Part number
MB3891PFV
Package
Remarks
64-pin Plastic LQFP
(FPT-64P-M03)
27
MB3891
■ PACKAGE DIMENSION
64-pin plastic LQFP
(FPT-64P-M03)
Note : Pins width and pins thickness include plating thickness.
12.00±0.20(.472±.008)SQ
10.00±0.10(.394±.004)SQ
48
33
49
32
0.08(.003)
Details of "A" part
INDEX
+0.20
1.50 –0.10
+.008
(Mounting height)
.059 –.004
64
17
"A"
LEAD No.
1
0.50±0.08
(.020±.003)
0~8°
16
0.18
.007
+0.08
–0.03
+.003
–.001
0.08(.003)
M
0.145±0.055
(.006±.002)
0.50±0.20
(.020±.008)
0.45/0.75
(.018/.030)
C
0.10±0.10
(.004±.004)
(Stand off)
0.25(.010)
1998 FUJITSU LIMITED F64009S-3C-6
Dimensions in mm (inches) .
MB3891
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka,
Nakahara-ku, Kawasaki-shi,
Kanagawa 211-8588, Japan
Tel: +81-44-754-3763
Fax: +81-44-754-3329
http://www.fujitsu.co.jp/
North and South America
FUJITSU MICROELECTRONICS, INC.
3545 North First Street,
San Jose, CA 95134-1804, U.S.A.
Tel: +1-408-922-9000
Fax: +1-408-922-9179
Customer Response Center
Mon. - Fri.: 7 am - 5 pm (PST)
Tel: +1-800-866-8608
Fax: +1-408-922-9179
http://www.fujitsumicro.com/
Europe
FUJITSU MICROELECTRONICS EUROPE GmbH
Am Siebenstein 6-10,
D-63303 Dreieich-Buchschlag,
Germany
Tel: +49-6103-690-0
Fax: +49-6103-690-122
http://www.fujitsu-fme.com/
Asia Pacific
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
#05-08, 151 Lorong Chuan,
New Tech Park,
Singapore 556741
Tel: +65-281-0770
Fax: +65-281-0220
http://www.fmap.com.sg/
Korea
FUJITSU MICROELECTRONICS KOREA LTD.
1702 KOSMO TOWER, 1002 Daechi-Dong,
Kangnam-Gu,Seoul 135-280
Korea
Tel: +82-2-3484-7100
Fax: +82-2-3484-7111
F0007
 FUJITSU LIMITED Printed in Japan
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The contents of this document may not be reproduced or copied
without the permission of FUJITSU LIMITED.
FUJITSU semiconductor devices are intended for use in standard
applications (computers, office automation and other office
equipments, industrial, communications, and measurement
equipments, personal or household devices, etc.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect human lives or cause physical injury or property damage, or
where extremely high levels of reliability are demanded (such as
aerospace systems, atomic energy controls, sea floor repeaters,
vehicle operating controls, medical devices for life support, etc.)
are requested to consult with FUJITSU sales representatives before
such use. The company will not be responsible for damages arising
from such use without prior approval.
Any semiconductor devices have inherently a certain rate of failure.
You must protect against injury, damage or loss from such failures
by incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Control Law of Japan, the
prior authorization by Japanese government should be required for
export of those products from Japan.