MOTOROLA MC14XXXBD

+ ! +
! SEMICONDUCTOR TECHNICAL DATA
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"$#(( '#!! '
L SUFFIX
CERAMIC
CASE 632
The MC14093B Schmitt trigger is constructed with MOS P–channel and
N–channel enhancement mode devices in a single monolithic structure.
These devices find primary use where low power dissipation and/or high
noise immunity is desired. The MC14093B may be used in place of the
MC14011B quad 2–input NAND gate for enhanced noise immunity or to
“square up” slowly changing waveforms.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
Schottky TTL Load Over the Rated Temperature Range
• Triple Diode Protection on All Inputs
• Pin–for–Pin Compatible with CD4093
• Can be Used to Replace MC14011B
• Independent Schmitt–Trigger at each Input
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
MAXIMUM RATINGS* (Voltages Referenced to VSS)
Symbol
VDD
Parameter
DC Supply Voltage
Value
Unit
– 0.5 to + 18.0
V
Vin, Vout
Input or Output Voltage (DC or Transient)
– 0.5 to VDD + 0.5
V
Iin, Iout
Input or Output Current (DC or Transient),
per Pin
± 10
mA
PD
Power Dissipation, per Package†
500
mW
Tstg
Storage Temperature
– 65 to + 150
_C
260
_C
TL
Lead Temperature (8–Second Soldering)
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
EQUIVALENT CIRCUIT SCHEMATIC
(1/4 OF CIRCUIT SHOWN)
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
LOGIC DIAGRAM
1
2
3
5
6
4
8
9
10
12
13
11
VDD = PIN 14
VSS = PIN 7
This device contains protection circuitry to guard against damage
due to high static voltages or electric fields. However, precautions must
be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, Vin and
Vout should be constrained to the range VSS ≤ (Vin or Vout) ≤ VDD.
Unused inputs must always be tied to an appropriate logic voltage
level (e.g., either VSS or VDD). Unused outputs must be left open.
REV 3
1/94
MOTOROLA
Motorola, Inc. 1995
CMOS LOGIC DATA
MC14093B
1
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS)
Characteristic
Output Voltage
Vin = VDD or 0
Symbol
– 55_C
25_C
125_C
VDD
Vdc
Min
Max
Min
Typ #
Max
Min
Max
Unit
“0” Level
VOL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
“1” Level
VOH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
5.0
5.0
10
15
– 3.0
– 0.64
– 1.6
– 4.2
—
—
—
—
– 2.4
– 0.51
– 1.3
– 3.4
– 4.2
– 0.88
– 2.25
– 8.8
—
—
—
—
– 1.7
– 0.36
– 0.9
– 2.4
—
—
—
—
IOL
5.0
10
15
0.64
1.6
4.2
—
—
—
0.51
1.3
3.4
0.88
2.25
8.8
—
—
—
0.36
0.9
2.4
—
—
—
mAdc
Input Current
Iin
15
—
± 0.1
—
± 0.00001
± 0.1
—
± 1.0
µAdc
Input Capacitance
(Vin = 0)
Cin
—
—
—
—
5.0
7.5
—
—
pF
Quiescent Current
(Per Package)
IDD
5.0
10
15
—
—
—
0.25
0.5
1.0
—
—
—
0.0005
0.0010
0.0015
0.25
0.5
1.0
—
—
—
7.5
15
30
µAdc
IT
5.0
10
15
Hysteresis Voltage
VH†
5.0
10
15
0.3
1.2
1.6
2.0
3.4
5.0
0.3
1.2
1.6
1.1
1.7
2.1
2.0
3.4
5.0
0.3
1.2
1.6
2.0
3.4
5.0
Threshold Voltage
Positive–Going
VT+
5.0
10
15
2.2
4.6
6.8
3.6
7.1
10.8
2.2
4.6
6.8
2.9
5.9
8.8
3.6
7.1
10.8
2.2
4.6
6.8
3.6
7.1
10.8
VT–
5.0
10
15
0.9
2.5
4.0
2.8
5.2
7.4
0.9
2.5
4.0
1.9
3.9
5.8
2.8
5.2
7.4
0.9
2.5
4.0
2.8
5.2
7.4
Vin = 0 or VDD
Output Drive Current
(VOH = 2.5 Vdc)
(VOH = 4.6 Vdc)
(VOH = 9.5 Vdc)
(VOH = 13.5 Vdc)
(VOL = 0.4 Vdc)
(VOL = 0.5 Vdc)
(VOL = 1.5 Vdc)
IOH
Source
Sink
Total Supply Current**†
(Dynamic plus Quiescent,
Per Package)
(CL = 50 pF on all outputs, all
buffers switching)
Negative–Going
mAdc
IT = (1.2 µA/kHz) f + IDD
IT = (2.4 µA/kHz) f + IDD
IT = (3.6 µA/kHz) f + IDD
µAdc
Vdc
Vdc
Vdc
#Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
** The formulas given are for the typical characteristics only at 25_C.
†To calculate total supply current at loads other than 50 pF:
IT(CL) = IT(50 pF) + (CL – 50) Vfk
where: IT is in µA (per package), CL in pF, V = (VDD – VSS) in volts, f in kHz is input frequency, and k = 0.004.
MC14093B
2
MOTOROLA CMOS LOGIC DATA
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ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_C)
Characteristic
Symbol
VDD
Vdc
Min
Typ #
Max
Unit
Output Rise Time
tTLH
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
Output Fall Time
tTHL
5.0
10
15
—
—
—
100
50
40
200
100
80
ns
tPLH, tPHL
5.0
10
15
—
—
—
125
50
40
250
100
80
ns
Propagation Delay Time
#Data labeled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
VDD
20 ns
14
PULSE
GENERATOR
INPUT
OUTPUT
20 ns
VDD
90%
50%
10%
tPHL
INPUT
7
VSS
CL
OUTPUT
tPLH
90%
50%
10%
tTHL
VSS
VOH
VOL
tTLH
Figure 1. Switching Time Test Circuit and Waveforms
VH
VH
VDD
VDD
Vin
Vin
VSS
VSS
VDD
VDD
Vout
Vout
VSS
(a) Schmitt Triggers will square up
(a) inputs with slow rise and fall times.
VSS
(b) A Schmitt trigger offers maximum
(b) noise immunity in gate applications.
Figure 2. Typical Schmitt Trigger Applications
MOTOROLA CMOS LOGIC DATA
MC14093B
3
14
14
IOH
Vout
All unused inputs
connected to ground.
7
All unused inputs
connected to ground.
VGS
10
c
b
VGS = – 5.0 Vdc
– 2.0
a
b
b
– 4.0
a
TA = – 55°C
TA = + 25°C
TA = + 125°C
c
– 6.0
– 10 Vdc
b
– 8.0
c
– 8.0
– 15 Vdc
b
a
– 10
– 10
– 6.0
– 4.0
VDS, DRAIN VOLTAGE (Vdc)
a
b c
15 Vdc
a
8.0
VGS = 10 Vdc
b
c
6.0
a
b
c
4.0
TA = – 55°C
TA = + 25°C
TA = + 125°C
a
2.0
b
5.0 Vdc
c
a
– 2.0
0
Figure 3. Typical Output Source
Characteristics Test Circuit
0
0
2.0
4.0
6.0
VDS, DRAIN VOLTAGE (Vdc)
8.0
10
Figure 4. Typical Output Sink
Characteristics Test Circuit
VDD
PIN ASSIGNMENT
Vout , OUTPUT VOLTAGE (Vdc)
0
Vout
7
IOL , DRAIN CURRENT (mAdc)
IOH, DRAIN CURRENT (mAdc)
0
IOL
VGS
0
VT–
VT+
VH
Vin, INPUT VOLTAGE (Vdc)
IN 1A
1
14
VDD
IN 2A
2
13
IN 2D
OUTA
3
12
IN 1D
OUTB
4
11
OUTD
IN 1B
5
10
OUTC
IN 2B
6
9
IN 2C
VSS
7
8
IN 1C
VDD
Figure 5. Typical Transfer Characteristics
MC14093B
4
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 632–08
ISSUE Y
–A–
14
9
1
7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
–B–
C
–T–
L
K
SEATING
PLANE
F
G
D
N
M
J
14 PL
0.25 (0.010)
M
T A
S
14 PL
0.25 (0.010)
M
T B
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
ISSUE L
14
8
1
7
B
A
F
L
C
J
N
H
G
D
SEATING
PLANE
MOTOROLA CMOS LOGIC DATA
K
M
S
DIM
A
B
C
D
F
G
J
K
L
M
N
INCHES
MIN
MAX
0.750
0.785
0.245
0.280
0.155
0.200
0.015
0.020
0.055
0.065
0.100 BSC
0.008
0.015
0.125
0.170
0.300 BSC
0_
15_
0.020
0.040
MILLIMETERS
MIN
MAX
19.05
19.94
6.23
7.11
3.94
5.08
0.39
0.50
1.40
1.65
2.54 BSC
0.21
0.38
3.18
4.31
7.62 BSC
0_
15_
0.51
1.01
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
DIM
A
B
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.300 BSC
0_
10_
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
19.56
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.62 BSC
0_
10_
0.39
1.01
MC14093B
5
OUTLINE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A–03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
–A–
14
8
–B–
1
P 7 PL
0.25 (0.010)
7
G
M
F
–T–
M
K
D 14 PL
0.25 (0.010)
M
T B
S
M
R X 45 _
C
SEATING
PLANE
B
A
S
J
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.228
0.244
0.010
0.019
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: [email protected] – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
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