ONSEMI NUD3124DMT1

NUD3124
Automotive Inductive Load
Driver
This MicroIntegration part provides a single component solution
to switch inductive loads such as relays, solenoids, and small DC
motors without the need of a free−wheeling diode. It accepts logic
level inputs, thus allowing it to be driven by a large variety of devices
including logic gates, inverters, and microcontrollers.
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Features
• Provides Robust Interface between D.C. Relay Coils and Sensitive
•
•
•
•
•
MARKING DIAGRAMS
Logic
Capable of Driving Relay Coils Rated up to 150 mA at 12 Volts
Replaces 3 or 4 Discrete Components for Lower Cost
Internal Zener Eliminates Need for Free−Wheeling Diode
Meets Load Dump and other Automotive Specs
Pb−Free Package is Available
3
JW6 D
1
2
SOT−23
CASE 318
STYLE 21
JW6 = Specific Device Code
D
= Date Code
Typical Applications
• Automotive and Industrial Environment
• Drives Window, Latch, Door, and Antenna Relays
1
Benefits
•
•
•
•
JW6 D
6
SC−74
CASE 318F
STYLE 7
Reduced PCB Space
Standardized Driver for Wide Range of Relays
Simplifies Circuit Design and PCB Layout
Compliance with Automotive Specifications
JW6 = Specific Device Code
D
= Date Code
INTERNAL CIRCUIT DIAGRAMS
Drain (3)
Gate (1)
Gate (2)
10 k
100 K
Drain (3)
Drain (6)
100 K
100 K
Source (2)
Source (4)
Source (1)
CASE 318
Gate (5)
10 k
10 k
CASE 318F
ORDERING INFORMATION
Package
Shipping†
SOT−23
3000/Tape & Reel
NUD3124LT1G
SOT−23
(Pb−Free)
3000/Tape & Reel
NUD3124DMT1
SC−74
3000/Tape & Reel
Device
NUD3124LT1
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
 Semiconductor Components Industries, LLC, 2004
June, 2004 − Rev. 8
1
Publication Order Number:
NUD3124/D
NUD3124
MAXIMUM RATINGS (TJ = 25°C unless otherwise specified)
Symbol
Value
Unit
VDSS
Drain−to−Source Voltage – Continuous
(TJ = 125°C)
28
V
VGSS
Gate−to−Source Voltage – Continuous
(TJ = 125°C)
12
V
ID
Drain Current – Continuous
(TJ = 125°C)
150
mA
EZ
Single Pulse Drain−to−Source Avalanche Energy
(For Relay’s Coils/Inductive Loads of 80 or Higher)
(TJ Initial = 85°C)
250
mJ
PPK
Peak Power Dissipation, Drain−to−Source (Notes 1 and 2)
(TJ Initial = 85°C)
20
W
ELD1
Load Dump Suppressed Pulse, Drain−to−Source (Notes 3 and 4)
(Suppressed Waveform: Vs = 45 V, RSOURCE = 0.5 , T = 200 ms)
(For Relay’s Coils/Inductive Loads of 80 or Higher)
(TJ Initial = 85°C)
80
V
ELD2
Inductive Switching Transient 1, Drain−to−Source
(Waveform: RSOURCE = 10 , T = 2.0 ms)
(For Relay’s Coils/Inductive Loads of 80 or Higher)
(TJ Initial = 85°C)
100
V
ELD3
Inductive Switching Transient 2, Drain−to−Source
(Waveform: RSOURCE = 4.0 , T = 50 s)
(For Relay’s Coils/Inductive Loads of 80 or Higher)
(TJ Initial = 85°C)
300
V
Rev−Bat
Reverse Battery, 10 Minutes (Drain−to−Source)
(For Relay’s Coils/Inductive Loads of 80 or more)
−14
V
Dual−Volt
Dual Voltage Jump Start, 10 Minutes (Drain−to−Source)
28
V
2,000
V
Value
Unit
−40 to 125
°C
ESD
1.
2.
3.
4.
Rating
Human Body Model (HBM)
According to EIA/JESD22/A114 Specification
Nonrepetitive current square pulse 1.0 ms duration.
For different square pulse durations, see Figure 2.
Nonrepetitive load dump suppressed pulse per Figure 3.
For relay’s coils/inductive loads higher than 80 , see Figure 4.
THERMAL CHARACTERISTICS
Symbol
Rating
TA
Operating Ambient Temperature
TJ
Maximum Junction Temperature
TSTG
Storage Temperature Range
150
°C
−65 to 150
°C
PD
Total Power Dissipation (Note 5)
Derating above 25°C
SOT−23
225
1.8
mW
mW/°C
PD
Total Power Dissipation (Note 5)
Derating above 25°C
SC−74
380
3.0
mW
mW/°C
SOT−23
SC−74
556
329
°C/W
RJA
Thermal Resistance Junction–to–Ambient (Note 5)
5. Mounted onto minimum pad board.
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2
NUD3124
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Characteristic
Symbol
Min
Typ
Max
Unit
VBRDSS
28
34
38
V
−
−
−
−
−
−
−
−
0.5
1.0
50
80
−
−
−
−
−
−
−
−
60
80
90
110
1.3
1.3
1.8
−
2.0
2.0
−
−
−
−
−
−
−
−
1.4
1.7
0.8
1.1
150
140
200
−
−
−
gFS
−
500
−
mmho
Input Capacitance
(VDS = 12 V, VGS = 0 V, f = 10 kHz)
Ciss
−
32
−
pf
Output Capacitance
(VDS = 12 V, VGS = 0 V, f = 10 kHz)
Coss
−
21
−
pf
Transfer Capacitance
(VDS = 12 V, VGS = 0 V, f = 10 kHz)
Crss
−
8.0
−
pf
tPHL
tPLH
−
−
890
912
−
−
tPHL
tPLH
−
−
324
1280
−
−
tf
tr
−
−
2086
708
−
−
tf
tr
−
−
556
725
−
−
OFF CHARACTERISTICS
Drain to Source Sustaining Voltage
(ID = 10 mA)
Drain to Source Leakage Current
(VDS = 12 V, VGS = 0 V)
(VDS = 12 V, VGS = 0 V, TJ = 125°C)
(VDS = 28 V, VGS = 0 V)
(VDS = 28 V, VGS = 0 V, TJ = 125°C)
IDSS
Gate Body Leakage Current
(VGS = 3.0 V, VDS = 0 V)
(VGS = 3.0 V, VDS = 0 V, TJ = 125°C)
(VGS = 5.0 V, VDS = 0 V)
(VGS = 5.0 V, VDS = 0 V, TJ = 125°C)
IGSS
A
A
ON CHARACTERISTICS
Gate Threshold Voltage
(VGS = VDS, ID = 1.0 mA)
(VGS = VDS, ID = 1.0 mA, TJ = 125°C)
VGS(th)
Drain to Source On−Resistance
(ID = 150 mA, VGS = 3.0 V)
(ID = 150 mA, VGS = 3.0 V, TJ = 125°C)
(ID = 150 mA, VGS = 5.0 V)
(ID = 150 mA, VGS = 5.0 V, TJ = 125°C)
RDS(on)
Output Continuous Current
(VDS = 0.25 V, VGS = 3.0 V)
(VDS = 0.25 V, VGS = 3.0 V, TJ = 125°C)
IDS(on)
Forward Transconductance
(VDS = 12 V, ID = 150 mA)
V
mA
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS
Propagation Delay Times:
High to Low Propagation Delay; Figure 1, (VDS = 12 V, VGS = 3.0 V)
Low to High Propagation Delay; Figure 1, (VDS = 12 V, VGS = 3.0 V)
High to Low Propagation Delay; Figure 1, (VDS = 12 V, VGS = 5.0 V)
Low to High Propagation Delay; Figure 1, (VDS = 12 V, VGS = 5.0 V)
Transition Times:
Fall Time; Figure 1, (VDS = 12 V, VGS = 3.0 V)
Rise Time; Figure 1, (VDS = 12 V, VGS = 3.0 V)
ns
ns
Fall Time; Figure 1, (VDS = 12 V, VGS = 5.0 V)
Rise Time; Figure 1, (VDS = 12 V, VGS = 5.0 V)
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3
NUD3124
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
VIH
Vin
50%
0V
tPHL
tPLH
VOH
90%
Vout
50%
10%
VOL
tr
tf
Figure 1. Switching Waveforms
Ppk, PEAK SURGE POWER (W)
25
20
15
10
5
0
1
10
100
PW, PULSE WIDTH (ms)
Figure 2. Maximum Non−repetitive Surge
Power versus Pulse Width
Load Dump Pulse Not Suppressed:
VR = 13.5 V Nominal ±10%
VS = 60 V Nominal ±10%
T = 300 ms Nominal ±10%
TR = 1 − 10 ms ±10%
Load Dump Pulse Suppressed:
NOTE: Max. Voltage DUT is exposed to is
NOTE: approximately 45 V.
VS = 30 V ±20%
T = 150 ms ±20%
TR
90%
10% of Peak;
Reference = VR, IR
10%
VR, IR
Figure 3. Load Dump Waveform Definition
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4
VS
T
NUD3124
14
IDSS, DRAIN LEAKAGE (A)
VS, LOAD DUMP (VOLTS)
140
120
100
80
60
140
170
200
230
260
290
320 350
VDS = 28 V
8
6
4
2
−25
0
25
50
100
75
RELAY’S COIL ()
TJ, JUNCTION TEMPERATURE (°C)
Figure 4. Load Dump Capability versus
Relay’s Coil dc Resistance
Figure 5. Drain−to−Source Leakage versus
Junction Temperature
125
34.8
BVDSS BREAKDOWN VOLTAGE (V)
80
IGSS GATE LEAKAGE (A)
10
0
−50
40
80 110
12
70
60
VGS = 5 V
50
40
VGS = 3 V
30
20
−50
1
−25
0
25
75
50
100
34.6
34.4
34.2
ID = 10 mA
34.0
33.8
33.6
33.4
−50
125
−25
25
0
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 6. Gate−to−Source Leakage versus
Junction Temperature
Figure 7. Breakdown Voltage versus Junction
Temperature
1
VGS = 5 V
VDS = 0.8 V
0.01
VGS = 3 V
VGS = 2.5 V
ID DRAIN CURRENT (A)
ID DRAIN CURRENT (A)
0.1
VGS = 2 V
1E−04
125 °C
0.01
0.001
85 °C
1E−04
1E−06
1E−08
25 °C
1E−05
VGS = 1 V
−40 °C
1E−06
1E−10
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
1E−07
0.5
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
1.0
1.5
2.0
2.5
3.0
3.5
4.0
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 8. Output Characteristics
Figure 9. Transfer Function
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5
4.5
5.0
1800
ID = 0.25 A
VGS = 3.0 V
1600
1400
1200
ID = 0.15 A
VGS = 3.0 V
1000
800
ID = 0.15 A
VGS = 5.0 V
600
400
−50
−25
0
25
50
100
75
125
TJ, JUNCTION TEMPERATURE (°C)
Figure 10. On Resistance Variation versus
Junction Temperature
RDS(ON), DRAIN−TO−SOURCE RESISTANCE ()
RDS(ON), DRAIN−TO−SOURCE RESISTANCE (m)
NUD3124
0.20
0.18
ID = 250 A
0.16
0.14
0.12
125 °C
0.10
85 °C
25 °C
−40 °C
0.08
0.06
0.04
0.02
0.00
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 11. On Resistance Variation versus
Gate−to−Source Voltage
VZ ZENER CLAMP VOLTAGE (V)
36.0
35.5
35.0
34.5
34.0
−40 °C
25 °C
85 °C
33.5
33.0
125 °C
32.5
32.0
0.1
1.0
10
100
1000
IZ, ZENER CURRENT (mA)
Figure 12. Zener Clamp Voltage versus Zener
Current
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1.0
D = 0.5
0.2
0.1
0.1
0.05
Pd(pk)
0.02
0.01
0.01
0.001
0.01
PW
t1
t2
DUTY CYCLE = t1/t2
SINGLE PULSE
0.1
PERIOD
1.0
10
100
1000
10,000
t1, PULSE WIDTH (ms)
Figure 13. Transient Thermal Response for NUD3124LT1
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6
100,000
1,000,000
NUD3124
APPLICATIONS INFORMATION
12 V Battery
−
+
NC
NO
Relay, Vibrator,
or
Inductive Load
Drain (3)
Gate (1)
Micro
Processor
Signal
for
Relay
10 k
100 K
NUD3124
Source (2)
Figure 14. Applications Diagram
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7
NUD3124
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AH
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
4. 318−03 AND −07 OBSOLETE, NEW STANDARD
318−08.
A
L
3
1
V
B S
2
DIM
A
B
C
D
G
H
J
K
L
S
V
G
C
D
H
K
J
INCHES
MIN
MAX
0.1102 0.1197
0.0472 0.0551
0.0350 0.0440
0.0150 0.0200
0.0701 0.0807
0.0005 0.0040
0.0034 0.0070
0.0140 0.0285
0.0350 0.0401
0.0830 0.1039
0.0177 0.0236
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
0.8
0.031
SCALE 10:1
mm inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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8
MILLIMETERS
MIN
MAX
2.80
3.04
1.20
1.40
0.89
1.11
0.37
0.50
1.78
2.04
0.013
0.100
0.085
0.177
0.35
0.69
0.89
1.02
2.10
2.64
0.45
0.60
NUD3124
PACKAGE DIMENSIONS
SC−74
CASE 318F−05
ISSUE K
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES
LEAD FINISH THICKNESS. MINIMUM
LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. 318F−01, −02, −03 OBSOLETE. NEW
STANDARD 318F−04.
A
L
6
5
4
2
3
B
S
1
DIM
A
B
C
D
G
H
J
K
L
M
S
D
G
M
J
C
0.05 (0.002)
K
H
INCHES
MIN
MAX
0.1142 0.1220
0.0512 0.0669
0.0354 0.0433
0.0098 0.0197
0.0335 0.0413
0.0005 0.0040
0.0040 0.0102
0.0079 0.0236
0.0493 0.0649
0
10 0.0985 0.1181
STYLE 7:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
RECOMMENDED FOOTPRINT
2.4
0.094
0.95
0.037
1.9
0.074
0.95
0.037
0.7
0.028
1.0
0.039
SCALE 10:1
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9
mm inches
MILLIMETERS
MIN
MAX
2.90
3.10
1.30
1.70
0.90
1.10
0.25
0.50
0.85
1.05
0.013
0.100
0.10
0.26
0.20
0.60
1.25
1.65
0
10 2.50
3.00
NUD3124
MicroIntegration is a trademark of Semiconductor Components Industries, LLC (SCILLC)
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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10
For additional information, please contact your
local Sales Representative.
NUD3124/D