GF6968AD N-Channel Enhancement-Mode MOSFET Die VDS 20V RDS(ON) 30mΩ ID 6.0A H C N TRENFET oduct GE New Pr TM Chip Geometry Gate Source D G Physical Characteristics • Die size : 1800 X 1120µm (70.9 X 44.1 mils) • Metalization: Top: Al/Si/Cu Back: Ti/Ni/Ag • Metal Thickness: Top: 3.0µm Back: 1.4µm • Die thickness: 9 - 13 mils • Bonding Area: Source: Full metalized surface of source region Gate: 181 x 181µm • Recommended Wire Bonding: Source: 2 mil ∅ Au wire (3 or more wires preferred) Gate: 2 mil ∅ Au wire S Features • Advanced Trench Process Technology • High Density Cell Design for Ultra Low On-Resistance • Fast Switching • High temperature soldering in accordance with CECC802/Reflow guaranteed • Logic Level • Ideal for Li ion battery pack applications Note: More source wires can further improve performance Maximum Ratings and Thermal Characteristics (T Parameter A = 25°C unless otherwise noted) Symbol Limit Drain-Source Voltage VDS 20 Gate-Source Voltage VGS ± 10 ID 6.0 4.8 IDM 20 Continuous Source Current (Diode Conduction)(1) IS 1.7 TA = 25°C TA = 70°C PD 2.0 1.3 W TJ, Tstg –55 to 150 °C RθJA 62.5 °C/W TA = 25°C TA = 70°C Continuous Drain Current TJ = 150°C(1) Pulsed Drain Current Maximum Power Dissipation(1) Operating Junction and Storage Temperature Range (1) Maximum Junction-to-Ambient Thermal Resistance Unit V A Note: Maximum ratings are based on die packaged in a SO-8 Dual package. Actual rating can increase (or decrease), depending on actual assembly method used 5/23/01 GF6968AD N-Channel Enhancement-Mode MOSFET Die Electrical Characteristics (T Parameter J = 25°C unless otherwise noted) Symbol Test Condition Min Typ Max Unit Drain-Source Breakdown Voltage BVDSS VGS = 0V, ID = 250µA 20 – – V Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 0.5 – – V Gate-Body Leakage IGSS VDS = 0V, VGS = ± 8V – – ± 100 nA Zero Gate Voltage Drain Current IDSS VDS = 20V, VGS = 0V – – 1 VDS=20V, VGS=0V, TJ=55°C – – 5 VDS ≥ 5V, VGS = 4.5V 20 – – VGS = 4.5V, ID = 6A – 22 30 VGS = 2.5V, ID = 5.2A – 28 40 VDS = 10V, ID = 6A – 24 – – 13 40 – 2.2 – – 3 – – 11 60 – 15 140 – 43 140 – 22 60 Static On-State Drain Current(2) ID(on) Drain-Source On-State Resistance(2) RDS(on) Forward Transconductance(2) gfs µA A mΩ S Dynamic Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Turn-On Delay Time td(on) Rise Time tr Turn-Off Delay Time td(off) Fall Time VDS = 10V, VGS = 4.5V ID = 6A VDD = 10V, RL = 10Ω ID ≈ 1A, VGEN = 4.5V RG = 6Ω tf nC ns Input Capacitance Ciss VGS = 0V – 1240 – Output Capacitance Coss VDS = 10V – 200 – Reverse Transfer Capacitance Crss f = 1.0MHZ – 120 – VSD IS = 1.7A, VGS = 0V – 0.7 1.3 V trr IF = 1.7A, di/dt = 100A/µs – – 100 ns pF Source-Drain Diode Diode Forward Voltage(2) Source-Drain Reverse Recovery Time Notes: (1) Surface mounted on FR4 board, t ≤ 10 sec. (2) Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2% ton VDD td(on) RD VIN toff tr td(off) tf 90 % 90% VOUT D Output, VOUT 10% 10% VGEN INVERTED RG DUT 90% G 50% Input, VIN 50% 10% S Switching Test Circuit Switching Waveforms PULSE WIDTH GF6968AD N-Channel Enhancement-Mode MOSFET Die Ratings and Characteristic Curves (T A = 25°C unless otherwise noted) Fig. 2 – Transfer Characteristics Fig. 1 – Output Characteristics 4.5V 3.5V 20 VGS = 2.5V VDS = 10V 3.0V 2.0V 16 16 ID -- Drain Current (A) ID -- Drain Source Current (A) 20 12 8 1.5V 4 TJ = 125°C --55°C 25°C 0 0 0.5 1 1.5 2 2.5 3.0 3.5 0 0.5 1 1.5 2 2.5 VDS -- Drain-to-Source Voltage (V) VGS -- Gate-to-Source Voltage (V) Fig. 3 – Threshold Voltage vs. Temperature Fig. 4 – On-Resistance vs. Drain Current 1 3 0.04 ID = 250µA 0.9 RDS(ON) -- On-Resistance (Ω) VGS(th) -- Gate-to-Source Threshold Voltage (V) 8 4 0 0.8 0.7 0.6 0.5 0.4 0.3 --25 0 25 50 75 100 125 150 TJ -- Junction Temperature (°C) VGS = 2.5V 0.03 0.025 4.5V 0.02 0.015 1.6 VGS = 4.5V ID = 6A 1.4 1.2 1 0.8 0.6 --25 0 25 50 75 100 TJ -- Junction Temperature (°C) 0 4 8 12 ID -- Drain Current (A) Fig. 5 – On-Resistance vs. Junction Temperature --50 0.035 0.01 0.2 --50 RDS(ON) -- On-Resistance (Normalized) 12 125 150 16 20 GF6968AD N-Channel Enhancement-Mode MOSFET Die Ratings and Characteristic Curves (T A = 25°C unless otherwise noted) Fig. 6 – On-Resistance vs. Gate-to-Source Voltage Fig. 7 – Gate Charge 5 0.08 VGS -- Gate-to-Source Voltage (V) RDS(ON) -- On-Resistance (Ω) ID = 6A 0.06 0.04 TJ = 125°C 0.02 25°C 0 VDS = 10V ID = 6A 4 3 2 1 0 1 2 3 4 5 0 2 4 6 8 10 12 14 VGS -- Gate-to-Source Voltage (V) Qg -- Gate Charge (nC) Fig. 8 – Capacitance Fig. 9 – Source-Drain Diode Forward Voltage 1800 16 100 f = 1MHZ VGS = 0V VGS = 0V Ciss IS -- Source Current (A) C -- Capacitance (pF) 1500 1200 900 600 TJ = 125°C 1 25°C --55°C 0.1 Coss 300 0 10 Crss 0 4 0.01 8 12 16 VDS -- Drain-to-Source Voltage (V) 20 0 0.2 0.4 0.6 0.8 1 VSD -- Source-to-Drain Voltage (V) 1.2 1.4 GF6968AD N-Channel Enhancement-Mode MOSFET Die Ratings and Characteristic Curves (T A = 25°C unless otherwise noted) Fig. 10 – Breakdown Voltage vs. Junction Temperature Fig. 11 – Thermal Impedance 1 31 D = 0.5 RΘJA (norm) -- Normalized Thermal Impedance BVDSS -- Drain-to-Source Breakdown Voltage (V) ID = 250µA 30 29 28 27 --50 --25 0 25 50 75 100 125 0.2 0.1 0.1 PDM 0.05 0.02 t1 t2 0.01 0.01 Single Pulse 0.001 0.0001 0.001 150 TJ -- Junction Temperature (°C) Fig. 12 – Power vs. Pulse Duration 1 10 100 Fig. 13 – Maximum Safe Operating Area 100 Single Pulse RθJA = 82°C/W TA = 25°C 100µs ID -- Drain Current (A) 40 Power (W) 0.1 Pulse Duration (sec.) 50 30 20 10 10 10 RDS(ON) Limit ms 0m 1s 1 1ms s 10s 0.1 10 0 0.01 0.01 1. Duty Cycle, D = t1/t2 2. RθJA (t) = RθJA(norm) *RθJA 3. RθJA = 82°C/W (on 1-in2 2 oz. Cu. FR-4) 4. TJ - TA = PDM * RθJA (t) VGS = 4.5V Single Pulse on 1-in2 2oz Cu. TA = 25°C DC 0.01 0.1 1 Pulse Duration (sec.) 10 100 0.1 1 10 VDS -- Drain-Source Voltage (V) 100