LCP02-150M ® A.S.D.™ PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR RINGING SLICS FEATURES Protection IC recommended for ringing SLICs. Wide firing voltage range: from -110V to +95V. Low gate triggering current Peak pulse current: IPP = 100A (10/1000µs) . Holding current: IH = 150mA min. High power dissipation capability UL497B approved (file E136224) ■ ■ ■ ■ ■ ■ ■ MAIN APPLICATIONS Dual battery supply voltage SLICs - negative battery supply configuration - negative & positive battery supply configuration Central Office (CO) Private Branch Exchange (PBX) Digital Loop Carrier (DLC) Asymmetrical Digital Subscriber Line (ADSL) Fiber in the Loop (FITL) Wireless Local Loop (WLL) Hybrid Fiber Coax (HFC) ISDN Terminal Adapter Cable modem PowerS0-10™ ■ ■ FUNCTIONAL DIAGRAM ■ TIP ■ ■ ■ ■ ■ Gp Gn ■ ■ GND DESCRIPTION The LCP02-150M has been developed to protect SLICs operating on both negative and positive supplies, as well as on high voltage SLICs. It provides crowbar mode protection for both TIP and RING lines. Surge suppression is assumed for each wire by two thyristor structures, one dedicated to positive surges, the second one to negative surges. Both positive and negative threshold levels are programmable by two gates (Gn and Gp). The use of transistors decreases the battery currents during surge suppression. The LCP02-150M has high Bellcore Core, ITU-T and FCC Part 68 lightning surge ratings, ensuring rugged performance in the field. The choice of the PowerSo-10TM package is driven by its high power dissipation capability. In addition, the LCP02-150M is also specified to assist a designer to comply with UL1950, IEC950 and CSA C22.2. It is UL 497B approved (file E136224), and has UL94-V0 resin approved RING PIN-OUT CONFIGURATION GND Gp Gn TIP RING TIP RING TIP RING TIP RING GND TM: ASD is trademarks of STMicroelectronics. May 2003 - Ed: 4B 1/9 LCP02-150M ELECTRICAL CHARACTERISTICS (Tamb = 25°C) Symbol Parameter IH IGP Positive gate triggering current IGN Negative gate triggering current IH Holding current IRG Reverse leakage current GATE / LINE IRM Reverse leakage current VRM Reverse voltage LINE/ GND VDGL Dynamic switching voltage GATE / LINE VGATE GATE / GND voltage VRG C VGN VRM IRM IRM VRM VGP IH Reverse voltage GATE / LINE Capacitance LINE / GND COMPLIES WITH FOLLOWING STANDARDS 2/9 Peak surge voltage (V) Voltage waveform (µs) Required Current Minimum serial peak current waveform resistor to meet (A) (µs) standard ( ) ITU-T K20 6000 1500 10/700 10/700 150 37.5 5/310 5/310 - ITU-T K21 6000 1500 10/700 10/700 150 37.5 5/310 5/310 - VDE0433 2000 10/700 50 5/310 - VDE0878 2000 1.2/50 50 1/20 - IEC61000-4-5 level 4 level 4 10/700 1.2/50 100 100 5/310 8/20 - FCC Part 68 lightning surge type A 1500 800 10/160 10/560 200 100 10/160 10/560 - FCC Part 68 lightning surge type B 1000 9/720 25 5/320 - BELLCORE GR-1089-CORE First level 2500 1000 2/10 10/1000 500 100 2/10 10/1000 - BELLCORE GR-1089-CORE Second level 5000 2/10 500 2/10 - LCP02-150M ABSOLUTE RATINGS (Tamb = 25 °C) Symbol Parameter Value Unit IPP Peak pulse current 10/1000µs 8/20µs 10/560µs 5/310µs 10/160µs 1/20µs 2/10µs 100 250 120 150 200 250 500 A ITSM Non repetitive surge peak on-state current (sinusoidal) t = 0.2 s t = 1s t = 15 min 13 10 3.5 A See fig.1 -110 to 0 0 to +95 190 V -20 to +85 °C - 55 to + 150 °C 260 °C VGN max Maximum negative battery voltage range VGP max Maximum positive battery voltage range ∆ Vbat max Total battery supply voltage Top Operating temperature range (see note 1) Tstg Storage temperature range TL Maximum lead temperature for soldering during 10s Note 1: Within the Top range, the LCP02-150M keeps on operating. The impacts of the ambient temperature are given by derating curves. Fig. 1: Test circuit TIP Gp from +0V to +95V Gp TIP TIP TIP TIP GND GND ∆ Vbat ≤ 190V Gn RING RING RING RING Gn from -110V to +0V RING Gn connected to negative supply voltage Gp connected to positive supply voltage ∆ Vbat: differential voltage between VGn and VGp THERMAL RESISTANCE Symbol Rth (j-a) Parameter Junction to ambient Value Unit 60 °C/W 3/9 LCP02-150M ELECTRICAL CHARACTERISTICS (Tamb = 25°C) 1 - PARAMETERS RELATED TO THE NEGATIVE SUPPRESSOR Symbol Test conditions Min. Max. Unit 5 mA IGn VGn/GND = -60V Measured at 50Hz IH- Go-No Go test, VGn = -60V IRGL- Tj = 25°C, VGn/line = -190V 5 µA VDGL- VGn/GND = -60V 10/1000µs 1kV RP = 25Ω IPP = 30A 10/700µs 2kV RP = 25Ω IPP = 30A 1.2/50µs 2kV RP = 25Ω IPP = 30A 10 6 12 V Max. Unit VGp/GND = 60V Measured at 50Hz 10 mA IRGL+ Tj = 25°C, VGp/line = +190V 5 µA VDGL+ VGp/GND = +60V 10/1000µs 1kV RP = 25Ω IPP = 30A 10/700µs 2kV RP = 25Ω IPP = 30A 1.2/50µs 2kV RP = 25Ω IPP = 30A 12 8 18 V Max. Unit 5 5 µA 150 mA 2 - PARAMETERS RELATED TO THE POSITIVE SUPPRESSOR Symbol IGp Test conditions Min. 3 - PARAMETERS RELATED TO LINE/GND Symbol IR Coff 4/9 Test conditions Typ. Tj = 25°C, VLINE = +90V, VGP/LINE = +1V Tj = 25°C, VLINE = -105V, VGN/LINE = -1V VR = -3V, F =1MHz, VGp = 60V, VGn = -60V 150 pF LCP02-150M Fig. 2: Non repetitive surge peak on state current versus overload duration (Tj initial = 25°C). Fig. 3: Relative variation of holding current versus junction temperature. ITSM(A) 25 IH(Tj)/IH[Tj=25°C] F=50Hz Tj initial=25C 2 20 1.5 15 1 10 0.5 5 T(°C) 0 t(s) 0 0.01 -20 0.1 1 10 100 0 20 40 60 80 100 1000 Fig. 4: Variation of junction capacitance versus reverse voltage applied (typical calues) with: VGN = -90V and V GP = +90V. C(pF) 200 180 160 140 120 100 Vline (V) 80 1 10 Line - 100 Line + 5/9 LCP02-150M TECHNICAL INFORMATION Fig. 5: LCP02 concept behavior. Rs1 L1 TIP Ign GND -Vbat T1 Th1 Igp Th2 Gn Gp +Vb Cp Cn Rs2 V Tip T2 RING GND L2 V Ring Figure 5 shows the classical protection circuit using the LCP02-150M crowbar concept. This topology has been developped to protect the new two-battery voltage SLICs. It allows both positive and negative firing thresholds to be programmed. The LCP02-150M has two gates (Gn and Gp). Gn is biased to negative battery voltage -Vbat, while Gp is biased to the positive battery voltage +Vb. When a negative surge occurs on one wire (L1 for example), a current Ign flows through the base of the transistor T1 and then injects a current in the gate of the thyristor Th1 which fires. The entire surge current flows through the ground. After the surge, when the current flowing through Th1 becomes less negative than the negative holding current, Th1 switches off. This holding current IH- is temperature dependant as per figure 2. When a positive surge occurs on one wire (L1 for example), a current Igp flows through the base of the transistor T2 and then injects a current in the gate of the thyristor Th2 which fires. The entire surge current flows through the ground. After the surge, when the current flowing through Th2 becomes less positive than the positive holding current Ih+, Th2 switches off. This holding current IH+ is temperature dependant and is equal to 30mA at 25°C. The capacitors Cn and Cp are used to speed up the crowbar structure firing during the fast surge rise or falling edges. This allows to minimize the dynamical breakover voltage at the SLIC Tip and Ring inputs during fast surges. Please note that these capacitors are generally available around the SLIC. To be efficient they have to be as close as possible to the LCP02-150M gate pins (Gn and Gp) and to the reference ground track (or plan). The optimized value for Cn and Cp is 220nF. The series resistors Rs1 and Rs2 represent the fuse, fuse resistors or the PTCs which are needed to withstand the power contact or the power induction tests imposed by the country standards. Taking this factor into account, the actual lightning surge current flowing through the LCP02-150M is equal to : I surge = Vsurge / (Rg + Rs) With V surge = peak surge voltage imposed by the standard. Rg = series resistor of the surge generator Rs = series resistor of the line card (e.g. PTC) The LCP02-150M topology is particularly optimized for the new telecom applications such as cable modem, fiber in the loop, WLL systems, and decentralized central office for example. The schematics of figures 6 and 7 give the 2 most frequent topologies used for these emergent applications. 6/9 LCP02-150M Fig. 6: Protection of SLIC with positive and negative battery voltages. Line card -Vbat Rs (*) TIP Gn Line LCP02 220nF GND TIP Gp SLIC 220nF RING Rs (*) RING +Vb Rs (*) = PTC or Resistor fuse Fig. 7: Protection of high voltage SLIC Line card -Vbat Rs (*) TIP Gn Line 220nF GND TIP LCP02 RING Gp SLIC Rs (*) RING Rs (*) = PTC or Resistor fuse Figure 6 shows the classical protection topology for SLIC using both positive and negative battery voltages. With such a protection the SLIC is protected against surge over +Vb and lower than -Vbat. In this case, +Vb can be programmed up to +95V while -Vbat can be programmed down to -110V. Please note that the differential voltage does not exceed ∆Vbat max at 190V. Figure 7 gives the protection topology for the new SLIC using high negative voltage down to -110V. 7/9 LCP02-150M PACKAGE MECHANICAL DATA PowerSO-10™ (Plastic) DIMENSIONS REF. B Min. 0.10 A B 10 H 6 E E3 E1 E2 5 1 SEATING PLANE e B A DETAIL "A" C 0.25 M h Q D D1 A F SEATING PLANE A1 A1 L DETAIL "A" a E4 FOOTPRINT DIMENSIONS (in millimeters) 0.54 - 0.60 0.67 - 0.73 9.5 8/9 10.8 - 11.0 6.30 14.6 - 14.9 1.27 Millimeters A A1 B C D D1 E E1 E2 E3 E4 e F H h L Q a Max. 3.35 3.65 0.00 0.10 0.40 0.60 0.35 0.55 9.40 9.60 7.40 7.60 9.30 9.50 7.20 7.40 7.20 7.60 6.10 6.35 5.90 6.10 1.27 Typ. 1.25 1.35 13.80 14.40 0.5 Typ. 1.20 1.80 1.70 Typ 0° 8° Inches Min. Max. 0.131 0.143 0.00 0.0039 0.0157 0.0236 0.0137 0.0217 0.370 0.378 0.291 0.299 0.366 0.374 0.283 0.291 0.283 0.299 0.240 0.250 0.232 0.240 0.05 Typ. 0.0492 0.0531 0.543 0.567 0.019 Typ. 0.0472 0.0708 0.067 Typ. 0° 8° LCP02-150M ORDER CODE Ordering Type Marking Package Weight Base qty Delivery mode LCP02-150M LCP02-150M PowerSO-10 1.02 g 50 Tube 600 Tape & Reel LCP02-150M-TR Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All rights reserved. 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