CLP270M ® Application Specific Discretes A.S.D. OVERVOLTAGE AND OVERCURRENT PROTECTION FOR TELECOM LINE PRELIMINARY DATASHEET MAIN APPLICATIONS Any telecom equipment submitted to transient overvoltages and lightning strikes such as : Analog and ISDN line cards PABX Main Distribution Frames Primary protection modules ■ ■ ■ ■ DESCRIPTION The CLP270M is designed to protect telecommunication equipment. It provides both a transient overvoltage protection and an overcurrent protection. It is housed in a PowerSO-10TM package. FEATURES ■ ■ ■ ■ ■ DUAL BIDIRECTIONAL PROTECTION DEVICE. HIGH PEAK PULSE CURRENT : Ipp = 100A (10/1000 µs SURGE) Ipp = 500A (2/10 µs SURGE) MAX. VOLTAGE AT SWITCHING-ON : 380V MIN. CURRENT AT SWITCHING-OFF : 150mA FAILURE STATUS OUTPUT PIN PowerSO-10TM SCHEMATIC DIAGRAM FS 1 NC TIP S RING S TIP L RING L TIP L RING L TIP L RING L TAB is connected to GND BENEFITS ■ ■ ■ ■ Both primary and secondary protection levels in one device. Voltage and current controlled suppression. Surface Mounting with PowerSO-10TM package. Line card cost reduction thanks to the very low power rating of external components required : balanced resistors, ring relay, low voltage SLIC protection. July 2003 - Ed: 7C 1/24 CLP270M Peak Surge Voltage (V) Voltage Waveform (µs) Current Waveform (µs) Admissible Ipp (A) Necessary Resistor (Ω) ITU K20 6000 10/700 5/310 150 - VDE0433 6000 10/700 5/310 150 - VDE0878 4000 1.2/50 1/20 100 - IEC61000-4-5 6000 4000 10/700 1.2/50 5/310 8/20 150 100 - FCC Part 68, lightning surge type A 1500 800 10/160 10/560 10/160 10/560 200 100 - FCC Part 68, lightning surge type B 100 9/720 5/320 25 - BELLCORE TR-NWT-001089 First level 2500 1000 2/10 10/1000 2/10 10/1000 500 100 - BELLCORE TR-NWT-001089 Second level 5000 2/10 2/10 500 - CNET l31-24 4000 0.5/700 0.8/310 100 - COMPLIES WITH THE FOLLOWING STANDARDS: BLOCK DIAGRAM 270 270 Pin 2/24 Symbol Description Failure Status 1 FS 2 TIPS TIP (SLIC side) 3/4/5 TIPL TIP (Line side) 6/7/8 RINGL RING (Line side) 9 RINGS RING (SLIC side) 10 NC TAB GND Not connected Ground CLP270M APPLICATION NOTE 1. INTRODUCTION This device includes a primary protection level and is suitable for main distribution frames and line cards. This protection concept is explained and, in addition, the CLP270M performances are analysed when Fig. 1: Subscriber line protection topology “PRIMARY PROTECTION” Telecommunication “SECONDARY PROTECTION” CLP270M SLIC line MDF LINE CARD EXCHANGE “SECONDARY PROTECTION” Telecommunication CLP270M line THDTxx or LCP1511D or LCDP1511D SLIC MDF LINE CARD EXCHANGE facing different surges as described in the BELLCORE GR 1089 recommendations. Figure 1 is a simplified block diagram of a subscriber line protection that is commonly used. This shows two different topologies : A “primary protection” located on the Main Distribution Frame (MDF) eliminates coarsely the high energy environmental disturbances (lightning transients and AC power mains disturbances) A “secondary protection” located on the line card includes a primary protection level (first stage) and a residual protection (second stage) which eliminates finely the remaining transients that have not been totally suppressed by the first stage. ■ ■ 2. STMicroelectronics CLP270M CONCEPT 2.1. Evolution of the SLIC protection Over the years, the silicon protection performances have considerably changed. The first generation of products like SMTHBTxx and SMTHDTxx offered fixed overvoltage protection against surges on either TIP or RING line in four Fig. 2: Line card protection packages. The following generation like THBTxx and Programmable I thanks to an THDTxx still offered fixed overvoltage protection Programmable external resistor against surges on both TIP and RING lines in two thanks to any +I SWON packages. external voltage reference The next step was the introduction of the LCP1511D which brought the advantage of full V programmable voltage. Today, the CLP270M combines the features of all -I SWON the previous generations. In addition to that, it offers an overcurrent detection when operating in Line card speech mode and also a Failure Status output operating signal. conditions 3/24 CLP270M The figure 2 summarizes the firing modes of the CLP270M which basically hold the SLIC inside its correct Fig. 3 : CLP270M in line card I Fuse TIP Rsense TIPL -Vbat 1 TIPS Rp Overcurrent detector TIP External voltage reference 2 Overvoltage detector OR Over voltage reference (+/- 270 V) -Vbat (*) SLIC SW3 SW1 FS 1 GND SW4 SW2 Overvoltage detector OR Overvoltage reference (+/- 270 V) Rp RING 2 Overcurrent detector RINGL RINGS Ring Generator Rsense RING Fuse (*) LCP1511D or THDT series or LCDP1511D voltage and current values. 2.2 Application circuit: CLP270M in line card. Figure 3 above shows the topology of a protected analog subscriber line at the exchange side. The CLP270M is connected to the ring relay via two balanced Rp resistors, and to the Subscriber Line Interface Circuit. A second device is located near the SLIC : it can be either a LCP1511D, a THDT series or a LCDP1511D. These two devices are complementary and their functions are explained below : The first stage based on CLP270M manages the high power issued from the external surges. When used in ringing mode, the CLP270M operates in voltage mode and provides a symmetrical and bidirectional overvoltage protection at +/- 270 V on both TIP and RING lines. When used in speech mode, the CLP270M operates in current mode and the activation current of the CLP270M is adjusted by Rsense. The second stage is the external voltage reference device which defines the firing threshold voltage during the speech mode and also assumes a residual power overvoltage suppression. This protection stage can be either a fixed or programmable breakover device. The THDTxx family acts as a fixed breakover device while the LCP1511D or the LCDP1511D operates as a programmable protection. Thanks to this topology, the surge current in the line is reduced after the CLP270M. Because the remaining surge energy is low, the power ratings of Rp, the ring relay contacts and the external voltage reference circuit can be downsized. This results in a significant cost reduction. ■ ■ 4/24 CLP270M Fig. 4: Switching by voltage during ringing mode. Fuse ILG ILG Rsense TIP A1 TIPL 1 TIPS 1/2 CLP270M 2 Rp Overcurrent detector 1 2 OR Overvoltage detector -270 VLG Overvoltage reference (+/- 270 V) +270 V SW3 SW1 3 FS GND 2.3. Ringing mode In ringing mode (Ring relay in position 2), the only protection device involved is the CLP270M. In normal conditions, the CLP270M operates in region 1 of A1 curve, and is idle. If an overvoltage occuring between TIP (or RING) and GND reaches the internal overvoltage reference (+/- 270 V), the CLP270M acts and the line is short-circuited to GND. At this time the operating point moves to region 2 for positive surges (region 3 for negative surges). Once the surge current falls below the switch off current ISWOFF, the device returns to its initial state (region 1). For surges occuring between TIP and RING, the CLP270M acts in the same way. This means that the CLP270M ensures a tripolar protection. When used alone, the CLP270M acts at the internal overvoltage reference level (+/- 270 V). Furthermore, it is possible to adjust this threshold level to a lower voltage by using: Fig. 5a: Method to adjust the reference voltage. 1 Fuse Rsense TIP TIPL Rp TIPS 2 VZ1 Overcurrent detector OR Overvoltage detector Overvoltage reference (+/- 270 V) OR Overvoltage detector Overvoltage reference (+/- 270 V) VZ2 SW3 SW1 FS GND SW4 SW2 VZ3 Overcurrent detector VZ4 RINGS RINGL Rsense RING 1 Rp Fuse 2 5/24 CLP270M Fig. 5b: Method to adjust the reference voltage. 1 Fuse Rsense TIP Rp TIPL TIPS 2 Overcurrent detector VB1 OR Overvoltage detector Overvoltage reference (+/- 270 V) OR Overvoltage detector Overvoltage reference (+/- 270 V) SW3 SW1 FS GND SW4 SW2 VB2 Overcurrent detector RINGL RING RINGS 1 Rp Rsense Fuse 2 Fig. 6: Switching by current during speech mode. Fuse ILG Rsense TIP TIPL ILG A2 1 TIPS -Vbat Rp 5 Overcurrent detector 2 OR Overvoltage detector Overvoltage reference (+/- 270 V) VLG External voltage reference -VREF2 4 VREF1 VLG SW3 SW1 6 FS ■ ■ GND up to 4 fixed external voltage reference (VZ1 to VZ4) (see fig. 5a, here-below). external reference supplies, Vb1 and Vb2 (see fig. 5b, on next page). 2.4. Speech mode In speech mode (Ring relay in position 1), the protection is provided by the combination of both CLP270M and the external voltage reference device. In normal conditions, the working point of this circuit is located in region 4 of A2 curve : the CLP270M is idle. When a surge occurs on the line, the external voltage reference device clamps at GND or -Vbat respectively for positive and negative surges. This generates a current which is detected by Rsense and causes the protection to act : the line is short-circuited to GND. 6/24 CLP270M Fig. 7a and 7b: Switching-on current versus Rsense. ISWON (T, Rsense) / ISWON (25°C, 4 Ω) Iswon @ 25°C (mA) 2 @-20°C @25°C 500 @75°C Iswon min Iswon max Iswon min Iswon max negative negative positive positive 300 1 200 0.5 100 0.3 50 0.2 3 5 7 Rsense (Ω) 9 11 3 5 7 Rsense (Ω) 13 9 11 The operating point moves to region 5 for positive surges or region 6 for negative surges. Once the surge current falls below the switching-off current ISWOFF, the CLP270M returns to its initial state (region 4). The choice of the switching-on currents is function of the Rsense resistors. In normal operating condition the current (typically below -100 mA) should not activate the protection device CLP270M. Therefore the level of activation is to be chosen just above this limit (-200 mA). This level is adjusted through Rsense. Figures 7a and 7b enable the designers to choose the right Rsense value. EXAMPLE : The choice of Rsense = 4 Ω ensures a negative triggering of -190 mA min and -320 mA max. In this case, the positive triggering will be 150mA min and 280 mA max. 2.5. Failure Status The CLP270M has an internal feature that allows the user to get a Failure Status (FS) indication. When the CLP270M is short-circuiting the line to GND, a signal can be managed through pin 1. This signal can be used to turn a LED on in order to provide a surge indication. It may also be used with a logic circuitry to Fig. 8: Failure Status circuit and diagnostic. Rsense Fig. 9 : Operation limits and destruction zone of the CLP270M. 5 000 2 000 1 1 000 500 CLP270M FAILURE STATUS 200 100 1k 50 20 Rsense +12V 10 0.01 0.02 0.05 0.1 0.2 0.5 1 2 5 10 t (ms) count the number of disturbances appearing on the lines. If a surge exceeding the maximum ratings of the CLP270M occurs on the line, the device will fail in a short-circuit state. 7/24 CLP270M The figure 9 shows two different curves : The lower one indicates the maximum guaranted working limits of the CLP270M. ■ Table 1: First level lightning surge. Surge Minimum peak voltage (volts) Minimum Maximum rise peak current / Minimum per conductor decay time for (Amps) voltage and current (µs) 1 +/- 600 100 2 +/- 1000 3 Repetitions, each polarity Test connections per table 4.1 10/1000 25 A 100 10/360 25 A +/- 1000 100 10/1000 25 A 4 +/- 2500 500 2/10 10 B 5 +/- 1000 25 10/360 5 B Repetitions, each polarity Test connections per table 4.1 1 B Table 2: Second level lightning surge. Surge Minimum peak voltage (volts) 1 +/- 5000 Minimum Maximum rise peak current / Minimum per conductor decay time for (Amps) voltage and current (µs) 500 2/10 The upper curve shows the limit above which the CLP270M is completely destructed . In this case, the Fail Diagnostic pin is on. 3. CLP270M TEST RESULTS ACCORDING TO BELLCORE 1089 REQUIREMENTS. ■ 8/24 CLP270M Table 3: First level AC power fault (table 4-7 of GR-1089-CORE issue 2, december 1997). Test Voltage (VRMS) Short circuit current per conductor (Amps) Duration Primary protection Test connections per table 4.1 1 50 0.33 15 minutes Removed A 2 100 0.17 15 minutes Removed A 3 200, 400 and 600 1 (at 600V) 60 1 s application of each voltage Removed A 4 1000 1 60 1s applications Operative protector in place B 5 see figure 4-3 see figure 4-3 60 5s applications Removed see figure 4-3 6 600 0.5 30s Removed A 7 600 2.2 2s Removed A 8 600 3 1s Removed A 9 1000 5 0.5s Operative protector in place B Table 4: Second level AC power fault (table 4-8 of GR-1089-CORE issue 2, december 1997). Test Test for Voltage (VRMS) Short circuit current per conductor (Amps) 1 Secondary contact 120, 277 25 15 minutes A 2 Primary contact 600 60 5 seconds A 3 Short-term fault induction 600 7 5 seconds A 4 Long-term fault induction 100-600 2.2 (at 600 V) 15 minutes A 5 High impedance induction Duration Test connections per table 4.1 15 minutes 9/24 CLP270M Table 5: Test connection (table 4-1 of GR-1089-CORE). Test A B Two-wire interface Four-wire interface 1. Tip to generator, Ring to ground 1. Each lead (T, R, T1, R1) to generator with other three leads grounded 2. Ring to generator, Tip to ground 2. Tip and Ring to generator simultaneously, T1 and R1 to ground 3. Tip to generator, Ring to generator simultaneously 3. T1 and R1 to generator simultaneously, Tip and Ring to ground Tip to generator, Ring to generator simultaneously T, R, T1, R1 to generator simultaneously T E R M S1 Limiting resistance (IF specified) Switch unit under test S2 S3 Voltage Source T E R M S4 Test Table 6: Application of lightning and AC power fault test voltages (table 4-2 of GR-1089-CORE). Test S1 S2 S3 S4 T to generator, R to ground (condition A1 of table 4-1) Closed Open Open Closed R to generator, T to ground (condition A2 of table 4-1) Open Closed Closed Open Closed Open Closed Open T to generator, R to generator simultaneously (condition A3 of table 4-1) 3.1. BELLCORE GR-1089-CORE requirements: Tables 1 and 2 summarize the lighting surges required by the bellcore 1089. 10/24 CLP270M Tables 1 to 6 summarize the surge needs defined by Bellcore regarding both lightning and AC power fault. In case of first level test, the equipment under test shall be operating after the surge. For the second level tests, the equipment under test may be damaged, but no fire or electrical safety hazard may occur. 3.2. First level lightning surge: 3.2.1. ringing mode Fig. 10: Lightning simulation test. 4 I1 Rp Rsense 2/10 µs GENERATOR TIPS TIPL +/- 2.5 kV (500 A) 1/2 CLP270M GND V1 Lightning phenomena are the most common surge causes. The purpose of this test is to check the behavior of the CLP270M against these lightning strikes. Fig. 11: CLP270M response to a positive surge. Fig. 12 : CLP270M response to a negative surge. Figures 11 and 12 show that the remaining overvoltage does not exceed +/- 500 V. The CLP270M Fig. 13: Lightning test in speech mode. 4 I1 Rsense 2/10 µs GENERATOR +/- 5 kV (500 A) 50 Rp TIPL 1/2 CLP270M GND I2 SLIC TIPS -48V V1 V2 LCP1511D 11/24 CLP270M Fig. 14: CLP270M response to a positive surge. Fig. 15: CLP270M reponse to a negative surge. switches on within 250ns and withstands the 500A given by the BELLCORE 2/10µs generator. 3.2.2. Speech mode Figures 14 and 15 give the voltage and current behavior during positive and negative 2.5kV, 2/10µs, 500A surge tests using a LCP1511D as second stage protection device. The firing threshold values are now adjusted to GND and to -Vbat (-48V) by the action of the second stage protection which acts as an external voltage reference. 12/24 CLP270M As shown on these figures, the maximum remaining voltage does not exceed +8.5V for positive surges and -65V for negative surges. Fig. 16: Lightning test in Ringing mode. 4 I1 GENERATOR +/- 5 kV (500 A) Rp Rsense 2/10 µs TIPS TIPL 1/2 CLP270M GND Fig. 17: CLP270M response to a positive surge. V1 Fig. 18: CLP270M response to a negative surge. 3.3. Second level lightning surge 3.3.1. Lightning test in ringing mode 13/24 CLP270M The figures 17 and 18 give the voltage and current behavior during positive and negative 5kV, 2/10µs,500A surge with the CLP270M acting in Ringing mode. Fig. 19: Lightning test in Speech mode. 4 I1 Rsense 2/10 µs GENERATOR +/- 5 kV (500 A) 50 Rp TIPL 1/2 CLP270M GND I2 SLIC TIPS -48V V1 V2 LCP1511D Fig. 20: CLP270M response to a positive surge. Fig. 21: CLP270M response to a negative surge. 3.3.2. Speech mode The figures 20 and 22 give the voltage and current behavior during positive and negative 5kV, 2/10µs,500A surge with the CLP270M acting in speech mode. 14/24 CLP270M The CLP270M withstands the second level lightning surge test without trouble. 3.4. FIRST AND SECOND LEVEL AC POWER FAULT Fig. 22: AC power fault test in Ringing mode. Fig. 23: Example of behavior when facing test 3 (400V, 600Ω). I1 4 Rs Rp Rsense TIPL TIPS 1/2 CLP270M V(RMS) GND V1 50Hz Fig. 25: Example of behavior when facing test 3 (400V, 600Ω). Fig. 24: AC power fault test in Speech mode. I1 4Ω Rs TIPL V(RMS) 50 Hz 50 Ω Rp Rsense 1/2 CLP270M GND SLIC TIPS -48V V2 LCP1511D 3.4.1. Ringing mode The figures 23 and 25 give the voltage and current at the CLP270M terminals in Ringing mode and Speech mode. The CLP270M is able to withstand all the first level AC power fault tests as required in the table 4-7 of GR-1089-CORE standard. For the second level AC power fault tests serial protection as PTC or fuse are needed. All these curves, lightning and AC power fault represent the behavior of the CLP270M in worst case tests, any how the CLP270M withstands all the others surges of the Bellcore GR1098 standard. For the second level AC power fault test, the use of series protection elements (PTC or fuses) are needed. 15/24 CLP270M ABSOLUTE MAXIMUM RATINGS (RSENSE = 4 Ω, and Tamb = 25 °C) Symbol IPP ITSM Parameter Test Conditions Value Unit 10/1000µs (open circuit voltage wave shape 10/1000µs) 100 A 5/310µs (open circuit voltage wave shape 10/700µs) 150 2/10µs (open circuit voltage wave shape) 500 Non repetitive surge peak on-state current (TIP or RING versus Ground) tp = 20 ms 60 A tp = 200 ms 30 A F = 50 Hz tp = 2 s 15 A - 40 to + 150 150 °C Line to GND peak surge current Tstg Tj Storage temperature range Maximum junction temperature TL Maximum lead temperature for soldering during 10 s 260 °C ELECTRICAL CHARACTERISTICS (RSENSE = 4 Ω, and Tamb = 25°C) Symbol Parameter Test Conditions Value Min. ILGL Line to GND leakage current . VLG = 240 V . Measured between TIP (or RING) and GND Vref Overvoltage internal reference . ILG = 1 mA . Measured between TIP (or RING) and GND VSWON Line to GND voltage at SW1 or SW2 switching-on . Measured at 50 Hz between TIPL (or RINGL) and GND ISWOFF Line to GND current at SW1 or SW2 switching-off (negative current) . Refer to test circuit page 17 150 ISWON Line current at SW1 or SW2 switching-on . Positive pulse . Negative pulse 150 190 RING to GND capacitance TIP to GND capacitance TIP to RING capacitance . VRINGL = -1 V . VTIPL = -48 V . VGND = 0 V . F = 1 MHz VRMS = 1V C 16/24 Typ. Max. 10 265 Unit µA V 400 V mA 280 320 180 62 57 mA pF CLP270M TEST CIRCUIT FOR ISWOFF PARAMETER : GO-NO GO TEST R - VP D.U.T. VBAT = - 48 V Surge generator This is a GO-NO GO test which allows to confirm the switch-off (ISWOFF) level in a functional test circuit. TEST PROCEDURE : - Adjust the current level at the ISWOFF value by short circuiting the D.U.T. - Fire the D.U.T. with a surge current : IPP = 10A, 10/1000µs. - The D.U.T. will come back to the OFF-state within a duration of 50ms max. Fig. 26: Typical relative variation of switching-on current (positive or negative) versus RSENSE resistor and junction temperature (see test condition Fig. 28). Fig. 27: Variation of switching-on current versus RSENSE at 25°C. ISWON (T, Rsense) / ISWON (25°C, 4 Ω) Iswon @ 25°C (mA) 2 @-20°C @25°C 500 @75°C Iswon min Iswon max Iswon min Iswon max negative negative positive positive 300 1 200 0.5 100 0.3 0.2 50 3 5 7 Rsense (Ω) 9 11 13 Fig. 28: ISWON MEASUREMENT - Iswon = I1 when the CLP270M switches on (I1 is progressively increased using R) - Both TIP and RING sides of the CLP270M are checked - RL = 10 Ω. R sense RL ± 48 V TIPL I1 TIPS R DUT GND RINGL RINGS 3 5 7 Rsense (Ω) 9 11 Fig. 29: Relative variation of switching-off current versus junction temperature for RSENSE between 3 and 10 Ω. ISWOFF [Tj°C] / ISWOFF [25°C] 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 -40 -20 0 20 40 Tj (°C) 60 80 17/24 CLP270M Fig. 30: Relative variation of switching-off current versus RSENSE (between 3 and 10 Ω). ISWOFF [Rsense] / ISWOFF [4 Ω] Fig. 31: Residual current l1 after the CLP270M. The residual current l1 is defined by its peak value (IP) and its duration (τ) @ IP/2 (see below circuit test). 1.6 1.4 Current surge input 1.2 waveform(µs) IPP(A) 1.0 0.8 Peak cur- waveform t(µs) rent IP (A) 5/310 positive surge 130A negative surge 0.6 0.4 Residual current after the CLP270M 4 6 8 Rsense (Ω) 4.2 1.1 1 0.5 10 -48V R sense R = 50 Ohms SURGE GENERATOR TIPL DUT RINGL Fig. 32: Relative variation of switching-on voltage versus dV/dt with an external resistor of 4 Ω. Vswon/Vref 1.15 1.05 1.1 1.00 1.05 0.95 1 0.90 10 20 50 100 dV/dt(V/us) 18/24 RINGS VREF [Tj°C] / V REF [25°C] 1.10 5 GND Fig. 33: Relative variation of internal reference voltage versus junction temperature (ILG=1mA). 1.2 0.95 I1 TIPS 200 500 1,000 0.85 -40 -20 0 20 Tj (°C) 40 60 CLP270M Fig. 34: Typical junction capacitance (TIPL/GND) versus applied voltage. ITSM(A) C (pF) 220 200 180 160 140 120 100 80 60 40 Fig. 35: Maximum non repetitive surge RMS on state current versus overload duration . 100 90 TIP or RING vs GND 80 F=50Hz Tj initial=25°C 70 60 50 40 30 20 10 0 10 20 30 VR (V) 40 50 60 0 0.01 0.1 1 10 100 1000 t(s) 19/24 CLP270M SOLDERING RECOMMENDATION The soldering process causes considerable thermal stress to a semiconductor component. This has to be minimized to assure a reliable and extended lifetime of the device. The PowerSO-10TM package can be exposed to a maximum temperature of 260°C for 10 seconds. However a proper soldering of the package could be done at 215°C for 3 seconds. Any solder temperature profile should be within these limits. As reflow techniques are most common in surface mounting, typical heating profiles are given in Figure 36, either for mounting on FR4 or on metal-backed boards. For each particular board, the appropriate heat profile has to be adjusted experimentally. The present proposal is just a starting point. In any case, the following precautions have to be considered : - always preheat the device - peak temperature should be at least 30 °C higher than the melting point of the solder alloy chosen - thermal capacity of the base substrate Voids pose a difficult reliability problem for large surface mount devices. Such voids under the package result in poor thermal contact and the high thermal resistance leads to component failures. The PowerSO-10 is designed from scratch to be solely a surface mount package, hence symmetry in the x- and y-axis gives the package excellent weight balance. Moreover, the PowerSO-10 offers the unique possibility to control easily the flatness and quality of the soldering process. Both the top and the bottom soldered edges of the package are accessible for visual inspection (soldering meniscus). Coplanarity between the substrate and the package can be easily verified. The quality of the solder joints is very important for two reasons : (I) poor quality solder joints result directly in poor reliability and (II) solder thickness affects the thermal resistance significantly. Thus a tight control of this parameter results in thermally efficient and reliable solder joints. Fig 36 : Typical reflow soldering heat profile Temperature (o C) 250 245 oC 215oC 200 Soldering Epoxy FR4 board 150 Preheating Cooling 100 Metal-backed board 50 0 0 40 80 120 160 200 Time (s) 20/24 240 280 320 360 CLP270M SUBSTRATES AND MOUNTING INFORMATION The use of epoxy FR4 boards is quite common for surface mounting techniques, however, their poor thermal conduction compromises the otherwise outstanding thermal performance of the PowerSO-10. Some methods to overcome this limitation are discussed below. One possibility to improve the thermal conduction is the use of large heat spreader areas at the copper layer of the PC board. This leads to a reduction of thermal resistance to 35 °C for 6 cm2 of the board heatsink (see fig. 37). Use of copper-filled through holes on conventional FR4 techniques will increase the metallization and decrease thermal resistance accordingly. Using a configuration with 16 holes under the spreader of the package with a pitch of 1.8 mm and a diameter of 0.7 mm, the thermal resistance (junction heatsink) can be reduced to 12°C/W (see fig. 38). Beside the thermal advantage, this solution allows multi-layer boards to be used. However, a drawback of this traditional material prevent its use in very high power, high current circuits. For instance, it is not advisable to surface mount devices with currents greater than 10 A on FR4 boards. A Power Mosfet or Schottky diode in a surface mount power package can handle up to around 50 A if better substrates are used. Fig 37 : Mounting on epoxy FR4 head dissipation by extending the area of the copper layer Copper foil FR4 board Fig 38 : Mounting on epoxy FR4 by using copper-filled through holes for heat transfer Copper foil heatsink FR4 board heat transfer 21/24 CLP270M A new technology available today is IMS - an Insulated Metallic Substrate. This offers greatly enhanced thermal characteristics for surface mount components. IMS is a substrate consisting of three different layers, (I) the base material which is available as an aluminium or a copper plate, (II) a thermal conductive dielectrical layer and (III) a copper foil, which can be etched as a circuit layer. Using this material a thermal resistance of 8°C/W with 40 cm2 of board floating in air is achievable (see fig. 39). If even higher power is to be dissipated an external heatsink could be applied which leads to an Rth(j-a) of 3.5°C/W (see Fig. 40), assuming that Rth (heatsink-air) is equal to Rth (junction-heatsink). This is commonly applied in practice, leading to reasonable heatsink dimensions. Often power devices are defined by considering the maximum junction temperature of the device. In practice , however, this is far from being exploited. A summary of various power management capabilities is made in table 1 based on a reasonable delta T of 70°C junction to air. Fig 39 : Mounting on metal backed board Fig 40 : Mounting on metal backed board with an external heatsink applied Copper foil FR4 board Copper foil Insulation Aluminium Aluminium heatsink The PowerSO-10 concept also represents an attractive alternative to C.O.B. techniques. PowerSO-10 offers devices fully tested at low and high temperature. Mounting is simple - only conventional SMT is required - enabling the users to get rid of bond wire problems and the problem to control the high temperature soft soldering as well. An optimized thermal management is guaranteed through PowerSO-10 as the power chips must in any case be mounted on heat spreaders before being mounted onto the substrate. TABLE 7 : THERMAL IMPEDANCE VERSUS SUBSTRATE PowerSo-10 package mounted on Rth (j-a) P Diss (*) 1.FR4 using the recommended pad-layout 50 °C/W 1.5 W 2.FR4 with heatsink on board (6cm2) 35 °C/W 2.0 W 3.FR4 with copper-filled through holes and external heatsink applied 12 °C/W 5.8 W 4. IMS floating in air (40 cm2) 8 °C/W 8.8 W 3.5 °C/W 20 W 5. IMS with external heatsink applied (*) Based on a delta T of 70 °C junction to air. 22/24 CLP270M PACKAGE MECHANICAL DATA B 0.10 A B 10 H 6 E E3 E1 E2 5 1 SEATING PLANE e B A DETAIL "A" C 0.25 M Q D D1 h A F SEATING PLANE A1 A1 L DETAIL "A" a E4 DIMENSIONS REF. Millimeters Min. Typ. Max. DIMENSIONS Inches Min. Typ. REF. Max. Millimeters Min. Typ. Max. Inches Min. Typ. Max. A 3.35 3.65 0.131 0.143 E3 6.10 6.35 0.240 0.250 A1 0.00 0.10 0.0039 E4 5.90 6.10 0.232 0.240 B 0.40 0.60 0.0157 0.0236 e 0.00 1.27 0.05 C 0.35 0.55 0.0137 0.0217 F 1.25 1.35 0.0492 0.0531 D 9.40 9.60 0.370 0.378 H 7.40 7.60 0.291 0.299 13.8 0 14.4 0.543 0 0.567 D1 E 9.30 9.50 0.366 0.374 h E1 7.20 7.40 0.283 0.291 L E2 7.20 7.60 0.283 0.299 Q 0.50 1.20 0.019 1.80 0.0472 1.70 0.0708 0.067 MARKING Package PowerSO-10 TM Type Marking CLP270M CLP270M Packing Base Quantity Tube 50 Tape and reel 60 23/24 CLP270M ORDER CODE CLP 270 M - TR TR = tape and reel = tube Package : PowerSO-10 Current Limiting Protection Minimum operation voltage FOOT PRINT MOUNTING PAD LAYOUT RECOMMENDED HEADER SHAPE 0.54 - 0.60 10.8 - 11.0 6.30 14.6 - 14.9 1.27 0.67 - 0.73 9.5 Dimensions in millimeters Dimensions in millimeters SHIPPING TUBE DIMENSIONS (mm) C TYP B A B C Length tube 18 12 0,8 532 A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All rights reserved. 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