LCP150S Application Specific Discretes A.S.D. PROGRAMMABLE TRANSIENT VOLTAGE SUPPRESSOR FOR SLIC PROTECTION FEATURES DUAL PROGRAMMABLE TRANSIENT SUPPRESSOR HIGH SURGE CURRENT CAPABILITY. - IPP = 50A, 10/1000 µs. - IPP = 60 A, 5/310 µs. - IPP = 150 A, 2/10 µs. HOLDING CURRENT = 150 mA min. LOW GATE TRIGGERING CURRENT : IGT = 15 mA max. DESCRIPTION SIP 4 This device has been especially designed to protect a subscriber line card interface (SLIC) against transient overvoltage. Positive overloads are clipped with two diodes, while negative surges are suppressed by two protection thyristors, their breakdown voltage being is referencedto the -Vbat. This component presents a very low gate triggering current (I GT) in order to reduce the current consumption on the PC board during the firing phase. SCHEMATIC DIAGRAM COMPLIES WITHTHE FOLLOWING STANDARDS: CCITT - K20 VDE 0433 VDE 0878 FCC part 68 10/700µs 5/310µs 10/700µs 5/200µs 1.2/50µs 1/20µs 2/10µs 2/10µs BELLCORE TR-NWT-001089 : 2/10µs 2/10µs 10/1000µs 10/1000µs CNET 0.5/700µs 0.2/310µs 1kV 25A 2kV 50A 1.5kV 40A 2.5kV 150A(*) CONNECTION DIAGRAM 2.5kV 150A(*) 1kV 50A(*) 1kV 25A (*) with series resistors or PTC. TM: ASD is trademarks of SGS-THOMSON Microelectronics. February 1998 - Ed: 3 1/6 LCP150S ABSOLUTE MAXIMUM RATINGS (Tamb = 25 °C) Symbol Parameter 10/1000 µs 5/320 µs 2/10 µs IPP Peak pulse current (see note 1) ITSM Non repetitivesurge peakon-statecurrent F = 50 Hz IGSM Maximum gate current (half sine wave tp = 10 ms) VMLG VMGL Maximum Voltage LINE/GND Maximum Voltage GATE/LINE tp = 10 ms t=1s Tstg Tj Storage temperature range Maximum operating junction temperature TL Maximum lead temperature for soldering during 10s Note 1: Pulse waveform 10/1000 µs tr = 10 µs 5/320 µs tr = 5 µs 2/10 µs tr = 2 µs, Value Unit 50 60 150 A 25 8 A 2 A - 100 - 80 V - 55 to + 150 150 °C °C 260 °C Value Unit 80 °C/W tp = 1000 µs tp = 320 µs tp = 10 µs % I PP 100 50 0 tr tp t THERMAL RESISTANCE Symbol Rth (j-a) Parameter Junction-to-ambient 2/6 LCP150S ELECTRICAL CHARACTERITICS (Tamb = 25°C, unless otherwise specified) Symbol I Parameter IF IGT Gate Trigger Current IH IR Holding Current Reverse Leakage Current LINE/GND IRG Reverse Leakage Current GATE/LINE VR Reverse Voltage LINE/GND Forward Voltage LINE/GND VF VGT VFP Gate Trigger Voltage VSGL Dynamic Switching Voltage GND/LINE Vgate GATE/GND Voltage VLG LINE/GND Voltage Off State Capacitance LINE/GND C VF V SGL VGL VR IR Peak Forward Voltage LINE/GND IH Ipp 1 - PARAMETERS RELATED TO THE DIODE LINE/GND Symbol Test Conditions Max. Unit VF Square pulse, Tp = 500 µs, IF = 5 A 3 V VFP Ipp = 40 A, 10/1000µs. 15 V 2 - PARAMETERS RELATED TO PROTECTION THYRISTOR Symbol Tests Conditions IGT IH VGND/LINE = -48 V VGATE= -48 V VGT at IGT IRG Tc = 25°C Tc = 70°C VRG = -75 V VRG = -75 V VGATE= -48 V Note 2 VSGL Note 2 Min. Max. Unit 0.2 150 15 mA mA 2.5 V 5 50 - 63 µA µA V Max. Unit 3 - PARAMETERS RELATIVE TO DIODE AND PROTECTION THYRISTOR Symbol Tests Conditions IR Tc = 25°C Tc = 70°C -1 < VGL < -Vbat -1 < VGL < -Vbat C VR = - 3 V VR = - 48 V F < 1MHz F < 1MHz VR = - 85 V VR = - 85 V Min. 5 50 150 80 µA µA pF pF Note 2 : See test circuit for IH and VSGL. 3/6 LCP150S Fig. 1 : Surge peak current versus overload duration (typical values). ITSM(A) 30 Tj initial = 25°C 25 20 15 10 5 t(s) 0 1E-2 1E-1 1E+0 1E+1 1E+2 1E+3 FUNCTIONAL HOLDING CURRENT (IH) TEST CIRCUIT = GO - NOGO TEST. R - Vpp Vbat = - 48V VSGL Ipp = 10A,10/1000 s This is a GO-NOGO Test which allows to confirm the holding current (IH) level in a functional test circuit. This test can be performedif the reference test circuit can’t be implemented. TEST PROCEDURE : 1) Adjust the current level at the IH value by short circuiting the AK of the D.U.T. 2) Fire the D.U.T with a surge Current : Ipp = 10A , 10/1000 µs. 3) The D.U.T will come back to the OFF-State within a duration of 50 ms max. The VSGL is measured just before firing 4/6 LCP150S APPLICATION CIRCUIT Typical SLIC Protection Concept. RING GENERATOR - VBAT PTC LINE A T E S T RING RELAY R E L A Y S LINE B SLIC 220 nF PTC LCP150S THBT200S FUNCTIONAL DESCRIPTION LINE A PROTECTION: - For positive surges versus GND, the diode D1 will conduct. - For negative surges versus GND, the protection device P1 will trigger at a voltage fixed by the -VBAT reference. LINE B PROTECTION: - For surges on Line B, the operating mode is the same , D2 or P2 is activated. A capacitor (C = 220nF) can be added close to the gate of the LCP15xx, in order to speed up the triggering. 5/6 LCP150S MARKING : Logo, Date Code, LCP150S. ORDER CODE LCP 150 S LINE CARD PROTECTION PACKAGE S = SIP4 PLASTIC HOLDING CURRENT : 150 mA PACKAGE MECHANICAL DATA SIP 4 DIMENSIONS REF. Millimetres Inches Min. Typ. Max. Min. Typ. Max. A a1 7.10 2.80 B b1 0.280 0.110 10.15 0.50 0.400 0.020 b2 1.35 1.75 0.053 0.069 c1 e 0.38 0.50 0.015 0.020 e3 I L Z 2.54 0.100 7.62 0.200 10.50 3.30 0.413 0.130 1.50 0.059 PACKAGING : Productssuppliedin antistatic tubes. WEIGHT : 0.55g Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1998 SGS-THOMSON Microelectronics - Printed in Italy - All rights reserved. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 6/6