STMICROELECTRONICS LM224ADT

LM224A - LM324A
Low Power Quad Operational Amplifiers
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Wide gain bandwidth: 1.3MHz
Large voltage gain: 100dB
Very low supply current/ampli: 375µA
Low input bias current: 20nA
Low input offset voltage: 3mV max.
Low input offset current: 2nA
Wide power supply range:
Single supply: +3V to +30V
Dual supplies: ±1.5V to ±15V
Input common-mode voltage range
includes ground
ESD internal protection: 2KV
N
DIP14
(Plastic Package)
D
SO-14
(Plastic Micropackage)
Description
These circuits consist of four independent, high
gain,
internally
frequency
compensated
operational amplifiers. They operate from a single
power supply over a wide range of voltages.
Operation from split power supplies is also
possible and the low power supply current drain is
independent of the magnitude of the power supply
voltage.
All the pins are protected against electrostatic
discharges up to 2KV (as a consequence, the
input voltages must not exceed the magnitude of
VCC+ or VCC-.)
P
TSSOP-14
(Thin Shrink Small Outline Package)
Order Codes
Part Number
LM224AN
LM224AD/ADT
Temperature Range
-40°C, +105°C
LM224APT
LM324AN
LM324AD/ADT
LM324APT
February 2005
0°C, +70°C
Package
Packaging
DIP
SO
TSSOP
(Thin Shrink Outline Package)
DIP
SO
TSSOP
(Thin Shrink Outline Package)
Tube
Tube or Tape & Reel
Revision 2
Tape & Reel
Tube
Tube or Tape & Reel
Tape & Reel
1/16
LM224A-LM324A
Pin & Schematic Diagram
1 Pin & Schematic Diagram
Figure 1: Pin connections (top view)
Output 1 1
14 Output 4
Inverting Input 1 2
-
-
13 Inverting Input 4
Non-inverting Input 1 3
+
+
12 Non-inverting Input 4
11 VCC -
VCC + 4
Non-inverting Input 2
Inverting Input 2
5
+
+
10 Non-inverting Input 3
6
-
-
9
Inverting Input 3
8
Output 3
Output 2 7
Figure 2: Schematic diagram (1/4 LM124A)
2/16
Absolute Maximum Ratings
2
LM224A-LM324A
Absolute Maximum Ratings
Table 1: Key parameters and their absolute maximum ratings
Symbol
VCC
Vi
Vid
Ptot
Parameter
LM124A
Supply voltage
Input Voltage
Differential Input Voltage 1
Power DissipationN Suffix
D Suffix
500
Output Short-circuit Duration 2
Iin
Toper
Tstg
Storage Temperature Range
Rthja
Thermal Resistance Junction to Ambient
SO14
TSSOP14
DIP14
LM324A
Unit
±16 or 32
-0.3 to Vcc + 0.3
V
V
32
V
500
400
500
400
mW
mW
Infinite
3
Input Current
Operating Free-air Temperature Range
LM224A
50
-55 to +125 -40 to +105
mA
0 to +70
°C
-65 to +150
°C
103
100
66
°C/W
1) Either or both input voltages must not exceed the magnitude of VCC+ or VCC-.
2) Short-circuits from the output to VCC can cause excessive heating if VCC > 15V. The maximum output current is approximately 40mA
independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuit on all amplifiers.
3) This input current only exists when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the
input PNP transistor becoming forward biased and thereby acting as input diodes clamps. In addition to this diode action, there is also
NPN parasitic action on the IC chip. this transistor action can cause the output voltages of the op-amps to go to the VCC voltage level (or
to ground for a large overdrive) for the time duration than an input is driven negative.
This is not destructive and normal output will set up again for input voltage higher than -0.3V.
3/16
LM224A-LM324A
3
Electrical Characteristics
Electrical Characteristics
Table 2: VCC+ = +5V, VCC-= Ground, Vo = 1.4V, Tamb = +25°C (unless otherwise specified
Symbol
Parameter
Min.
Typ.
Max.
2
3
5
1
Vio
Input Offset Voltage - note
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
Iio
Input Offset Current
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
2
20
40
Iib
Input Bias Current - note 2
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
20
100
200
Avd
mV
nA
nA
Large Signal Voltage Gain
VCC+ = +15V, RL = 2kΩ, Vo = 1.4V to 11.4V
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
V/mV
50
25
100
Supply Voltage Rejection Ratio (Rs ≤ 10kΩ)
SVR
VCC+ = 5V to 30V
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
dB
65
65
110
ICC
Supply Current, all Amp, no load
Tamb = +25°C VCC = +5V
VCC = +30V
Tmin ≤ Tamb ≤ Tmax VCC = +5V
VCC = +30V
Vicm
Input Common Mode Voltage Range
VCC = +30V - note 3
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
0
0
CMR
Common Mode Rejection Ratio (Rs ≤ 10kΩ)
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
70
60
80
Isource
Output Current Source (Vid = +1V)
VCC = +15V, Vo = +2V
20
40
Isink
Output Sink Current (Vid = -1V)
VCC = +15V, Vo = +2V
VCC = +15V, Vo = +0.2V
10
12
20
50
VOH
High Level Output Voltage
VCC = +30V
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
VCC = +5V, RL = 2kΩ
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
4/16
Unit
mA
0.7
1.5
0.8
1.5
1.2
3
1.2
3
V
VCC 1.5
VCC -2
dB
mA
70
mA
µA
V
RL = 2kΩ
RL = 10kΩ
26
26
27
27
3.5
3
27
28
Electrical Characteristics
LM224A-LM324A
Table 2: VCC+ = +5V, VCC-= Ground, Vo = 1.4V, Tamb = +25°C (unless otherwise specified
Symbol
Parameter
Min.
Typ.
Max.
5
20
20
VOL
Low Level Output Voltage (RL = 10kΩ)
Tamb = +25°C
Tmin ≤ Tamb ≤ Tmax
SR
Slew Rate
VCC = 15V, Vi = 0.5 to 3V, RL = 2kΩ, CL = 100pF, unity Gain
0.4
GBP
Gain Bandwidth Product
VCC = 30V, f =100kHz,Vin = 10mV, RL = 2kΩ, CL = 100pF
1.3
THD
Total Harmonic Distortion
f = 1kHz, Av = 20dB, RL = 2kΩ, Vo = 2Vpp, CL = 100pF, VCC = 30V
Unit
mV
V/µs
MHz
%
0.015
Equivalent Input Noise Voltage
f = 1kHz, Rs = 100Ω, VCC = 30V
40
DVio
Input Offset Voltage Drift
7
30
µV/°C
DIIio
Input Offset Current Drift
10
200
pA/°C
en
Vo1/Vo2 Channel Separation - note
1kHz ≤ f ≤ 20kHZ
4
nV
-----------Hz
dB
120
1) Vo = 1.4V, Rs = 0Ω, 5V < VCC+ < 30V, 0 < Vic < VCC + - 1.5V
2) The direction of the input current is out of the IC. This current is essentially constant, independent of the state of the output so no loading
change exists on the input lines.
3) The input common-mode voltage of either input signal voltage should not be allowed to go negative by more than 0.3V. The upper end
of the common-mode voltage range is VCC+ - 1.5V, but either or both inputs can go to +32V without damage.
4) Due to the proximity of external components insure that coupling is not originating via stray capacitance between these external parts.
This typically can be detected as this type of capacitance increases at higher frequences.
5/16
LM224A-LM324A
Figure 3: Input bias current vs. ambient
temperature
Electrical Characteristics
Figure 6: Current limiting
INPUT BIAS CURRENT
versus AMBIENT TEMPERATURE
IB (nA)
24
21
18
15
12
9
6
3
0
-55-35-15 5 25 45 65 85 105 125
AMBIENT TEMPERATURE (°C)
Figure 4: Input voltage range
Figure 7: Supply current
SUPPLY CURRENT
4
SUPPLY CURRENT (mA)
VCC
ID
mA
3
-
2
+
Tamb = 0°C to +125°C
1
Tamb = -55°C
0
10
20
30
POSITIVE SUPPLY VOLTAGE (V)
Figure 5: Gain bandwidth product
6/16
Figure 8: Common mode rejection ratio
Electrical Characteristics
LM224A-LM324A
Figure 9: Electrical curves
7/16
LM224A-LM324A
Electrical Characteristics
Figure 10: Input current
Figure 12: Voltage gain
Figure 11: Power supply & common mode
rejection ratio
Figure 13: Large signal voltage gain
8/16
Typical Single - Supply Applications
4
Typical Single - Supply Applications
Figure 14: AC coupled interting amplifier
LM224A-LM324A
Figure 17: High input Z adjustable gain DC
instrumentation amplifier
if R1 = R5 and R3 = R4 = R6 = R7
Figure 15: AC coupled non inverting amplifier
2R
1
e0 = 1 + ----------R
2
(e2 -e1)
As shown e0 = 101 (e2 - e1).
Figure 18: DC summing amplifier
Figure 16: Non-inverting DC gain
e0 = e1 +e2 -e3 -e4
Where (e1 +e2) ≥ (e3 +e4)
to keep e0 ≥ 0V
9/16
LM224A-LM324A
Figure 19: Low drift peak detector
Typical Single - Supply Applications
Figure 21: High input Z, DC differential
amplifier
R1
R4
For ------- = ------R
R
2
3
(CMRR depends on this resistor ratio match)
Figure 20: Activer bandpass filter
e0
⎛ 1 + R-------4⎞
⎝ R3⎠
(e2 - e1)
As shown e0 = (e2 - e1)
Figure 22: Using symetrical amplifiers to
reduce input current (general
concept)
Fo = 1kHz
Q = 50
Av = 100 (40dB)
10/16
Typical Single - Supply Applications
LM224A-LM324A
Table 3: Vcc+ = +15V, Vcc- = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Conditions
Vio
Avd
RL = 2kΩ
Icc
No load, per amplifier
Vicm
VOH
RL = 2kΩ (VCC
VOL
RL = 10kΩ
+=15V)
Value
Unit
0
mV
100
V/mV
350
µA
0 to +13.5
V
+13.5
V
5
mV
+40
mA
GBP
Vo = +2V, VCC = +15V
RL = 2kΩ, CL = 100pF
1.3
MHz
SR
RL = 2kΩ, CL = 100pF
0.4
V/µs
Ios
11/16
LM224A-LM324A
5
Macromodel
Macromodel
Warning: Please consider following remarks before using this macromodel:
All models are a trade-off between accuracy and complexity (i.e. simulation time).
Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach
and help to select surrounding component values.
A macromodel emulates the NOMINAL performance of a TYPICAL device within SPECIFIED OPERATING
CONDITIONS (i.e. temperature, supply voltage, etc.). Thus the macromodel is often not as exhaustive as
the datasheet, its goal is to illustrate the main parameters of the product.
Data issued from macromodels used outside of its specified conditions (Vcc, Temperature, etc) or even
worse: outside of the device operating conditions (Vcc, Vicm, etc) are not reliable in any way.
** Standard Linear Ics Macromodels, 1993.
** CONNECTIONS :
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
.SUBCKT LM324 1 2 3 4 5
***************************
.MODEL MDTH D IS=1E-8 KF=3.104131E-15 CJO=10F
* INPUT STAGE
CIP 2 5 1.000000E-12
CIN 1 5 1.000000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 2.600000E+01
RIN 15 16 2.600000E+01
RIS 11 15 2.003862E+02
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 0
VOFN 13 14 DC 0
IPOL 13 5 1.000000E-05
CPS 11 15 3.783376E-09
DINN 17 13 MDTH 400E-12
VIN 17 5 0.000000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 2.000000E+00
FCP 4 5 VOFP 3.400000E+01
FCN 5 4 VOFN 3.400000E+01
FIBP 2 5 VOFN 2.000000E-03
FIBN 5 1 VOFP 2.000000E-03
* AMPLIFYING STAGE
FIP 5 19 VOFP 3.600000E+02
FIN 5 19 VOFN 3.600000E+02
RG1 19 5 3.652997E+06
RG2 19 4 3.652997E+06
CC 19 5 6.000000E-09
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 7.500000E+03
VIPM 28 4 1.500000E+02
HONM 21 27 VOUT 7.500000E+03
VINM 5 27 1.500000E+02
EOUT 26 23 19 5 1
VOUT 23 5 0
ROUT 26 3 20
COUT 3 5 1.000000E-12
DOP 19 25 MDTH 400E-12
VOP 4 25 2.242230E+00
DON 24 19 MDTH 400E-12
VON 24 5 7.922301E-01
ENDS
12/16
Package Mechanical Data
6
LM224A-LM324A
Package Mechanical Data
6.1 DIP14 Package
Plastic DIP-14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
a1
0.51
B
1.39
TYP
MAX.
MIN.
TYP.
MAX.
0.020
1.65
0.055
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
15.24
0.600
F
7.1
0.280
I
5.1
0.201
L
Z
3.3
1.27
0.130
2.54
0.050
0.100
P001A
13/16
LM224A-LM324A
Package Mechanical Data
6.2 SO-14 Package
SO-14 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
MIN.
TYP.
1.75
0.1
0.068
0.2
a2
0.003
0.007
0.46
0.013
0.018
0.25
0.007
1.65
b
0.35
b1
0.19
C
MAX.
0.064
0.5
0.010
0.019
c1
45˚ (typ.)
D
8.55
8.75
0.336
E
5.8
6.2
0.228
0.344
0.244
e
1.27
0.050
e3
7.62
0.300
F
3.8
4.0
0.149
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
S
0.68
0.157
0.026
8 ˚ (max.)
PO13G
14/16
Package Mechanical Data
LM224A-LM324A
6.3 TSSOP14 Package
TSSOP14 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
MAX.
1.2
A1
0.05
A2
0.8
b
0.047
0.15
0.002
0.004
0.006
1.05
0.031
0.039
0.041
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0089
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
1
e
0.65 BSC
K
0˚
L
0.45
A
0.60
0.0256 BSC
8˚
0˚
0.75
0.018
8˚
0.024
0.030
A2
A1
b
e
K
L
c
E
D
E1
PIN 1 IDENTIFICATION
1
0080337D
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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15/16
LM224A-LM324A
7
Summary of Changes
Summary of Changes
Date
Revision
01 March 2001
1
01 Feb. 2005
2
16/16
Description of Changes
First Release
- Table 1 on page 3: explanation of Vid and Vi limits
- Macromodel updated