STB4NC50 N-CHANNEL 500V - 2.2Ω - 4A D2PAK PowerMesh™II MOSFET ■ ■ ■ ■ ■ TYPE VDSS RDS(on) ID STB4NC50 500V < 2.7Ω 4A TYPICAL RDS(on) = 2.2 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED DESCRIPTION The PowerMESH™II is the evolution of the first generation of MESH OVERLAY™. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. 3 1 D²PAK INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVERS ■ ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 500 V Drain-gate Voltage (RGS = 20 kΩ) 500 V Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 4 A ID Drain Current (continuos) at TC = 100°C 2.5 A IDM (●) PTOT Drain Current (pulsed) 12 A Total Dissipation at TC = 25°C 80 W 0.64 W/°C Derating Factor dv/dt(1) Tstg Tj Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature 3.5 V/ns –65 to 150 °C 150 °C (•)Pulse width limited by safe operating area (1)ISD ≤4A, di/dt ≤300A/µs, VDD ≤ V (BR)DSS, T j ≤ T JMAX. July 2000 1/8 STB4NC50 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1.56 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Rthc-sink Thermal Resistance Case-sink Typ 0.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 10 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 110 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS Parameter Drain-source Breakdown Voltage IDSS Zero Gate Voltage Drain Current (VGS = 0) IGSS Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 µA, VGS = 0 Min. Typ. Max. 500 Unit V VDS = Max Rating 1 µA VDS = Max Rating, TC = 125 °C 50 µA ±100 nA VGS = ±30V ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 1.5 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max, VGS = 10V Min. Typ. Max. Unit 2 3 4 V 2.2 2.7 Ω 4 A DYNAMIC Symbol gfs (1) 2/8 Parameter Forward Transconductance Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 2A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. Max. Unit 3 S 315 pF 52 pF 7.7 pF STB4NC50 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Qg Parameter Turn-on Delay Time Rise Time Test Conditions Min. VDD = 300V, ID = 2 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Typ. Unit 10 ns 13 ns 12.5 VDD = 400V, ID = 4.2A, VGS = 10V Max. 17 nC 2.7 nC 6.1 nC SWITCHING OFF Symbol tr(Voff) Parameter Off-voltage Rise Time tf Fall Time tc Cross-over Time Test Conditions Min. VDD = 400V, ID = 4 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Typ. Max. Unit 15 ns 13 ns 20 ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Source-drain Current ISDM (2) Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 4 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge IRRM Reverse Recovery Current ISD = 4 A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) Max. Unit 4 A 16 A 1.6 V 400 ns 1.64 µC 8.2 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STB4NC50 Output Characteristics Tranfer Characteristics Tranconductance Static Drain-Source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STB4NC50 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STB4NC50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STB4NC50 TO-263 (D2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 E 10 10.4 0.393 0.409 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 D A2 A C C2 DET AIL "A" DET AIL "A" A1 B2 E B G L2 L L3 P011P6/E 7/8 STB4NC50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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