STW12NB60 N-CHANNEL 600V - 0.5Ω - 12A TO-247 PowerMesh™II MOSFET TYPE STW12NB60 ■ ■ ■ ■ ■ VDSS RDS(on) ID 600V < 0.6Ω 12 A TYPICAL RDS(on) = 0.5Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED 3 2 1 DESCRIPTION Using the latest high voltage MESH OVERLAY™ process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprieraty edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. TO-247 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ SWITCH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID ID IDM (●) PTOT dv/dt(1) Tstg Tj May 2001 Parameter Value Unit Drain-source Voltage (VGS = 0) 600 V Drain-gate Voltage (RGS = 20 kΩ) 600 V Gate- source Voltage ±30 V Drain Current (continuos) at TC = 25°C 12 A Drain Current (continuos) at TC = 100°C 7.56 A Drain Current (pulsed) 48 A Total Dissipation at TC = 25°C 190 W Derating Factor 1.52 W/°C Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature 4 V/ns –65 to 150 °C 150 °C (1)ISD ≤12A, di/dt ≤100A/µs, V DD ≤ V(BR)DSS, Tj ≤ T JMAX. 1/8 STW12NB60 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 0.658 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 12 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 450 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V V(BR)DSS Min. Typ. Max. 600 Unit V VDS = Max Rating, TC = 125 °C 1 µA 50 µA ±100 nA Max. Unit ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 5.5A Min. 2 Typ. 3 4 V 0.5 0.60 Ω Typ. Max. Unit DYNAMIC Symbol 2/8 Parameter Test Conditions VDS > ID(on) x RDS(on)max, ID = 5.5A Min. 9 S 2200 pF gfs Forward Transconductance Ciss Input Capacitance Coss Output Capacitance 285 pF Crss Reverse Transfer Capacitance 30 pF VDS = 25V, f = 1 MHz, VGS = 0 STW12NB60 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. Typ. Max. Unit VDD = 300V, ID = 5.5 A RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) 27 ns 12 ns VDD = 480V, ID = 11 A, VGS = 10V, RG = 4.7Ω 54 70 nC 17 nC 23 nC SWITCHING OFF Symbol tr(Voff) Parameter Off-voltage Rise Time tf Fall Time tc Cross-over Time Test Conditions Min. VDD = 480V, ID = 11 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) Typ. Max. 20 Unit ns 15 ns 32 ns SOURCE DRAIN DIODE Symbol ISD Parameter Test Conditions Min. Typ. Source-drain Current ISDM (2) Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 12 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 11 A, di/dt = 100 A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current Max. Unit 12 A 48 A 1.6 V 600 ns 6.5 µC 20.5 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/8 STW12NB60 Output Characteristics Transconductance Gate Charge vs Gate-source Voltage 4/8 Transfer Characteristics Static Drain-source On Resistance Capacitance Variations STW12NB60 Normalized Gate Thereshold Voltage vs Temp. Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STW12NB60 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STW12NB60 TO-247 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 4.7 5.3 0.185 0.209 D 2.2 2.6 0.087 0.102 E 0.4 0.8 0.016 0.031 F 1 1.4 0.039 0.055 F3 2 2.4 0.079 0.094 F4 3 3.4 0.118 0.134 G H 10.9 15.3 0.429 15.9 0.602 0.626 L 19.7 20.3 0.776 0.779 L3 14.2 14.8 0.559 0.582 L4 34.6 1.362 L5 5.5 0.217 M 2 3 0.079 0.118 P025P 7/8 STW12NB60 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics © 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8