STB10NC50-1 ® N - CHANNEL 500V - 0.48Ω - 10A - I2PAK/D2PAK PowerMESH MOSFET PRELIMINARY DATA TYPE V DSS R DS(on) ID STB10NC50-1 500 V < 0.52 Ω 10 A ■ ■ ■ ■ ■ TYPICAL RDS(on) = 0.48 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED DESCRIPTION Using the latest high voltage MESH OVERLAY process, STMicroelectronics has designed an advanced family of power MOSFETs with outstanding performances. The new patent pending strip layout coupled with the Company’s proprietary edge termination structure, gives the lowest RDS(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteristics. 3 3 12 1 I2PAK D2PAK INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITCH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVE ■ ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS Value Unit Drain-source Voltage (V GS = 0) Parameter 500 V Drain- gate Voltage (R GS = 20 kΩ) Gate-source Voltage 500 V ± 30 V A ID Drain Current (continuous) at T c = 25 o C 10 ID o I DM (•) P tot dv/dt( 1 ) Tstg Tj Drain Current (continuous) at T c = 100 C 6.3 A Drain Current (pulsed) 40 A Total Dissipation at T c = 25 o C 135 W Derating Factor 1.08 W/ o C 3 V/ns Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area December 1999 -65 to 150 o C 150 o C ( 1) ISD ≤ 10 A, di/dt ≤100 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/7 STB10NC50 -1 THERMAL DATA R thj-case R thj-amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 0.93 o C/W 62.5 0.5 300 o C/W C/W o C Max Value Unit 10 A 550 mJ o AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T j max) E AS Single Pulse Avalanche Energy (starting T j = 25 o C, I D = I AR , V DD = 50 V) ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbol V (BR)DSS Parameter Drain-source Breakdown Voltage Test Conditions I D = 250 µA Zero Gate Voltage V DS = Max Rating Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (V DS = 0) Typ. Max. 500 V GS = 0 I DSS Min. Unit V T c = 125 o C V GS = ± 30 V 1 50 µA µA ± 100 nA ON (∗) Symbol Parameter Test Conditions V GS(th) Gate Threshold Voltage V DS = V GS I D = 250 µA R DS(on) Static Drain-source On Resistance V GS = 10V ID = 5 A I D(on) On State Drain Current V DS > I D(on) x R DS(on)max V GS = 10 V Min. Typ. Max. Unit 2 3 4 V 0.48 0.52 Ω 10 A DYNAMIC Symbol g fs (∗) C iss C oss C rss 2/7 Parameter Test Conditions Forward Transconductance V DS > I D(on) x R DS(on)max Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =5 A V GS = 0 Min. Typ. Max. Unit 10 S 1480 210 25 pF pF pF STB10NC50 -1 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit t d(on) tr Turn-on Time Rise Time V DD = 250 V R G = 4.7 Ω ID = 5 A VGS = 10 V 29 16 ns ns Qg Q gs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge V DD = 160 V ID = 10 A V GS = 10 V 41 12 19 49 nC nC nC Typ. Max. Unit SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions Min. V DD = 160 V ID = 10 A R G = 4.7 Ω V GS = 10 V ns ns ns 16 18 29 SOURCE DRAIN DIODE Symbol ISD I SDM (•) V SD (∗) t rr Q rr I RRM Parameter Test Conditions Min. Typ. Source-drain Current Source-drain Current (pulsed) Forward On Voltage I SD =10 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD =10 A di/dt = 100 A/µs V DD = 50 V T j = 150 o C V GS = 0 Max. Unit 10.6 42.4 A A 1.6 V 560 ns 4.9 nC 17.5 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area 3/7 STB10NC50 -1 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/7 STB10NC50 -1 TO-262 (I2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. 4.3 4.6 0.169 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B1 1.2 1.38 0.047 0.054 B2 1.25 1.4 0.049 0.055 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 e 2.44 2.64 0.096 0.104 E 10 10.28 0.393 0.404 L 13.2 13.5 0.519 0.531 L1 3.48 3.78 0.137 0.149 L2 1.27 1.4 0.050 0.055 E e B B2 C2 A1 A C A L1 L2 D L P011P5/C 5/7 STB10NC50 -1 TO-263 (D2PAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.3 4.6 0.169 0.181 A1 2.49 2.69 0.098 0.106 B 0.7 0.93 0.027 0.036 B2 1.25 1.4 0.049 0.055 C 0.45 0.6 0.017 0.023 C2 1.21 1.36 0.047 0.053 D 8.95 9.35 0.352 0.368 E 10 10.28 0.393 0.404 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 E A C2 L2 D L L3 B2 B A1 C G P011P6/C 6/7 STB10NC50 -1 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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