STMICROELECTRONICS STB5NB80

STB5NB80

N - CHANNEL 800V - 1.8Ω - 5A - D2PAK
PowerMESH MOSFET
TYPE
ST B5NB80
■
■
■
■
■
■
V DSS
R DS(on)
ID
800 V
< 2.2 Ω
5 A
TYPICAL RDS(on) = 1.8 Ω
EXTREMELY HIGH dv/dt CAPABILITY
100% AVALANCHE TESTED
VERY LOW INTRINSIC CAPACITANCES
GATE CHARGE MINIMIZED
ADD SUFFIX ”T4” FOR ORDERING IN TAPE
& REEL
3
1
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
D2PAK
TO-263
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ DC-AC CONVERTERS FOR WELDING
■ EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Symb ol
V DS
V DGR
V GS
Parameter
Value
Unit
Drain-source Voltage (VGS = 0)
800
V
Drain- gate Voltage (RGS = 20 kΩ)
800
V
± 30
V
5
A
3.2
A
G ate-source Voltage
o
ID
Drain Current (continuous) at Tc = 25 C
ID
Drain Current (continuous) at Tc = 100 C
I DM (•)
P tot
dv/dt( 1)
T s tg
Tj
o
20
A
T otal Dissipation at T c = 25 oC
Drain Current (pulsed)
110
W
Derating F actor
0.88
W/ C
4
V/ns
Peak Diode Recovery voltage slope
Storage T emperature
Max. Operating Junction T emperature
(*) Limited only by maximum temperature allowed
March 1999
o
-65 to 150
o
C
150
o
C
( 1) ISD ≤ 5A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
1/8
STB5NB80
THERMAL DATA
R thj -case
R thj -amb
R thc-sink
Tl
Thermal Resistance Junction-case
Max
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
1.13
o
C/W
62.5
0.5
300
o
C/W
C/W
o
C
o
AVALANCHE CHARACTERISTICS
Symbo l
Parameter
Min.
Value
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
E AS
Single Pulse Avalanche Energy
(starting Tj = 25 o C, I D = IAR , VDD = 50 V)
Max.
Value
Unit
5
A
300
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified)
OFF
Symbo l
V (BR)DSS
Parameter
Drain-source
Breakdown Voltage
Test Con ditions
I D = 250 µA
V DS = Max Rating
Zero G ate Voltage
Drain Current (V GS = 0) V DS = Max Rating
IGSS
Gate-body Leakage
Current (VDS = 0)
T yp.
Max.
800
V GS = 0
I DSS
Min.
Unit
V
T c = 125 oC
V GS = ± 30 V
1
50
µA
µA
± 100
nA
ON (∗)
Symbo l
Parameter
Test Con ditions
ID = 250 µA
V GS(th)
Gate Threshold
Voltage
R DS(on)
Static Drain-source O n V GS = 10V
Resistance
I D(o n)
V DS = V GS
Min.
T yp.
Max.
Unit
3
4
5
V
1.8
2.2
Ω
ID = 2.5 A
5
On State Drain Current V DS > ID(o n) x R DS(on )ma x
V GS = 10 V
A
DYNAMIC
Symbo l
g f s (∗)
C iss
C os s
C rss
2/8
Parameter
Test Con ditions
Forward
Transconductance
V DS > ID(o n) x R DS(on )ma x
Input Capacitance
Output Capacitance
Reverse T ransfer
Capacitance
V DS = 25 V
f = 1 MHz
I D = 2.5 A
V GS = 0
Min.
T yp.
1.5
4
Max.
Unit
S
1050
135
15
pF
pF
pF
STB5NB80
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbo l
Parameter
Test Con ditions
Min.
T yp.
Max.
Unit
t d(on)
tr
Turn-on delay Time
Rise Time
V DD = 400 V ID = 3 A
VGS = 10 V
R G = 4.7 Ω
(see test circuit, figure 3)
18
9
Qg
Q gs
Q gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V DD = 480 V
30
9
14
42
nC
nC
nC
T yp.
Max.
Unit
I D = 5.6 A V GS = 10 V
ns
ns
SWITCHING OFF
Symbo l
tr (Voff)
tf
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Con ditions
Min.
14
14
21
V DD = 640 V ID = 5.6 A
R G = 4.7 Ω V GS = 10 V
(see test circuit, figure 5)
ns
ns
ns
SOURCE DRAIN DIODE
Symbo l
ISD
I SDM (•)
V SD (∗)
t rr
Q rr
I RRM
Parameter
Test Con ditions
Min.
T yp.
Source-drain Current
Source-drain Current
(pulsed)
Forward On Voltage
I SD = 5 A
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I SD = 5.6 A di/dt = 100 A/µs
T j = 150 o C
V DD = 100 V
(see test circuit, figure 5)
V GS = 0
Max.
Unit
5
20
A
A
1.6
V
700
ns
5
µC
14
A
(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/8
STB5NB80
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STB5NB80
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
STB5NB80
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STB5NB80
TO-263 (D2PAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.3
4.6
0.169
0.181
A1
2.49
2.69
0.098
0.106
B
0.7
0.93
0.027
0.036
B2
1.25
1.4
0.049
0.055
C
0.45
0.6
0.017
0.023
C2
1.21
1.36
0.047
0.053
D
8.95
9.35
0.352
0.368
E
10
10.28
0.393
0.404
G
4.88
5.28
0.192
0.208
L
15
15.85
0.590
0.624
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
E
A
C2
L2
D
L
L3
B2
B
A1
C
G
P011P6/C
7/8
STB5NB80
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are
subjec t to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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 1999 STMicroelectronics – Printed in Italy – All Rights Reserved
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