STV40NE03L-20 N - CHANNEL 30V - 0.014Ω - 40A - PowerSO-10 STripFET MOSFET TYPE V DSS R DS( on ) ID STV40NE03L-20 30 V < 0.020 Ω 40 A ■ ■ ■ ■ TYPICAL RDS(on) = 0.014 Ω EXCEPTIONAL dv/dt CAPABILITY LOW GATE CHARGE A 100 oC APPLICATION ORIENTED CHARACTERIZATION 10 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique ”Single Feature Size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 1 PowerSO-10 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SOLENOID AND RELAY DRIVERS ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC & DC-AC CONVERTERS IN HIGH PERFORMANCE VRMs ■ AUTOMOTIVE ENVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc.) ABSOLUTE MAXIMUM RATINGS Symb ol V DS V DGR VGS Value Unit Drain-source Voltage (VGS = 0) Parameter 30 V Drain- gate Voltage (R GS = 20 kΩ) 30 V ± 20 V Gate-source Voltage o ID Drain Current (continuous) at Tc = 25 C 40 A ID Drain Current (continuous) at Tc = 100 C o 28 A Drain Current (pulsed) 160 A 80 W 0.53 W /o C 7 V/ns I DM (•) P tot o Total Dissipation at T c = 25 C Derating F actor dv/dt( 1 ) T st g Tj Peak Diode Recovery voltage slope Storage T emperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area May 2000 -65 to 175 o C 175 o C ( 1) ISD ≤ 40 A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STV40NE03L-20 THERMAL DATA R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature F or Soldering Purpose Max Max T yp o 1.88 62.5 0.5 300 C/W C/W o C/W o C o AVALANCHE CHARACTERISTICS Symbo l Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ < 1%) 40 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 15V) 200 mJ ELECTRICAL CHARACTERISTICS (TJ = -40 to 150 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA I D = 250 µA V GS = 0 V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. T c = 25 oC Typ. Max. 30 27 Unit V T c = 25 oC V GS = ± 20 V 1 50 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions V GS(th) Gate Threshold Voltage V DS = V GS V DS = V GS ID = 250 µA T c = 25 C ID = 250 µA R DS(on) Static Drain-source On Resistance V GS V GS V GS V GS ID = ID = ID = ID = I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V = = = = o 10V 5V 10V 5V 20 20 20 20 A A A A Min. Typ. Max. Unit 1 0.6 1.8 2.5 3.0 V V 0.014 0.02 0.023 0.04 0.046 Ω Ω Ω Ω T c = 25 oC o Tc = 25 C 20 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D = 20 A V GS = 0 Min. Typ. Max. 10 Unit S 1850 450 160 2400 590 210 pF pF pF STV40NE03L-20 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions t d(on) tr Turn-on Time Rise Time V DD = 15 V R G =4.7 Ω Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 24 V Min. I D = 20 A V GS = 5 V I D = 40 A V GS = 5 V Typ. Max. Unit 25 160 33 210 ns ns 29 12 14 38 nC nC nC Typ. Max. Unit 25 120 155 33 160 210 ns ns ns Typ. Max. Unit 40 160 A A 1.5 V SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions V DD = 24 V R G =4.7 Ω Min. I D = 40 A V GS = 5 V SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 40 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 40 A V DD = 20 V t rr Q rr I RRM Min. V GS = 0 di/dt = 100 A/µs Tj = 150 o C 50 ns 0.9 µC 3.5 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area Thermal Impedance 3/8 STV40NE03L-20 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STV40NE03L-20 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STV40NE03L-20 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STV40NE03L-20 PowerSO-10 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 3.35 3.65 0.132 0.144 A1 0.00 0.10 0.000 0.004 B 0.40 0.60 0.016 0.024 c 0.35 0.55 0.013 0.022 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 0.300 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.300 E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 e 1.27 0.240 0.050 F 1.25 1.35 0.049 0.053 H 13.80 14.40 0.543 0.567 1.80 0.047 h 0.50 L 0.002 1.20 q 1.70 α 0 0.071 0.067 o o 8 B 0.10 A B 10 = E4 = = = E1 = E3 = E2 = E = = = H 6 = = 1 5 e 0.25 B SEATING PLANE DETAIL ”A” A C M Q h D = D1 = = = SEATING PLANE A F A1 A1 L DETAIL ”A” α 0068039-C 7/8 STV40NE03L-20 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. 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