STB85NF55L STP85NF55L N-CHANNEL 55V - 0.0060 Ω - 80A D2PAK/TO-220 STripFET™ II POWER MOSFET TYPE STP85NF55L STB85NF55L ■ ■ ■ VDSS RDS(on) ID 55 V 55 V <0.008 Ω <0.008 Ω 80 A 80 A TYPICAL RDS(on) = 0.0060 Ω LOW THRESHOLD DRIVE LOGIC LEVEL DEVICE 3 1 DESCRIPTION This Power MOSFET is the latest development of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. D2PAK TO-263 (Suffix “T4”) 3 2 1 TO-220 ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ SOLENOID AND RELAY DRIVERS ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC CONVERTERS ■ AUTOMOTIVE ENVIRONMENT Ordering Information SALES TYPE STP85NF55L STB85NF55L STB85NF55LT4 MARKING P85NF55L B85NF55L B85NF55L PACKAGE TO-220 D2PAK D2PAK PACKAGING TUBE TUBE TAPE & REEL ABSOLUTE MAXIMUM RATINGS Symbol VDS Parameter Drain-source Voltage (VGS = 0) VDGR VGS ID(•) ID IDM (••) Drain-gate Voltage (RGS = 20 kΩ) Ptot dv/dt (1) EAS (2) Tstg Tj Value 55 Unit V Gate- source Voltage Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C 55 ± 15 80 80 V V A A Drain Current (pulsed) Total Dissipation at TC = 25°C Derating Factor Peak Diode Recovery voltage slope Single Pulse Avalanche Energy 320 300 2.0 10 980 A W W/°C V/ns mJ -55 to 175 °C Storage Temperature Max. Operating Junction Temperature (•) Current Limited by Package. (••) Pulse width limited by safe operating area. September 2002 1) ISD ≤80A, di/dt ≤300A/µs, VDD ≤ V (BR)DSS, Tj ≤ TJMAX (2) Starting T j = 25 oC, ID = 40A, VDD = 30V 1/10 STB85NF55L STP85NF55L THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max 0.5 62.5 300 °C/W °C/W °C ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 15 V V(BR)DSS Min. Typ. Max. 55 Unit V 1 10 µA µA ±100 nA ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS RDS(on) Static Drain-source On Resistance VGS = 10 V VGS = 5 V ID = 250 µA Min. Typ. Max. Unit 1 1.6 2.5 V 0.0060 0.008 0.008 0.01 Ω Ω Typ. Max. Unit ID = 40 A ID = 40 A DYNAMIC Symbol 2/10 Parameter Test Conditions gfs (*) Forward Transconductance VDS = 15V Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V f = 1 MHz VGS = 0 ID = 40 A Min. 130 S 4050 860 300 pF pF pF STB85NF55L STP85NF55L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time ID = 40 A VDD = 27.5 V VGS = 5 V RG = 4.7 Ω (Resistive Load, Figure 3) 35 165 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=27.5V ID=80A VGS=5V 80 20 45 110 nC nC nC Typ. Max. Unit (see test circuit, Figure 4) ns ns SWITCHING OFF Symbol td(off) tf Parameter Turn-off Delay Time Fall Time Test Conditions Min. ID = 40 A VDD = 27.5 V VGS = 5 V RG = 4.7Ω, (Resistive Load, Figure 3) 70 55 ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 80 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 80 A di/dt = 100A/µs Tj = 150°C VDD = 20 V (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 80 240 6 Max. Unit 80 320 A A 1.5 V ns nC A (*)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limited by safe operating area. Safe Operating Area Thermal Impedance 3/10 STB85NF55L STP85NF55L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/10 STB85NF55L STP85NF55L Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature. . . 5/10 STB85NF55L STP85NF55L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/10 STB85NF55L STP85NF55L D2PAK MECHANICAL DATA DIM. mm. MIN. TYP. inch. MAX. MIN. TYP. TYP. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.028 0.037 B2 1.14 1.7 0.045 0.067 C 0.45 0.6 0.018 0.024 C2 1.21 1.36 0.048 0.054 D 8.95 9.35 0.352 0.368 D1 7.6 E 10 E1 8.1 G 8 8.4 0.299 10.4 0.394 8.9 0.318 4.88 5.28 0.192 8.5 0.315 0.330 0.409 0.334 0.350 0.208 L 15 15.85 0.591 0.624 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.069 M 2.4 3.2 0.094 0.126 R 0.3 0.5 0.012 V2 0° 8° 0° 0.4 0.016 0.019 8° 7/10 STB85NF55L STP85NF55L TO-220 MECHANICAL DATA DIM. mm. MIN. MAX. MIN. TYP. TYP. A 4.4 4.6 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 0.107 D1 8/10 TYP. inch. 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.40 2.70 0.094 0.106 H2 10 10.40 0.393 0.409 L2 16.10 16.73 0.633 16.40 0.645 0.658 L4 13 14 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.20 6.60 0.244 0.260 L9 3.50 3.93 0.137 0.154 DIA 3.75 3.85 0.147 0.151 STB85NF55L STP85NF55L D2PAK FOOTPRINT TUBE SHIPMENT (no suffix)* TAPE AND REEL SHIPMENT (suffix ”T4”)* REEL MECHANICAL DATA DIM. mm MIN. A inch MAX. MIN. 330 B 1.5 C 12.8 D 20.2 G 24.4 N 100 T MAX. 12.992 0.059 13.2 0.504 0.520 0.795 26.4 0.960 1.039 3.937 30.4 1.197 BASE QTY BULK QTY 1000 1000 TAPE MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0075 0.082 R 50 1.574 T 0.25 0.35 .0.0098 0.0137 W 23.7 24.3 0.933 0.956 * on sales type 9/10 STB85NF55L STP85NF55L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics 2002 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 10/10