STF40NF06 N-CHANNEL 60V - 0.024Ω - 23A - TO-220FP STripFET™II MOSFET Figure 1: Package Table 1: General Features TYPE VDSS RDS(on) ID STF40NF06 60 V < 0.028 Ω 23 A ■ ■ ■ ■ ■ TYPICAL RDS(on) = 0.024Ω EXCEPTIONAL dv/dt CAPABILITY LOW GATE CHARGE AT 100°C APPLICATION ORIENTED CHARACTERIZATION 100% AVALANCHE TESTED 3 DESCRIPTION This MOSFET is the latest development of STMicroelectronics unique “Single Feature Size™” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 1 2 TO-220FP Figure 2: Internal Schematic Diagram APPLICATIONS ■ DC-DC & DC-AC CONVERTERS ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SOLENOID AND RELAY DRIVERS Table 2: Order Codes Part Number Marking Package Packaging STF40NF06 F40NF06 TO-220FP TUBE Rev.2 November 2004 1/9 STF40NF06 Table 3: Absolute Maximum ratings Symbol VDS VDGR VGS Parameter Value Unit Drain-source Voltage (VGS = 0) 60 V Drain-gate Voltage (RGS = 20 kΩ) 60 V ± 20 V ID Drain Current (continuous) at TC = 25°C 23 A ID Drain Current (continuous) at TC = 100°C 16 A Drain Current (pulsed) 92 A IDM () Gate- source Voltage Total Dissipation at TC = 25°C 30 W Derating Factor 0.2 W/°C dv/dt (1) Peak Diode Recovery voltage slope 10 V/ns EAS (2) Single Pulse Avalanche Energy PTOT 250 mJ 2500 V –55 to 175 °C Thermal Resistance Junction-case Max 5.0 °C/W Maximum Lead Temperature For Soldering Purpose 275 °C VISO Insulation Withstand Voltage (DC) Tstg Storage Temperature Tj Operating Junction Temperature (1) ISD ≤ 40A, di/dt ≤ 300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.. (2) Starting Tj=25°C, ID=20A, VDD=30V () Pulse width limited by safe operating area Table 4: Thermal Data Rthj-case Tl ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) Table 5: Off Symbol V(BR)DSS Parameter Drain-source Breakdown Voltage Test Conditions ID = 250 µA, VGS = 0 IDSS VDS = Max Rating Zero Gate Voltage Drain Current (VGS = 0) VDS= Max Rating, TC= 125°C IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 60 Unit V VGS = ± 20V 1 µA 10 µA ±100 nA Max. Unit 4 V 0.028 Ω Table 6: On Symbol 2/9 Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 11.5 A Min. Typ. 2 0.024 STF40NF06 ELECTRICAL CHARACTERISTICS (CONTINUED) Table 7: Dynamic Symbol gfs (1) Ciss Coss Crss Parameter Test Conditions Forward Transconductance VDS = 30 V Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 25V, f = 1 MHz, VGS = 0 Min. ID =11.5A Typ. Max. Unit 12 S 920 225 80 pF pF pF Table 8: Switching On Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 30V, ID = 20A RG = 4.7Ω VGS = 10V (see Figure 16) 27 11 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 48V, ID = 10A, VGS = 10V 32 6.5 15 43 nC nC nC Typ. Max. Unit ns ns Table 9: Switching Off Symbol td(off) tf Parameter Turn-off-Delay Time Fall Time Test Conditions Min. VDD = 30V, ID = 20A, RG=4.7Ω, VGS = 10V (see Figure 16) 27 11 ns ns Table 10: Source Drain Diode Symbol ISD Parameter Test Conditions Min. Typ. Max. Unit Source-drain Current 23 A ISDM (2) Source-drain Current (pulsed) 92 A VSD (1) Forward On Voltage ISD = 23A, VGS = 0 1.3 V Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 40A, di/dt = 100A/µs, VDD = 10V, Tj = 150°C (see test circuit, Figure 5) trr Qrr IRRM 63 150 4.8 ns nC A (1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (2) Pulse width limited by safe operating area. 3/9 STF40NF06 Figure 3: Safe Operating Area Figure 6: Thermal Impedance Figure 4: Output Characteristics Figure 7: Transfer Characteristics Figure 5: Transconductance Figure 8: Static Drain-source On Resistance 4/9 STF40NF06 Figure 9: Gate Charge vs Gate-source Voltage Figure 12: Capacitance Variations Figure 10: Normalized Gate Thereshold Voltage vs Temperature Figure 13: Normalized On Resistance vs Temperature Figure 11: Source-Drain Diode Forward Characteristics Figure 14: Normalized Breakdown Voltage vs Temperature 5/9 STF40NF06 Figure 15: Unclamped Inductive Load Test Circuit Figure 18: Unclamped Inductive Wafeform Figure 16: Switching Times Test Circuit For Resistive Load Figure 19: Gate Charge Test Circuit Figure 17: Test Circuit For Inductive Load Switching and Diode Recovery Times 6/9 STF40NF06 TO-220FP MECHANICAL DATA mm. DIM. MIN. A 4.4 inch TYP MAX. MIN. TYP. 4.6 0.173 0.181 MAX. 0.106 B 2.5 2.7 0.098 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 L3 28.6 30.6 1.126 1.204 L4 9.8 10.6 .0385 0.417 L5 2.9 3.6 0.114 0.141 L6 15.9 16.4 0.626 0.645 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L7 L3 L6 F2 H G G1 F F1 L7 L2 L5 1 2 3 L4 7/9 STF40NF06 Table 11: Revision History 8/9 Date Revision 07-Oct-2004 11-Nov-2004 1 2 Description of Changes First release Final datasheet STF40NF06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. 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