STM7E1A 7 E 1 CHANNELS SWITCH ARRAY ■ ■ ■ ■ MAIN SWITCHES MAX. RON LESS THAN 2Ω PROVIDES 7 AUXILIARY SWITCHES WITH RON < 75Ω 6VPP AMPLITUDE OF ANALOG INPUT SIGNAL DIGITAL INPUTS ARE TTL LEVELS COMPATIBLE DESCRIPTION The STM7E1 consists in 7 identical ISDN E1 channels, each channel corresponding to 4 main low-resistant switches (a and b) and 2 auxiliary switches (c and d). The switches positions in all the channels are identical and controlled by a unique control resource driven by the digital inputs Lm, Ls and Sc. In each channel, the TX and RX lines can be switched between a Main port or a Spare-port by the main switches: if both "a" switches are closed and both "b" switches are open, the Main port is connected to the line, while if both "a" switches are open and both "b' switches are closed, the spare port is connected to the line. The 2 auxiliary switches enable to close a local loop between the TX and RX access of a port: if "c" is closed, the Spare port RX and TX access is connected between each other to form a local loop, while if "d" is closed, the Main port RX and TX access is connected between each other to form a local loop. TQFP64 The Spare port is only used for test purpose on the system board while the Main port is the communication channel. Consequently, a switching from the Main port to the Spare port occurs very rarely (<10 times a day). The power supplies of the chip need to be de coupled properly. This means that at least one external capacitor C1 must be connected in between GND and VPOS, one external capacitor C2 between GND and VNEG, and one external capacitor C3 between each pair of VNEG and VPOS. ORDERING CODES Type Temperature Range Package Comments STM7E1A STM7E1AR -40 to 85 °C -40 to 85 °C TQFP64 (Tray) TQFP64 (Tape & Reel) 160 parts per Tray 1000 parts per reel December 2002 1/10 STM7E1A PIN CONFIGURATION PIN DESCRIPTION PlN N° SYMBOL TYPE 1, 17, 33, 47 VNEG(1) P 2 3 4 5, 12, 21, 25, 29, 38, 52, 56, 60 6 7 8 9 10 11 13 14 15 Txm#2 Tx#2 Txs#2 IOA IOA IOA GND G IOA IOA IOA IOA IOA IOA IOA IOA IOA 16, 34, 48, 64 Rxm#3 Rx#3 Rxs#3 Txm#3 Tx#3 Txs#3 Rxm#4 Rx#4 Rxs#4 VPOS(2) P Channel 3: RX main port Channel 3: RX line Channel 3: RX spare port Channel 3: TX main port Channel 3: TX line Channel 3: TX spare port Channel 4: RX main port Channel 4: RX line Channel 4: RX spare port Positive Power Supply 18 19 20 22 23 24 26 27 28 30 Txm#4 Tx#4 Txs#4 Rxm#5 Rx#5 Rxs#5 Txm#5 Tx#5 Txs#5 Rxm#6 IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA Channel 4: TX main port Channel 4: TX line Channel 4: TX spare port Channel 5: RX main port Channel 5: RX line Channel 5: RX spare port Channel 5: TX main port Channel 5: TX line Channel 5: TX spare port Channel 6: RX main port 2/10 NAME AND FUNCTION Negative Power Supply Channel 2: TX main port Channel 2: TX line Channel 2: TX spare port Voltage Reference for digital inputs STM7E1A PlN N° SYMBOL TYPE 31 32 35 36 37 39 40 41 42 43 44 45 46 49 50 51 53 54 55 57 58 59 61 62 63 Rx#6 Rxs#6 Sc Ls Lm Txm#6 Tx#6 Txs#6 Mode Rxm#0 Rx#0 Rxs#0 TEST/Sn Txm#0 Tx#0 Txs#0 Rxm#1 Rx#1 Rxs#1 Txm#1 Tx#1 Txs#1 Rxm#2 Rx#2 Rxs#2 IOA IOA I I I IOA IOA IOA I IOA IOA IOA I IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA IOA NAME AND FUNCTION Channel 6: RX line Channel 6: RX spare port Control digital input Control digital input Control digital input Channel 6: TX main port Channel 6: TX line Channel 6: TX spare port Control Digital Input Channel 0: RX main port Channel 0: RX line Channel 0: RX spare port Channel 6: RX main port Channel 0: TX main port Channel 0: TX line Channel 0: TX spare port Channel 1: RX main port Channel 1: RX line Channel 1: RX spare port Channel 1: TX main port Channel 1: TX line Channel 1: TX spare port Channel 2: RX main port Channel 2: RX line Channel 2: RX spare port NOTE 1: All VNEG pins to be connected together on board. NOTE 2: All VPOS pins to be connected together on board. 3/10 STM7E1A TYPICAL OPERATING CIRCUIT MODE Sc Ls Lm TEST/Sn Control Decoding Level Shifting & Buffering a Tx#0 CHANNEL 0 Txm#0 b Txs#0 c a Rx#0 Rxm#0 b Rxs#0 CHANNEL 1 Txm#1 Txs#1 Rxm#1 Rxs#1 CHANNEL 6 Txm#6 Txs#6 Rxm#6 Rxs#6 Tx#1 Rx#1 Tx#6 Rx#6 VNEG 4/10 d GND VPOS STM7E1A DECODING OF FUNCTIONAL MODE 1 (MODE = L) Main Switches Auxiliary Switches Sc low Sc high Lm low Lm high Ls low Ls high a closed, b open a open, b closed d open d closed c open c closed Main port is connected to the line Spare port is connected to the line Main port local loop open Main port local loop closed Spare port local loop open Spare port local loop closed When closing the main port local loop (Lm high), it is external system responsibility to ensure that the main port has previously been disconnected from the line (Sc has to be high). There is no internal mechanism to ensure this. When closing the spare port local loop (Ls high), it is external system responsibility to ensure that the spare port has previously been disconnected from the line (Sc has to be high). There is no internal mechanism to ensure this. DECODING OF FUNCTIONAL MODE 2 (MODE = H) INPUT OUTPUTS TEST/Sn L H A_TX O C B_TX C O C = Closed O = Open INPUTS Sc L L L L H Lm L L H H L OUTPUTS Ls L H L H L A_RX C C O C O B_RX C O C O C c O C O O O d O O C O O C = Closed O = Open TEST MODE DESCRIPTION (MODE = 0, TEST = 1) In order to test the main switches (4-point measurement), test modes are foreseen where the main switches can be controlled independently from each other. One can enter in test mode by controlling the Sc, Lm and Ls pins according to the following table. The digital part and auxiliary switches can be tested in functional mode. Signification Sc Lm Ls A_TX closed A_RX closed B_TX closed B_RX closed B_TX & c closed A_RX & d closed H L H L H L H L H H L L L L H H L L H H L L H H All main switches open Note 1: Although there is an internal pull down in the TEST pin, an external hardware connection from TEST to GND is required on the board to work in functional, mode. 5/10 STM7E1A ABSOLUTE MAXIMUM RATINGS Symbol Description Min Max Unit VPOS Positive Power Supply Voltage VNEG - 0.3 VNEG + 7 V GND Reference Ground VNEG - 0.3 VNEG + 7 V Input Voltage for Digital Inputs and Analog Input/Output Pins VNEG - 0.3 VNEG + 7 V VIN Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min TYP Max Unit V VPOS Positive Power Supply Voltage 3.3 - 5% 3.3 + 5% VNEG Negative Power Supply Voltage -3.3 - 5% -3.3 + 5% V Tamb Ambient Temperature -25 85 °C TJ Junction Temperature -25 120 °C 300 mA 70 pF Ipeak, Admissible peak Current in 1 Switch switch CIa Load Capacitance on ASIC output DIGITAL PART SPECIFICATIONS Value Symbol Parameter Unit Min. VIL Low Input Level 0 VIH High Input Level 2 VIT Low-High Switching Threshold Voltage Ileak Input Leakage Current 6/10 Typ. Max. 0.8 V VPOS V 1.6 -3 V 3 STM7E1A ANALOG PART SPECIFICATIONS Value Symbol Parameter Test Condition Unit Min. On-resistance of the main switches (1) On-resistance of the RON(aux) auxiliary switches (1) Difference of RON between VIN = 2V, TA = 25°C ∆RON(main) devices ∆RON(main)(1) Difference of RON between VIN = 2V, TA = 25°C switches of the same device (1,2) Off-resistance of the main Roff and auxiliary switches Capacitance at any switch Cpin(3) pin, switch ON (1) Peak amplitude of the signal Apeak,signal at switch pins (1,4) Frequency of the signal at fsignal switch pins (3dB bandwidth) Cross-talk(1,5) Cross-talk between lines t Switch time of the main switches (a and b) NOTE 1: all the parameters are valid only with a 75 Ω (±5%) load to GND. RON(main)(1) Typ. Max. 1.6 2 Ω 50 75 Ω Ω 0.5 0.8 100 Ω kΩ 50 120 pF -3 3 Vp 50 12000 KHz 4 8 mVrms 0.15 1 µs NOTE 2: measured with a 5V DC voltage applied to a closed switch. NOTE 3: not tested in production. NOTE 4: measured with a 2Vpp signal. NOTE 5: measured with the line connected to GND at one side with a 75 Ω resistor and all the other lines driven by a 1MHz, 2Vpp sine wave signal. NOTE 6: during the switching between the main and spare ports, the behaviour of the component is not guaranteed: both main switches can be open (break before make). NOTE 7: measured with the line switching from a 2.5V DC level (main or spare port) to a -2.5V DC level (spare or main port). CURRENT CONSUMPTION SPECIFICATIONS Value Symbol Parameter Unit Min. ISTDBY(VNEG)(1,3) Maximal average power dissipation in the main switches Maximal average power dissipation in the auxiliar switches Standby (no switching) current of VNEG ISTDBY(VPOS)(1,3) Typ. Max. 40 mW 150 mW -500 500 µA Standby (no switching) current of VPOS -500 500 µA ESWITCH(VNEG)(1) Energy to be delivered to by VPOS when switching -100 100 nJ ESWITCH(VPOS)(1) Energy to be delivered to by VPOS when switching -100 100 nJ Pmain(1) Paux(1) NOTE 1: these parameters are not tested in production. NOTE 2: this power is not delivered by VPOS and VNEG supplies but by the signal sources. NOTE 3: only valid with digital inputs to GND or VPOS levels. 7/10 STM7E1A TQFP64 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 1.6 A1 0.05 A2 1.35 B 0.17 C 0.09 D 11.80 D1 9.80 D3 0.063 0.15 0.002 0.006 1.40 1.45 0.053 0.055 0.057 0.22 0.27 0.007 0.009 0.011 0.20 0.004 12.00 12.20 0.465 0.472 0.480 10.00 10.20 0.386 0.394 0.402 0.008 7.50 0.295 E 11.80 12.00 12.20 0.465 0.472 0.480 E1 9.80 10.00 10.20 0.386 0.394 0.402 E3 7.50 0.295 e 0.50 0.020 L 0.45 0.60 L1 0.75 0.018 0.024 1.00 K 0˚ 0.030 0.039 3.5˚ 7˚ 0˚ 3.5˚ 7˚ A D A2 D1 A1 D3 33 48 0.10mm 32 49 .004 E E1 64 17 L L1 E3 B Seating Plane K 1 e 16 C 0051434/E 8/10 STM7E1A Tape & Reel TQFP64 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 30.4 0.519 1.196 Ao 12.25 12.45 0482 0.490 Bo 12.25 12.45 0482 0.490 Ko 2.1 2.3 0.083 0.091 Po 3.9 4.1 0.153 0.161 P 15.9 16.1 0.626 0.639 9/10 STM7E1A Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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