INTERSIL MCTV75P60E1

Semiconductor
IGNS
WN
DRA EW DES
H
T
I
TW
ON
PAR ETE - N
L
BSO
SS O
75A, 600V
P-Type MOS Controlled Thyristor (MCT)
CE
April 1999
PRO
MCTV75P60E1,
MCTA75P60E1
Features
Package
JEDEC STYLE TO-247 5-LEAD
• 75A, -600V
ANODE
• VTM = -1.3V(Maximum) at I = 75A and +150oC
• 2000A Surge Current Capability
ANODE
CATHODE
GATE RETURN
GATE
• 2000A/µs di/dt Capability
• MOS Insulated Gate Control
• 120A Gate Turn-Off Capability at +150oC
Description
JEDEC MO-093AA (5-LEAD TO-218)
The MCT is an MOS Controlled Thyristor designed for switching
currents on and off by negative and positive pulsed control of an
insulated MOS gate. It is designed for use in motor controls,
inverters, line switches and other power switching applications.
ANODE
ANODE
CATHODE
GATE RETURN
GATE
The MCT is especially suited for resonant (zero voltage or
zero current switching) applications. The SCR like forward
drop greatly reduces conduction power loss.
MCTs allow the control of high power circuits with very small
amounts of input energy. They feature the high peak current
capability common to SCR type thyristors, and operate at
junction temperatures up to +150oC with active switching.
Symbol
G
A
PART NUMBER INFORMATION
PART NUMBER
PACKAGE
BRAND
MCTV75P60E1
TO-247
MV75P60E1
MCTA75P60E1
MO-093AA
MA75P60E1
K
NOTE: When ordering, use the entire part number.
Absolute Maximum Ratings
TC = +25oC, Unless Otherwise Specified
MCTV75P60E1
MCTA75P60E1
UNITS
-600
+5
V
V
Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDRM
Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous Cathode Current (See Figure 2)
TC = +25oC (Package Limited) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TC = +90oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non-Repetitive Peak Cathode Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate-Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate-Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rate of Change of Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(0.063" (1.6mm) from case for 10s)
NOTE:
VRRM
IK25
IK90
IKSM
IKC
VGA
VGAM
dv/dt
di/dt
PT
TJ, TSTG
TL
85
75
2000
120
±20
±25
See Figure 11
2000
208
1.67
-55 to +150
260
A
A
A
A
V
V
A/µs
W
W/oC
oC
oC
1. Maximum Pulse Width of 250µs (Half Sine) Assume TJ (Initial) = +90oC and TJ (Final) = TJ (Max) = +150oC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
© Harris Corporation 1999
2-18
File Number
3374.6
Specifications MCTV75P60E1, MCTA75P60E1
Electrical Specifications
TC = +25oC Unless Otherwise Specified
PARAMETER
SYMBOL
Peak Off-State
Blocking Current
IDRM
Peak Reverse
Blocking Current
IRRM
On-State Voltage
VTM
TEST CONDITIONS
MIN
TYP
MAX
UNITS
VKA = -600V,
TC = +150oC
-
-
3
mA
VGA = +18V
TC = +25oC
-
-
100
µA
VKA = +5V
TC = +150oC
-
-
4
mA
VGA = +18V
TC = +25oC
-
-
100
µA
IK = IK90,
TC = +150oC
-
-
1.3
V
VGA = -10V
TC = +25oC
-
-
1.4
V
Gate-Anode
Leakage Current
IGAS
VGA = ±20V
-
-
200
nA
Input Capacitance
CISS
VKA = -20V, TJ = +25oC
VGA = +18V
-
10
-
nF
L = 200µH, IK = IK90
RG = 1Ω, VGA = +18V, -7V
TJ = +125oC
VKA = -300V
-
300
-
ns
-
200
-
ns
Current Turn-On
Delay Time
tD(ON)I
Current Rise Time
tRI
Current Turn-Off
Delay Time
tD(OFF)I
-
700
-
ns
Current Fall Time
tFI
-
1.15
1.4
µs
Turn-Off Energy
EOFF
-
10
-
mJ
Thermal Resistance
RθJC
-
.5
.6
oC/W
Typical Performance Curves
100
120
PULSE TEST
PULSE DURATION - 250µs
DUTY CYCLE < 2%
110
IK , DC CATHODE CURRENT (A)
IK, CATHODE CURRENT (A)
300
TJ = +150oC
TJ =
10
TJ =
+25oC
-40oC
100
PACKAGE LIMIT
90
80
70
60
50
40
30
20
10
1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
0
25
2.0
35
45
55
65
75
85
95 105 115 125 135 145 155
TC, CASE TEMPERATURE (oC)
VTM, CATHODE VOLTAGE (V)
FIGURE 1. CATHODE CURRENT vs SATURATION VOLTAGE
(TYPICAL)
FIGURE 2. MAXIMUM CONTINUOUS CATHODE CURRENT
2-19
MCTV75P60E1, MCTA75P60E1
Typical Performance Curves (Continued)
TJ = +150oC, RG = 1Ω, L = 200µH
400
300
VKA = -300V
200
VKA = -200V
100
0
10
20
30
40
50
60
70
80
90
100
TJ = +150oC, RG = 1Ω, L = 200µH
2.0
TD(OFF)I , TURN-OFF DELAY (µs)
TD(ON)I , TURN-ON DELAY (ns)
500
1.8
1.6
1.4
1.2
1.0
VKA = -200V
0.6
0.4
0.2
0.0
10
110 120
VKA = -300V
0.8
20
30
50
60
70
80
90
100
110 120
IK, CATHODE CURRENT (A)
IK, CATHODE CURRENT (A)
FIGURE 3. TURN-ON DELAY vs CATHODE CURRENT
(TYPICAL)
FIGURE 4. TURN-OFF DELAY vs CATHODE CURRENT
(TYPICAL)
TJ = +150oC, RG = 1Ω, L = 200µH
500
40
TJ = +150oC, RG = 1Ω, L = 200µH
2.0
1.8
1.6
tFI , FALL TIME (µs)
tRI, RISE TIME (ns)
400
300
VKA = -200V
200
VKA = -300V
VKA = -200V
1.4
1.2
VKA = -300V
1.0
0.8
0.6
0.4
100
0.2
0
10
20
30
40
50
60
70
80
90
IK , CATHODE CURRENT (A)
100
110
0.0
10
120
TJ = +150oC, RG = 1Ω, L = 200µH
5.0
VKA = -300V
VKA = -200V
1.0
0.1
10
20
30
40
50
60
70
80
90
IK, CATHODE CURRENT (A)
100
110
30
40
50
60
70
80
90
IK , CATHODE CURRENT (A)
100
110
120
FIGURE 6. TURN-OFF FALL TIME vs CATHODE CURRENT
(TYPICAL)
EOFF, TURN-OFF SWITCHING LOSS (mJ)
EON, TURN-ON SWITCHING LOSS (mJ)
FIGURE 5. TURN-ON RISE TIME vs CATHODE CURRENT
(TYPICAL)
20
120
FIGURE 7. TURN-ON ENERGY LOSS vs CATHODE CURRENT
(TYPICAL)
2-20
TJ = +150oC, RG = 1Ω, L = 200µH
20.0
VKA = -300V
10.0
VKA = -200V
1.0
10
20
30
40
50
60
70
80
90
IK , CATHODE CURRENT (A)
100
110
120
FIGURE 8. TURN-OFF ENERGY LOSS vs CATHODE CURRENT
(TYPICAL)
MCTV75P60E1, MCTA75P60E1
100
EON = tD(ON) I = 0
IK , PEAK CATHODE CURRENT (A)
fMAX , MAX OPERATING FREQUENCY (kHz)
Typical Performance Curves (Continued)
EON ≠ 0, tD(ON) I ≠ 0
VKA = -200V
10
VKA = -300V
fMAX1 = 0.05(tD(ON) I + tD(OFF) I)
fMAX2 = (PD - PC) / ESWITCH
1
10
PD: ALLOWABLE DISSIPATION
PC: CONDUCTION DISSIPATION
(PC DUTY FACTOR = 50%)
RθJC = 0.5oC/W
100
IK , CATHODE CURRENT (A)
200
TURN-OFF
SAFE OPERATING AREA
0
FIGURE 9. OPERATING FREQUENCY vs CATHODE CURRENT
(TYPICAL)
-50
-150
-250
-350
-450
VKA , PEAK TURN OFF VOLTAGE (V)
TJ = +150oC, VGA = 18V
-200
CS = 0.1µF, TJ = +150oC
-100 CS = 0.1µF, TJ = +25oC
-700
CS = 1µF, TJ = +150oC
SPIKE VOLTAGE (V)
-675
-650
-625
-600
-575
-550
-525
-10
CS = 2µF, TJ = +150oC
CS = 1µF, TJ = +25oC
-500
-475
CS = 2µF, TJ = +25oC
-450
-425
0.1
-550
FIGURE 10. TURN-OFF CAPABILITY vs ANODE-CATHODE
VOLTAGE
-725
VDRM, BREAKDOWN VOLTAGE (V)
TJ = +150oC, VGA = 18V, L = 200µH
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
-1
1
1.0
10.0
100.0
dv/dt (V/µs)
1000.0
10000.0
FIGURE 11. BLOCKING VOLTAGE vs dv/dt
6
11
16
21
26
31
di/dt (A/µs)
36
41
46
FIGURE 12. SPIKE VOLTAGE vs di/dt (TYPICAL)
Operating Frequency Information
Operating frequency information for a typical device
(Figure 9) is presented as a guide for estimating device performance for a specific application. Other typical frequency
vs cathode current (IAK) plots are possible using the information shown for a typical unit in Figures 3 to 8. The operating
frequency plot (Figure 9) of a typical device shows fMAX1 or
fMAX2 whichever is smaller at each point. The information is
based on measurements of a typical device and is bounded
by the maximum rated junction temperature.
fMAX1 is defined by fMAX1 = 0.05 / (tD(ON)I + tD(OFF)I). tD(ON)I +
tD(OFF)I deadtime (the denominator) has been arbitrarily held to
10% of the on-state time for a 50% duty factor. Other definitions
are possible. tD(ON)I is defined as the 10% point of the leading
edge of the input pulse and the point where the cathode current
rises to 10% of its maximum value. tD(OFF)I is defined as the
90% point of the trailing edge of the input pulse and the point
where the cathode current falls to 90% of its maximum value.
Device delay can establish an additional frequency limiting condi-
tion for an application other than TJMAX. tD(OFF)I is important
when controlling output ripple under a lightly loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC) / (EON + EOFF). The
allowable dissipation (PD) is defined by PD = (TJMAX - TC) /
RΘJC. The sum of device switching and conduction losses
must not exceed PD. A 50% duty factor was used (Figure 10)
and the conduction losses (PC) are approximated by PC =
(VAK • IAK) / (duty factor/100). EON is defined as the sum of
the instantaneous power loss starting at the leading edge of
the input pulse and ending at the point where the anodecathode voltage equals saturation voltage (VAK = VTM). EOFF
is defined as the sum of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the
point where the cathode current equals zero (IK = 0).
The switching power loss (Figure 10) is defined as fMAX2 • (EON
+ EOFF). Because Turn-on switching losses can be greatly influenced by external circuit conditions and components, fMAX
curves are plotted both including and neglecting turn-on losses.
2-21
MCTV75P60E1, MCTA75P60E1
Test Circuits
VG
200µH
+
RURG8060
IK
VK
VA
500Ω
+
-
9V
-
+
-
10kΩ
20V
DUT
+
4.7kΩ
CS
DUT
FIGURE 13. SWITCHING TEST CIRCUIT
FIGURE 14. VSPIKE TEST CIRCUIT
MAXIMUM RISE AND FALL TIME OF VG IS 200ns
VG
IK
VG
90%
di/dt
10%
IK
-VKA
VSPIKE
90%
VTM
IK
10%
tD(OFF) I
tR I
tF I
VAK
tD(ON) I
FIGURE 15. SWITCHING TEST WAVEFORMS
FIGURE 16. VSPIKE TEST WAVEFORMS
Handling Precautions for MCT's
MOS Controlled Thyristors are susceptible to gate-insulation damage by the electrostatic discharge of energy through
the devices. When handling these devices, care should be
exercised to assure that the static charge built in the handler's body capacitance is not discharged through the
device. MCT's can be handled safely if the following basic
precautions are taken:
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as *“ECCOSORB LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGA. Exceeding the rated VGA can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited
or floating should be avoided. These conditions can result
in turn-on of the device due to voltage buildup on the input
capacitor due to leakage currents or pickup.
7. Gate Protection - These devices do not have an internal
monolithic zener diode from gate to emitter. If gate protection is required an external zener is recommended.
† Trademark Emerson and Cumming, Inc.
2-22