INTERSIL MCTV65P100F1

Semiconductor
S
April 1999
CES
PRO
NS
N
RAW W DESIG
D
H
T
T WI
O NE
PAR ETE - N
OL
OBS
MCTV65P100F1,
MCTA65P100F1
65A, 1000V
P-Type MOS Controlled Thyristor (MCT)
Features
Package
JEDEC STYLE TO-247
• 65A, -1000V
• VTM ≤ -1.4V at I = 65A and +150oC
ANODE ANODE
CATHODE
GATE RETURN
CATHODE (FLANGE)
• 2000A Surge Current Capability
GATE
• 2000A/µs di/dt Capability
• MOS Insulated Gate Control
• 100A Gate Turn-Off Capability at +150oC
Description
JEDEC MO-093AA (5-LEAD TO-218)
The MCT is an MOS Controlled Thyristor designed for switching
currents on and off by negative and positive voltage control of an
insulated MOS gate. It is designed for use in motor controls,
inverters, line switches and other power switching applications.
ANODE ANODE
CATHODE
GATE RETURN
GATE
The MCT is especially suited for resonant (zero voltage or zero
current switching) applications. The SCR like forward drop
greatly reduces conduction power loss.
MCTs allow the control of high power circuits with very small
amounts of input energy. They feature the high peak current
capability common to SCR type thyristors, and operate at junction temperatures up to +150oC with active switching.
CATHODE (FLANGE)
Symbol
G
PART NUMBER INFORMATION
PART NUMBER
PACKAGE
A
BRAND
MCTV65P100F1
TO-247
M65P100F1
MCTA65P100F1
MO-093AA
M65P100F1
K
NOTE: When ordering, use the entire part number.
Formerly TA9900.
Absolute Maximum Ratings
TC = +25oC, Unless Otherwise Specified
MCTV65P100F1
MCTA65P100F1
UNITS
-1000
+5
V
V
Peak Off-State Voltage (See Figure 11). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDRM
Peak Reverse Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous Cathode Current (See Figure 2)
TC = +25oC (Package Limited) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TC = +90oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Non-Repetitive Peak Cathode Current (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Controllable Current (See Figure 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate-Anode Voltage (Continuous) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Gate-Anode Voltage (Peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rate of Change of Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Rate of Change of Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
(0.063" (1.6mm) from case for 10s)
NOTE:
VRRM
IK25
IK90
ITSM
ITC
VGA
VGA
dv/dt
di/dt
PT
TJ, TSTG
TL
85
65
2000
100
±20
±25
See Figure 11
2000
208
1.67
-55 to +150
260
A
A
A
A
V
V
A/µs
W
W/oC
oC
oC
1. Maximum Pulse Width of 200µs (Half Sine) Assume TJ (Initial) = +90oC and TJ (Final) = TJ (Max) = +150oC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures.
Copyright
© Harris Corporation 1999
2-13
File Number
3516.5
Specifications MCTV65P100F1, MCTA65P100F1
Electrical Specifications
PARAMETER
TC = +25oC Unless Otherwise Specified
SYMBOL
Peak Off-State
Blocking Current
TEST CONDITIONS
VKA = -1000V,
VGA = +18V
IDRM
Peak Reverse
Blocking Current
IRRM
On-State Voltage
VKA = +5V,
VGA = +18V
VTM
IK = IK90,
VGA = -10V
MIN
TYP
MAX
UNITS
TC = +150oC
-
-
3
mA
TC = +25oC
-
-
100
µA
TC = +150oC
-
-
4
mA
TC = +25oC
-
-
100
µA
TC = +150oC
-
-
1.4
V
TC = +25oC
-
-
1.5
V
Gate-Anode
Leakage Current
IGAS
VGA = ±20V
-
-
200
nA
Input Capacitance
CISS
VKA = -20V, TJ = +25oC
VGA = +18V
-
10
-
nF
L = 200µH, IK = IK90 = 65A
RG = 1Ω, VGA = +18V, -7V
TJ = +125oC
VKA = -400V
-
120
-
ns
-
160
-
ns
Current Turn-On
Delay Time
tD(ON)I
Current Rise Time
tRI
Current Turn-Off
Delay Time
tD(OFF)I
-
750
-
ns
Current Fall Time
tFI
-
1.45
1.9
µs
Turn-Off Energy
EOFF
-
18
-
mJ
Thermal Resistance
RθJC
-
0.5
0.6
oC/W
100
100
PULSE TEST
PULSE DURATION = 250µs
DUTY CYCLE < 2%
IK, DC CATHODE CURRENT (A)
IK, CATHODE CURRENT (A)
Typical Performance Curves
TJ = +150oC
TJ = +25oC
10
TJ = -40oC
1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
2.4
90
PACKAGE LIMIT
80
70
60
50
40
30
20
10
0
20 30 40 50 60
70
80 90 100 110 120 130 140 150 160
TC, CASE TEMPERATURE (oC)
VTM, CATHODE VOLTAGE (V)
FIGURE 1. CATHODE CURRENT vs SATURATION VOLTAGE
(TYPICAL)
FIGURE 2. MAXIMUM CONTINUOUS CATHODE CURRENT
2-14
MCTV65P100F1, MCTA65P100F1
Typical Performance Curves (Continued)
TJ = +150oC, RG = 1Ω, L = 200µH
150
VKA = -400V
100
VKA = -500V
50
1.8
1.6
1.4
1.2
VKA = -500V
1.0
0.8
VKA = -400V
0.6
0.4
0.2
0.0
0
0
10
20
30
40
50
60
70
IK, CATHODE CURRENT (A)
80
90
0
100
10
20
40
50
60
70
80
90
100
FIGURE 4. TURN-OFF DELAY vs CATHODE CURRENT
(TYPICAL)
TJ = +150oC, RG = 1Ω, L = 200µH
300
TJ = +150oC, RG = 1Ω, L = 200µH
1.8
1.7
tFI, FALL TIME (µs)
250
VKA = -400V
200
150
VKA = -500V
100
50
VKA = -400V
1.6
1.5
VKA = -500V
1.4
1.3
1.2
1.1
1.0
0
0
10
20
30
40
50
60
70
80
90
100
0
10
20
IK, CATHODE CURRENT (A)
FIGURE 5. TURN-ON RISE TIME vs CATHODE CURRENT
(TYPICAL)
30
40
50
60
70
IK, CATHODE CURRENT (A)
TJ = +150oC, RG = 1Ω, L = 200µH
10
VKA = -400V
1.0
10
20
30
40
50
60
70
IK, CATHODE CURRENT (A)
80
90
90
100
TJ = +150oC, RG = 1Ω, L = 200µH
VKA = -500V
0
80
FIGURE 6. TURN-OFF FALL TIME vs CATHODE CURRENT
(TYPICAL)
EOFF, TURN-OFF SWITCHING LOSS (mJ)
EON, TURN-ON SWITCHING LOSS (mJ)
30
IK, CATHODE CURRENT (A)
FIGURE 3. TURN-ON DELAY vs CATHODE CURRENT
(TYPICAL)
tRI, RISE TIME (ns)
TJ = +150oC, RG = 1Ω, L = 200µH
2.0
tD(OFF)I, TURN-OFF DELAY (µs)
tD(ON)I, TURN-ON DELAY (ns)
200
VKA = -500V
VKA = -400V
10
1
0
100
10
20
30
40
50
60
70
80
90
100
IK, CATHODE CURRENT (A)
FIGURE 7. TURN-ON ENERGY LOSS vs CATHODE CURRENT
(TYPICAL)
2-15
FIGURE 8. TURN-OFF ENERGY LOSS vs CATHODE CURRENT
(TYPICAL)
MCTV65P100F1, MCTA65P100F1
50
PD: ALLOWABLE DISSIPATION
PC: CONDUCTION DISSIPATION
(PC DUTY FACTOR = 50%)
RθJC = 0.5oC/W
10
VKA = -500V
TJ = +150oC, VGA = 18V
120
fMAX1 = 0.05 / tD(ON)I + tD(OFF)I
fMAX2 = (PD - PC) / ESWITCH
IK, PEAK CATHODE CURRENT (A)
fMAX, MAX OPERATING FREQUENCY (kHz)
Typical Performance Curves (Continued)
VKA = -400V
100
CS = 1.0µF
80
CS = 0.7µF
60
CS = 0µF
40
20
0
1
10
0
100
IK, CATHODE CURRENT (A)
FIGURE 9. OPERATING FREQUENCY vs CATHODE CURRENT
(TYPICAL)
FIGURE 10. TURN-OFF CAPABILITY vs ANODE-CATHODE
VOLTAGE
TJ = +150oC
-100
CS = 0.1µF, TJ = +150oC
CS = 0.1µF, TJ = +25oC
CS = 1µF, TJ = +150oC
-1100
-1075
-1050
SPIKE VOLTAGE (V)
VDRM, BREAKDOWN VOLTAGE (V)
-100 -200 -300 -400 -500 -600 -700 -800 -900 -1000
VKA, PEAK TURN OFF VOLTAGE (V)
-1025
-1000
-975
-950
-925
-900
CS = 2µF, TJ = +150oC
-10
CS = 1µF, TJ = +25oC
-875
CS = 2µF, TJ = +25oC
-850
-825
-800
0.1
-3
1.0
10
100
dv/dt (V/µS)
1,000
0
10,000
FIGURE 11. BLOCKING VOLTAGE vs dv/dt
5
10
15
20
25
30
di/dt (A/µs)
35
40
45
50
FIGURE 12. SPIKE VOLTAGE vs di/dt (TYPICAL)
Operating Frequency Information
Operating frequency information for a typical device (Figure
9) is presented as a guide for estimating device performance
for a specific application. Other typical frequency vs cathode
current (IK) plots are possible using the information shown
for a typical unit in Figures 3 to 8. The operating frequency
plot (Figure 9) of a typical device shows fMAX1 or fMAX2
whichever is smaller at each point. The information is based
on measurements of a typical device and is bounded by the
maximum rated junction temperature.
fMAX1 is defined by fMAX1 = 0.05 / (tD(ON)I + tD(OFF)I). tD(ON)I +
tD(OFF)I deadtime (the denominator) has been arbitrarily held to
10% of the on-state time for a 50% duty factor. Other definitions
are possible. tD(ON)I is defined as the 10% point of the leading
edge of the input pulse and the point where the cathode current
rises to 10% of its maximum value. tD(OFF)I is defined as the
90% point of the trailing edge of the input pulse and the point
where the cathode current falls to 90% of its maximum value.
Device delay can establish an additional frequency limiting
condition for an application other than TJMAX. tD(OFF)I is
important when controlling output ripple under a lightly loaded
condition. fMAX2 is defined by fMAX2 = (PD - PC) / (EON+EOFF).
The allowable dissipation (PD) is defined by PD = (TJMAX - TC) /
RΘJC. The sum of device switching and conduction losses must
not exceed PD. A 50% duty factor was used and the conduction
losses (PC) are approximated by PC = (VKA • IK) / 2. EON is
defined as the sum of the instantaneous power loss starting at
the leading edge of the input pulse and ending at the point where
the anode-cathode voltage equals saturation voltage (VKA =
VTM). EOFF is defined as the sum of the instantaneous power
loss starting at the trailing edge of the input pulse and ending at
the point where the cathode current equals zero (IK = 0).
2-16
MCTV65P100F1, MCTA65P100F1
Test Circuits
VG
+
200µH
VK
IK
9V
+
VG
+
VA
500Ω
-
-
20V
DUT
CS
10kΩ
+
CS
DUT
4.7kΩ
IK
DIODES RHRG75120
FIGURE 13. SWITCHING TEST CIRCUIT
VG
FIGURE 14. VSPIKE TEST CIRCUIT
90%
VG
10%
di/dt
-VKA
90%
IK
IK
10%
tD(OFF)I
VSPIKE
tFI
tRI
VTM
tD(ON)I
VAK
FIGURE 15. SWITCHING TEST WAVEFORMS
FIGURE 16. VSPIKE TEST WAVEFORMS
Handling Precautions for MCT's
Mos Controlled Thyristors are susceptible to gate-insulation damage by the electrostatic discharge of energy through
the devices. When handling these devices, care should be
exercised to assure that the static charge built in the
handler's body capacitance is not discharged through the
device. MCT's can be handled safely if the following basic
precautions are taken:
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as *“ECCOSORB LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGA. Exceeding the rated VGA can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited
or floating should be avoided. These conditions can result
in turn-on of the device due to voltage buildup on the input
capacitor due to leakage currents or pickup.
7. Gate Protection - These devices do not have an internal
monolithic zener diode from gate to emitter. If gate protection is required an external zener is recommended.
† Trademark Emerson and Cumming, Inc.
2-17