STP30NE03L STP30NE03LFP N - CHANNEL 30V - 0.028 Ω - 30A TO-220/TO-220FP STripFET POWER MOSFET TYPE V DSS R DS( on ) ID STP30NE03L STP30NE03LF P 30 V 30 V < 0.04 Ω < 0.04 Ω 30 A 17 A ■ ■ ■ ■ TYPICAL RDS(on) = 0.028 Ω 100% AVALANCHE TESTED LOW GATE CHARGE LOW THRESHOLD DRIVE DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique ”Single Feature Size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 3 1 3 2 1 TO-220 2 TO-220FP INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ DC MOTOR CONTROL ■ DC-DC & DC-AC CONVERTERS ■ SYNCHRONOUS RECTIFICATION ABSOLUTE MAXIMUM RATINGS Symb ol Parameter Value ST P30NE03L V DS V DGR V GS Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 kΩ) G ate-source Voltage o ID Drain Current (continuous) at Tc = 25 C ID o I DM (•) P tot STP30NE03L FP 30 V 30 V ± 20 V 30 17 A Drain Current (continuous) at Tc = 100 C 21 12 A Drain Current (pulsed) 120 68 A 70 25 W 0.47 0.17 W/ oC o T otal Dissipation at Tc = 25 C Derating Factor V ISO Insulation W ithstand Voltage (DC) T s tg Storage T emperature Tj Unit Max. O perating Junct ion T emperature 2000 V -65 to 175 o C 175 o C (•) Pulse width limited by safe operating area June 1999 1/9 STP30NE03L/FP THERMAL DATA R thj -case R thj -amb R thc-sink Tl Thermal Resistance Junction-case TO-220 TO-220FP 2.14 6 Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose 62.5 0.5 300 o C/W o C/W C/W o C o AVALANCHE CHARACTERISTICS Symbo l Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 15 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 50 V) 250 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. Typ. Max. 30 Unit V T c = 125 oC V GS = ± 20 V 1 10 µA µA ± 100 nA ON (∗) Symbo l Parameter Test Con ditions ID = 250 µA V GS(th) Gate Threshold Voltage V DS = V GS R DS(on) Static Drain-source On Resistance V GS = 5 V V GS = 10 V I D(o n) On State Drain Current V DS > ID(o n) x R DS(on )ma x V GS = 10 V Min. Typ. Max. Unit 1 1.75 2.5 V 0.042 0.028 0.055 0.04 Ω Ω I D = 15 A ID = 15 A 30 A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/9 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =15 A V GS = 0 Min. Typ. Max. Unit 5 15 S 800 205 70 pF pF pF STP30NE03L/FP ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Parameter Test Con ditions Min. Typ. Max. Unit t d(on) tr Turn-on Delay T ime Rise Time V DD = 15 V I D = 14 A R G = 4.7 Ω V GS = 5 V (Resistive Load, see fig. 3) 19 110 Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 48 V ID = 30 A V GS = 5 V 20 8 10 28 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbo l Parameter Test Con ditions Min. t d(of f) tf Turn-off Delay T ime Fall T ime V DD = 15 V I D = 14 A V GS = 5 V R G = 4.7 Ω (Resistive Load, see fig. 3) 40 20 ns ns tr (Voff) tf tc Off-voltage Rise T ime Fall T ime Cross-over Time V DD = 24 V I D = 28 A V GS = 5 V R G = 4.7 Ω (Induct ive Load, see fig. 5) 20 38 65 ns ns ns SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 30 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 28 A di/dt = 100 A/µs T j = 150 o C V DD = 20 V (see test circuit, fig. 5) t rr Q rr I RRM Min. Typ. Max. Unit 30 120 A A 1.5 V V GS = 0 30 ns 30 nC 2 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for TO-220 Safe Operating Area for TO-220FP 3/9 STP30NE03L/FP Thermal Impedance for TO-220 Thermal Impedance forTO-220FP Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance 4/9 STP30NE03L/FP Gate Charge vs Gate-source Voltage Capacitance Variations Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/9 STP30NE03L/FP Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STP30NE03L/FP TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 14.0 0.511 L2 16.4 L4 0.645 13.0 0.551 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L5 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/9 STP30NE03L/FP TO-220FP MECHANICAL DATA mm DIM. MIN. A 4.4 inch TYP. MAX. MIN. TYP. MAX. 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.7 0.017 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.7 0.045 0.067 F2 1.15 1.7 0.045 0.067 G 4.95 5.2 0.195 0.204 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 L2 16 0.630 28.6 30.6 1.126 1.204 L4 9.8 10.6 0.385 0.417 L6 15.9 16.4 0.626 0.645 L7 9 9.3 0.354 0.366 Ø 3 3.2 0.118 0.126 B D A E L3 L3 L6 F F1 L7 F2 H G G1 ¯ 1 2 3 L2 8/9 L4 STP30NE03L/FP Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specific ation mentioned in this publication are subjec t to change without notice. This publication supersedes and replaces all information previously supplied. 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