STP3NC50 N-CHANNEL 500V - 3Ω - 2.8A TO-220 PowerMesh™II MOSFET ■ ■ ■ ■ ■ TYPE VDSS RDS(on) ID STP3NC50 500 V <4Ω 2.8 A TYPICAL RDS(on) = 3 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED NEW HIGH VOLTAGE BENCHMARK GATE CHARGE MINIMIZED 3 DESCRIPTION The PowerMESH™II is the evolution of the first generation of MESH OVERLAY™. The layout refinements introduced greatly improve the Ron*area figure of merit while keeping the device at the leading edge for what concerns swithing speed, gate charge and ruggedness. 1 2 TO-220 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING ■ SWITH MODE POWER SUPPLIES (SMPS) ■ DC-AC CONVERTERS FOR WELDING EQUIPMENT AND UNINTERRUPTIBLE POWER SUPPLIES AND MOTOR DRIVER ■ ABSOLUTE MAXIMUM RATINGS Symbol Value Unit Drain-source Voltage (VGS = 0) 500 V Drain-gate Voltage (RGS = 20 kΩ) 500 V Gate- source Voltage ±30 V ID Drain Current (continuos) at TC = 25°C 2.8 A ID Drain Current (continuos) at TC = 100°C 1.8 A Drain Current (pulsed) VDS VDGR VGS IDM (1) PTOT Parameter 11.2 A Total Dissipation at TC = 25°C 75 W Derating Factor 0.6 W/°C dv/dt Peak Diode Recovery voltage slope Tstg Storage Temperature Tj Max. Operating Junction Temperature (•)Pulse width limited by safe operating area 3 V/ns –60 to 150 °C 150 °C (1)ISD ≤ 2.8A, di/dt ≤100A/µs, VDD ≤ V(BR)DSS, T j ≤ TJMAX . May 2001 1/8 STP3NC50 THERMAL DATA Rthj-case Thermal Resistance Junction-case Max 1.67 °C/W Rthj-amb Thermal Resistance Junction-ambient Max 62.5 °C/W Maximum Lead Temperature For Soldering Purpose 300 °C Tl AVALANCHE CHARACTERISTICS Symbol Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Parameter 2.8 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 110 mJ ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) VGS = ±30V V(BR)DSS Min. Typ. Max. 500 Unit V VDS = Max Rating, TC = 125 °C 1 µA 50 µA ±100 nA ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 1.4 A Min. Typ. Max. Unit 2 3 4 V 3 4 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) 2/8 Parameter Forward Transconductance Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 1.4A VDS = 25V, f = 1 MHz, VGS = 0 Min. 2 S 260 pF 45 pF 5 pF STP3NC50 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 250V, ID = 1.4 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) 10 10 Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD = 400V, ID = 2.8 A, VGS = 10V 10 2.5 4.5 13.5 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol tr(Voff) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions Min. VDD = 400V, ID = 2.8 A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 5) 10 8 20 ns ns ns SOURCE DRAIN DIODE Symbol ISD ISDM (2) VSD (1) Parameter Test Conditions Min. Typ. Source-drain Current Source-drain Current (pulsed) Forward On Voltage ISD = 2.8 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 2.8A, di/dt = 100A/µs, VDD = 100V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current Max. Unit 2.8 A 11.2 A 1.6 V 380 ns 2200 nC 11.5 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. Safe Operating Area Thermal Impedence 3/8 STP3NC50 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STP3NC50 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STP3NC50 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STP3NC50 TO-220 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 C 1.23 1.32 0.048 0.051 D 2.40 2.72 0.094 D1 0.107 1.27 0.050 E 0.49 0.70 0.019 0.027 F 0.61 0.88 0.024 0.034 F1 1.14 1.70 0.044 0.067 F2 1.14 1.70 0.044 0.067 G 4.95 5.15 0.194 0.203 G1 2.4 2.7 0.094 0.106 H2 10.0 10.40 0.393 0.409 L2 16.4 0.645 13.0 14.0 0.511 0.551 L5 2.65 2.95 0.104 0.116 L6 15.25 15.75 0.600 0.620 L7 6.2 6.6 0.244 0.260 L9 3.5 3.93 0.137 0.154 DIA. 3.75 3.85 0.147 0.151 D1 C D A E L4 H2 G G1 F1 L2 F2 F Dia. L5 L9 L7 L6 L4 P011C 7/8 STP3NC50 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. 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