Single N-Channel PowerTrench® MOSFET 30 V, 9 A, 19 mΩ Features General Description Max rDS(on) = 19 mΩ at VGS = 10 V, ID = 9 A This device has been designed to provide maximum efficiency and thermal performance for synchronous buck converters. The low rDS(on) and gate charge provide excellent switching performance. Max rDS(on) = 30 mΩ at VGS = 4.5 V, ID = 7 A Low Profile - 0.8 mm maximum - in the new package MicroFET 2x2 mm Free from halogenated compounds and antimony oxides Application RoHS compliant Pin 1 DC – DC Buck Converters D D G Drain Bottom Drain Contact D 1 6 D D 2 5 D G 3 4 S Source S D D MicroFET 2X2 (Bottom View) MOSFET Maximum Ratings TA = 25 °C unless otherwise noted Symbol VDSS Drain to Source Voltage Parameter VGSS Gate to Source Voltage Drain Current -Continuous ID TA = 25 °C (Note 1a) -Pulsed PD TJ, TSTG Ratings 30 Units V ±20 V 9 24 Power Dissipation TA = 25 °C (Note 1a) 2.4 Power Dissipation TA = 25 °C (Note 1b) 0.9 Operating and Storage Junction Temperature Range –55 to +150 A W °C Thermal Characteristics RθJA Thermal Resistance, Junction to Ambient (Note 1a) 52 RθJA Thermal Resistance, Junction to Ambient (Note 1b) 145 °C/W Package Marking and Ordering Information Device Marking 632 Device FDMA7632 ©2012 Fairchild Semiconductor Corporation FDMA7632 Rev.C1 Package MicroFET 2x2 1 Reel Size 7 ’’ Tape Width 12 mm Quantity 3000 units www.fairchildsemi.com FDMA7632 Single N-Channel Power Trench® MOSFET January 2012 FDMA7632 Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V ΔBVDSS ΔTJ Breakdown Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V 1 μA IGSS Gate to Source Leakage Current VGS = 20 V, VDS = 0 V 100 nA 3.0 V 30 V 16 mV/°C On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA ΔVGS(th) ΔTJ Gate to Source Threshold Voltage Temperature Coefficient ID = 250 μA, referenced to 25 °C –6 VGS = 10 V, ID = 9 A 14 rDS(on) Static Drain to Source On Resistance VGS = 4.5 V, ID = 7 A 20 30 VGS = 10 V, ID = 9 A, TJ = 125 °C 19 25 VDS = 5 V, ID = 9 A 35 gFS Forward Transconductance 1.0 2.1 mV/°C 19 mΩ S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Gate Resistance VDS = 15 V, VGS = 0 V f = 1.0 MHz 570 760 pF 195 260 pF 25 40 pF Ω 1.5 Switching Characteristics td(on) Turn-On Delay Time tr Rise Time td(off) Turn-Off Delay Time tf Fall Time Qg Total Gate Charge VGS = 0 V to 10 V Qg Total Gate Charge VGS = 0 V to 4.5 V Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge VDD = 15 V, ID = 9 A VGS = 10 V, RGEN = 6 Ω VDD = 15 V, ID = 9 A 6 12 ns 2 10 ns 14 25 ns 2 10 ns 9.3 13 nC 4.4 6 nC 1.9 nC 1.5 nC Drain-Source Diode Characteristics IS Maximum Continuous Drain-Source Diode Forward Current VSD Source to Drain Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = 2 A IF = 9 A, di/dt = 100 A/μs 2 (Note 2) A 0.8 1.2 V 18 32 ns 5 10 nC NOTES: 1. RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined by the user's board design. a. 52 °C/W when mounted on a 1 in2 pad of 2 oz copper. b. 145 °C/W when mounted on a minimum pad of 2 oz copper. 2. Pulse Test: Pulse Width < 300 μs, Duty cycle < 2.0%. ©2012 Fairchild Semiconductor Corporation FDMA7632 Rev.C1 2 www.fairchildsemi.com FDMA7632 Single N-Channel Power Trench® MOSFET Electrical Characteristics TJ = 25 °C unless otherwise noted 24 4.5 VGS = 6 V ID, DRAIN CURRENT (A) 20 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V VGS = 4 V 16 VGS = 4.5 V 12 8 VGS = 3.5 V 4 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 0 0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 3.5 1.5 1.0 V GS = 6 V 0.5 4 8 12 V GS = 10 V 16 20 24 ID , DRAIN CURRENT (A) Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 80 ID = 9 A VGS = 10 V 1.4 rDS(on), DRAIN TO 1.3 1.2 1.1 1.0 0.9 0.8 0.7 -75 SOURCE ON-RESISTANCE (mΩ) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE V GS = 4.5 V 2.0 PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 40 TJ = 125 oC 20 TJ = 25 oC 0 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 24 IS, REVERSE DRAIN CURRENT (A) VDS = 5 V 12 TJ = 125 oC 8 TJ = 25 oC TJ = -55 oC 4 2.0 2.5 3.0 3.5 4.0 4.5 6 8 10 VGS = 0 V 10 TJ = 125 oC TJ = 25 oC 0.1 TJ = -55 oC 0.01 0.2 5.0 VGS, GATE TO SOURCE VOLTAGE (V) 0.4 0.6 0.8 1.0 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Source to Drain Diode Forward Voltage vs Source Current Figure 5. Transfer Characteristics ©2012 Fairchild Semiconductor Corporation FDMA7632 Rev.C1 4 Figure 4. On-Resistance vs Gate to Source Voltage 16 1.5 2 VGS, GATE TO SOURCE VOLTAGE (V) PULSE DURATION = 80 μs DUTY CYCLE = 0.5% MAX 0 1.0 ID = 9 A 60 Figure 3. Normalized On- Resistance vs Junction Temperature ID, DRAIN CURRENT (A) V GS = 4 V 2.5 0 1.5 20 V GS = 3.5 V 3.0 Figure 1. On-Region Characteristics 24 PULSE DURATION = 80 μ s DUTY CYCLE = 0.5% MAX 4.0 3 www.fairchildsemi.com FDMA7632 Single N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted 1000 ID = 9 A Ciss 8 VDD = 10 V CAPACITANCE (pF) VGS, GATE TO SOURCE VOLTAGE (V) 10 6 VDD = 15 V 4 VDD = 20 V Coss 100 2 0 f = 1 MHz VGS = 0 V 0 2 4 6 8 10 0.1 10 1 Qg, GATE CHARGE (nC) 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 1000 P(PK), PEAK TRANSIENT POWER (W) 100 ID, DRAIN CURRENT (A) Crss 10 0.1 ms 1 ms 1 THIS AREA IS LIMITED BY rDS(on) 10 ms 100 ms 1s 10 s DC SINGLE PULSE TJ = MAX RATED 0.1 RθJA = 145 oC/W TA = 25 oC 0.01 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 145 oC/W 100 TA = 25 oC 10 1 0.1 -4 10 -3 10 -2 10 -1 10 0 1 10 10 100 1000 t, PULSE WIDTH (sec) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Forward Bias Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation 2 NORMALIZED THERMAL IMPEDANCE, ZθJC 1 0.1 DUTY CYCLE-DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 t2 SINGLE PULSE NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJA x RθJA + TA o RθJA = 145 C/W 0.001 -4 10 -3 10 -2 10 -1 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 11. Transient Thermal Response Curve ©2012 Fairchild Semiconductor Corporation FDMA7632 Rev.C1 4 www.fairchildsemi.com FDMA7632 Single N-Channel Power Trench® MOSFET Typical Characteristics TJ = 25°C unless otherwise noted 2.000 0.10 C 1.00 6 2X 4 1.35 0.66 2.30 1.05 2.000 NO DRAIN OR GATE TRACES ALLOWED IN THIS AREA (0.47) 0.10 C PIN#1 LOCATION 2X 1 3 0.40 TYP 0.65 TYP RECOMMENDED LAND PATTERN OPT 1 0.8 MAX 0.10 C (0.20) 0.08 C 0.05 0.00 C SEATING PLANE 1.00 6 (0.30) PIN #1 IDENT 4 1.000 0.800 1 0.33 0.20 3 1.35 0.66 2.30 1.05 (0.56) 1.05 0.95 (0.47) 1 6 0.65 TYP 4 0.65 0.25~0.35 1.30 0.10 0.05 C A B C 3 0.40 TYP RECOMMENDED LAND PATTERN OPT 2 A. DOES NOT FULLY CONFORM TO JEDEC REGISTRATION MO-229 DATED AUG/2003 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. DRAWING FILENAME: MKT-MLP06Lrev2. ©2012 Fairchild Semiconductor Corporation FDMA7632 Rev.C1 5 www.fairchildsemi.com FDMA7632 Single N-Channel Power Trench® MOSFET Dimensional Outline and Pad Layout tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. 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