MICREL SY56023R_12

SY56023R
Low Voltage 1.2V/1.8V/2.5V CML 2x2
Crosspoint Switch 6.4Gbps with
Equalization
General Description
The SY56023R is a fully-differential, low-voltage
1.2V/1.8V/2.5V CML 2x2 crosspoint switch with input
equalization. The SY56023R can process clock signals
as fast as 5GHz or data patterns up to 6.4Gbps.
The differential input includes Micrel’s unique, 3-pin input
termination architecture that interfaces to CML differential
signals, without any level-shifting or termination resistor
networks in the signal path. The differential input can also
accept AC-coupled LVPECL and LVDS signals. Input
voltages as small as 200mV (400mVPP) are applied
before the 9”, 18” or 27” FR4 transmission line. For ACcoupled input interface applications, an internal voltage
reference is provided to bias the VT pin. The outputs are
CML, with extremely fast rise/fall times guaranteed to be
less than 80ps.
The SY56023R operates from a 2.5V ±5% core supply
and a 1.2V, 1.8V or 2.5V ±5% output supply and is
guaranteed over the full industrial temperature range
(–40°C to +85°C). The SY56023R is part of Micrel’s highspeed, Precision Edge® product line.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Functional Block Diagram
Precision Edge®
Features
 1.2V/1.8V/2.5V CML 2x2 Crosspoint Switch
 Equalizes 9, 18, 27 inches of FR4
 Guaranteed AC performance over temperature and
voltage:
– DC-to > 6.4Gbps Data throughput
– DC-to > 5GHz Clock throughput
– <280 ps propagation delay (IN-to-Q)
– <15 ps output skew
– <80 ps rise/fall times
 Ultra-low jitter design
– <1 psRMS cycle-to-cycle jitter
 High-speed CML outputs
 2.5V ±5% VCC , 1.2/1.8V/2.5V ±5% VCCO power supply
operation
 Industrial temperature range: –40°C to +85°C
 Available in 16-pin (3mm x 3mm) QFN package
Applications




Data Distribution:
SONET clock and data distribution
Fiber Channel clock and data distribution
Gigabit Ethernet clock and data distribution
Markets






Storage
ATE
Test and measurement
Enterprise networking equipment
High-end servers
Metro area network equipment
Precision Edge is a registered trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
January 2012
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SY56023R
Ordering Information(1)
Part Number
Package Type
Operating Range
Package Marking
Lead Finish
SY56023RMG
QFN-16
Industrial
R023 with Pb-Free
Bar-Line Indicator
NiPdAu
Pb-Free
SY56023RMGTR(2)
QFN-16
Industrial
R023 with Pb-Free
Bar-Line Indicator
NiPdAu
Pb-Free
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals only.
2. Tape and Reel.
Pin Configuration
16-Pin QFN
Truth Table
SEL0
SEL1
Q0
Q1
L
L
IN0
IN0
L
H
IN0
IN1
H
L
IN1
IN0
H
H
IN1
IN1
EQ
EQUALIZATION
LOW
27 “
FLOAT
18”
HIGH
9”
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SY56023R
Pin Description
Pin Number
Pin Name
Pin Function
16,1
IN0, /IN0
4,5
IN1, /IN1
Differential Inputs: Signals as small as 200mV VPK (400mVPP) applied to the input of
9, 18 or 27 inches 6 mil FR4 stripline transmission line are then terminated with the
differential input. Each input pin internally terminates with 50Ω to the VT pin.
2
VT0
3
VT1
13
EQ
15
SEL0
6
SEL1
7
VCC
Positive Power Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to
the VCC pins as possible. Supplies input and core circuitry.
8
VCCO
Output Supply: Bypass with 0.1µF//0.01µF low ESR capacitors as close to the VCCO
pins as possible. Supplies the output buffers
14
GND,
Exposed Pad
12,11
Q0, /Q0
10,9
Q1, /Q1
January 2012
Input Termination Center-Tap: Each side of the differential input pair terminates to a
VT pin. This pin provides a center-tap to a termination network for maximum
interface flexibility. An internal high impedance resistor divider biases VT to allow
input AC coupling. For AC-coupling, bypass VT with 0.1µF low_ESR capacitor to
VCC. See “Interface Applications” subsection and Figure 2a.
Three level input for equalization control. High, float, low. EQ pin applies the same
EQ setting to both inputs.
These single-ended TTL/CMOS-compatible inputs, selects inputs IN0 or IN1. Note
that these inputs are internally connected to a 25kΩ pull-up resistor and will default
to a logic HIGH state if left open.
Ground: Exposed pad must be connected to a ground plane that is the same
potential as the ground pins.
CML Differential Output Pairs: Differential buffered copy of the input signal. The
output swing is typically 390mV. See “Interface Applications” subsection for
termination information.
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SY56023R
Absolute Maximum Ratings(1)
Operating Ratings(2)
Supply Voltage (VCC) ............................... –0.5V to +3.0V
Supply Voltage (VCCO) ............................. –0.5V to +3.0V
VCC - VCCO ...............................................................<1.8V
VCCO - VCC ...............................................................<0.5V
Input Voltage (VIN) .......................................–0.5V to VCC
CML Output Voltage (VOUT) ......................... 0.6V to 3.0V
Current (VT)
Source or sink on VT pin .............................±100mA
Input Current
Source or sink Current on (IN, /IN) ................±50mA
Maximum operating Junction Temperature .......... 125°C
Lead Temperature (soldering, 20sec.) .................. 260°C
Storage Temperature (Ts) ....................–65°C to +150°C
Supply Voltage (VCC)..........................2.375V to 2.625V
(VCCO) ..........................1.14V to 2.625V
Ambient Temperature (TA) ................... –40°C to +85°C
Package Thermal Resistance(3)
QFN
Still-air (JA) ............................................ 75°C/W
Junction-to-board (JB) ......................... 33°C/W
DC Electrical Characteristics(4)
TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
Units
VCC
Power Supply Voltage Range
VCC
2.375
2.5
2.625
V
VCCO
1.14
1.2
1.26
V
VCCO
1.7
1.8
1.9
V
VCCO
2.375
2.5
2.625
V
ICC
Power Supply Current
Max. VCC
80
110
mA
ICCO
Power Supply Current
No Load. VCCO
32
42
mA
RIN
Input Resistance
(IN-to-VT, /IN-to-VT )
45
50
55
Ω
RDIFF_IN
Differential Input Resistance
(IN-to-/IN)
90
100
110
Ω
VIH
Input HIGH Voltage
(IN, /IN)
IN, /IN
1.42
VCC
V
VIL
Input LOW Voltage
(IN, /IN)
IN, /IN
1.22V = 1.7-0.475
1.22
VIH–0.2
V
VIN
Input Voltage Swing
(IN, /IN)
see Figure 3a, Note 5, applied to
input of transmission line.
0.2
1.0
V
VDIFF_IN
Differential Input Voltage Swing
(|IN - /IN|)
see Figure 3b, Note 5, applied to
input of transmission line.
0.4
2.0
V
VT_IN
Voltage from Input to VT
1.28
V
Notes:
1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not
implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratings conditions for
extended periods may affect device reliability.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. JB and JA
values are determined for a 4-layer board in still-air number, unless otherwise stated.
4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
5. VIN(max) is specified when VT is floating.
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SY56023R
CML Outputs DC Electrical Characteristics(6)
VCCO = 1.14V to 1.26V RL = 50Ω to VCCO,
VCCO = 1.7V to 1.9V, 2.375V to 2.625V, RL = 50Ω to VCCO or 100Ω across the outputs,
VCC = 2.375V to 2.625V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
VOH
Output HIGH Voltage
RL = 50Ω to VCCO
VOUT
Output Voltage Swing
See Figure 3a
VDIFF_OUT
Differential Output Voltage Swing
See Figure 3b
ROUT
Output Source Impedance
Min
Typ
Max
Units
VCC-0.020
VCC-0.010
VCC
V
300
390
475
mV
600
780
950
mV
45
50
55
Ω
Min
Typ
Max
Units
VCC
V
0.8
V
30
µA
LVTTL/CMOS DC Input Electrical Characteristics(6)
VCC = 2.375V to 2.625V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
IIH
Input HIGH Current
-125
IIL
Input LOW Current
-300
2.0
µA
Three Level EQ Input DC Electrical Characteristics(6)
VCC = 2.375V to 2.625V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
Min
Typ
Max
VIH
Input HIGH Voltage
VCC-0.3
VCC
V
VIL
Input LOW Voltage
0
VEE+0.3
V
IIH
Input HIGH Current
VIH = VCC
400
µA
IIL
Input LOW Current
VIL = GND
-480
Units
µA
Note:
6. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established.
January 2012
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SY56023R
AC Electrical Characteristics
VCCO = 1.14V to 1.26V RL = 50Ω to VCCO,
VCCO = 1.7V to 1.9V, 2.375V to 2.625V, RL = 50Ω to VCCO or 100Ω across the outputs,
VCC = 2.375V to 2.625V; TA = –40°C to +85°C, unless otherwise stated.
Symbol
Parameter
Condition
fMAX
Maximum Frequency
NRZ Data
Min
VOUT = 100mV
tPD
Propagation Delay
IN-to-Q
SEL-to-Q
tSkew
tJitter
tR tF
Input-to-Input Skew
Clock
Typ
Max
Units
6.4
Gbps
5
GHz
Note 7, Figure 1
100
180
280
ps
Figure 1
90
210
350
ps
Note 8
5
20
ps
3
Output-to-Output Skew
Note 9
15
ps
Part-to-Part Skew
Note 10
100
ps
Random Jitter
Note 11
1
psRMS
Crosstalk Induced Jitter
(Adjacent Channel)
Note 12
0.7
psPP
Output Rise/Fall Time
(20% to 80%)
At full output swing.
80
ps
20
50
Notes:
7.
Propagation delay is measured with no attenuating transmission line connected to the input.
8.
Input-to-Input skew is the difference in time between both inputs and the output for the same temperature, voltage and transition.
9.
Output-to-Output skew is the difference in time between both outputs under identical input transition, temperature and power supply
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the
respective inputs.
11. Random jitter is measured with a K28.7 pattern, measured at ≤ fMAX.
12. Crosstalk induced jitter is defined as the added jitter that results from signals applied to the adjacent channel. It is measured at the output while
applying a similar, differential clock frequencies that are asynchronous with respect to each other at the adjacent input.
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SY56023R
Interface Applications
For Input Interface Applications see Figures 4a-e and
for CML Output Termination see Figures 5a-d.
CML Output Termination with VCCO 1.2V
For VCCO of 1.2V, Figure 5a, terminate the output
with 50 Ohms to 1.2V, not 100 ohms differentially
across the outputs. If AC coupling is used, Figure 5d,
terminate into 50 ohms to 1.2V before the coupling
capacitor and then connect to a high value resistor to
a reference voltage. Any unused output pair needs to
be terminated, do not leave floating.
CML Output Termination with VCCO 1.8V
For VCCO of 1.8V, Figure 5a and Figure 5b,
terminate with either 50 ohms to 1.8V or 100 ohms
differentially across the outputs. AC- or DC-coupling
is fine.
Input Termination
1.8V CML driver: Terminate input with VT tied to
1.8V. Don’t terminate 100 ohms differentially.
2.5V CML driver: Terminate input with either VT tied
to 2.5V or 100 ohms differentially.
The input cannot be DC coupled from a 1.2V CML
driver.
Timing Diagrams
Figure 1. Propagation Delay
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SY56023R
Typical Characteristics
VCC = 2.5, VCCO = 1.2V, GND = 0V, VIN = 400mV, RL = 50Ω to 1.2V, Data Pattern: 223-1, TA = 25°C, unless otherwise
stated.
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SY56023R
Input and Output Stage
Figure 2b. Simplified CML Output Buffer
Figure 2a. Simplified Differential Input Buffer
Single-Ended and Differential Swings
Figure 3a. Single-Ended Swing
January 2012
Figure 3b. Differential Swing
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SY56023R
Input Interface Applications
Figure 4a. CML Interface
Figure 4b. CML Interface
100Ω Differential
(DC-Coupled, 2.5V)
50Ω to VCC
(DC-Coupled, 1.8V, 2.5V)
Figure 4d. LVPECL Interface
(AC-Coupled)
Figure 4e. LVDS Interface
(AC-Coupled)
January 2012
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Figure 4c. CML Interface
(AC-Coupled)
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SY56023R
CML Output Termination
Figure 5a. 1.2V or 1.8V CML DC-Coupled Termination
Figure 5b. 1.8V CML DC-Coupled Termination
Figure 5c. CML AC-Coupled Termination
VCCO 1.8V Only
Figure 5d. CML AC-Coupled Termination
VCCO 1.2V Only
Related Product and Support Documents
Part Number
Function
Datasheet Link
HBW Solutions
New Products and Termination Application Notes
http://www.micrel.com/page.do?page=/productinfo/as/HBWsolutions.shtml
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SY56023R
Package Information
16-Pin QFN
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any
intellectual property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel
assumes no liability whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including
liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual
property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a
product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for
surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant
injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk
and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2012 Micrel, Incorporated.
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