FAIRCHILD MMBFJ176

J174 / J175 / J176 / J177
MMBFJ175 / MMBFJ176 / MMBFJ177
P-Channel Switch
Description
This device is designed for low-level analog switching
sample-and-hold circuits and chopper-stabilized
amplifiers. Sourced from process 88.
J174 / 175 / 176 / 177(1)
MMBFJ175 / 176 / 177
G
S
S
G
D
D
TO-92
SOT-23
Mark: 6W / 6X / 6Y
Note: Source & drain are interchangeable.
Ordering Information
Part Number
Top Mark
Package
Packing Method
J175_D26Z
J175
TO-92-3L
Tape and Reel
J176_D74Z
J176
TO-92-3L
Ammo
MMBFJ175
6W
SOT-23 3L
Tape and Reel
MMBFJ176
6X
SOT-23 3L
Tape and Reel
MMBFJ177
6Y
SOT-23 3L
Tape and Reel
Note:
1. J174 & J177 are obsoleted.
© 1997 Fairchild Semiconductor Corporation
J174 / J175 / J176 / J177 Rev. 1.1.0
www.fairchildsemi.com
1
J174 / J175 / J176 / J177_MMBFJ175 / MMBFJ176 / MMBFJ177 — P-Channel Switch
June 2013
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. Values are at TA = 25°C unless otherwise noted.
Symbol
VDG
VGS
IGF
TJ, TSTG(3)
Parameter
Drain-Gate Voltage
Gate-Source Voltage
Forward Gate Current
Operating and Storage Junction Temperature Range
Ratings
Units
-30
30
50
-55 to + 150
V
V
mA
°C
Notes:
2. These ratings are limiting values above which the serviceability of any semiconductor device may be impaired.
3. These ratings are based on a maximum junction temperature of 150°C.
These are steady-state limits. Fairchild Semiconductor should be consulted on applications involving pulsed
or low duty cycle operations.
Thermal Characteristics(4)
Values are at TA = 25°C unless otherwise noted.
Symbol
Maximum
Parameter
Units
J175 - 176
MMBFJ175 - 177
Total Device Dissipation
350
225
mW
Derate above 25°C
2.8
1.8
mW/°C
RθJC
Thermal Resistance, Junction to Case
125
RθJA
Thermal Resistance, Junction to Ambient
357
PD
°C/W
556
°C/W
Note:
4. PCB size: FR-4 76 x 114 x 0.6 T mm3 (3.0” x 4.5” x 0.062”) with minimum land pattern size.
© 1997 Fairchild Semiconductor Corporation
MMBFJ175 / MMBFJ176 / MMBFJ177 Rev. 1.1.0
www.fairchildsemi.com
2
J174 / J175 / J176 / J177_MMBFJ175 / MMBFJ176 / MMBFJ177 — P-Channel Switch
Absolute Maximum Ratings(2)
Values are at TA = 25°C unless otherwise noted.
Symbol
Parameter
Test Condition
Min.
Max.
Units
Off Characteristics
B(BR)GSS
IGSS
VGS(off)
Gate-Source Breakdown Voltage
IG = 1.0 μA, VDS = 0
Gate Reverse Current
VGS = 20 V, VDS = 0
Gate-Source Cut-Off Voltage
VDS = -15 V, ID = -10 nA
30
V
1.0
nA
174
5.0
10.0
V
175
3.0
6.0
V
176
1.0
4.0
V
177
0.8
2.5
V
174
-20
-100
175
-7.0
-60.0
176
-2.0
-25
177
-1.5
-20.0
On Characteristics
IDSS
rDS(on)
Zero-Gate Voltage Drain Current
Drain-Source On Resistance
VDS = -15 V, IGS = 0
IC ≤ 50 mA, IB = 5.0 mA
© 1997 Fairchild Semiconductor Corporation
MMBFJ175 / MMBFJ176 / MMBFJ177 Rev. 1.1.0
174
85
175
125
176
250
177
300
mA
Ω
www.fairchildsemi.com
3
J174 / J175 / J176 / J177_MMBFJ175 / MMBFJ176 / MMBFJ177 — P-Channel Switch
Electrical Characteristics
Figure 1. Common Drain-Source
Figure 2. Parameter Interactions
Figure 3. Transfer Characteristics
Figure 4. Transfer Characteristics
Figure 5. Normalized Drain Resistance vs.
Bias Voltage
Figure 6. Output Conductance vs. Drain Current
© 1997 Fairchild Semiconductor Corporation
MMBFJ175 / MMBFJ176 / MMBFJ177 Rev. 1.1.0
www.fairchildsemi.com
4
J174 / J175 / J176 / J177_MMBFJ175 / MMBFJ176 / MMBFJ177 — P-Channel Switch
Typical Performance Characteristics
Figure 7. Transconductance vs. Drain Current
Figure 8. Capacitance vs. Voltage
Figure 9. Noise Voltage vs. Frequency
Figure 10. Channel Resistance vs. Temperature
Figure 11. Power Dissipation vs.
Ambient Temperature
© 1997 Fairchild Semiconductor Corporation
MMBFJ175 / MMBFJ176 / MMBFJ177 Rev. 1.1.0
www.fairchildsemi.com
5
J174 / J175 / J176 / J177_MMBFJ175 / MMBFJ176 / MMBFJ177 — P-Channel Switch
Typical Performance Characteristics (Continued)
J174 / J175 / J176 / J177_MMBFJ175 / MMBFJ176 / MMBFJ177 — P-Channel Switch
Physical Dimensions
TO-92
D
Figure 12. 3-LEAD, TO92, MOLDED, 0.200 IN LINE SPACING LD FORM (J61Z OPTION) (ACTIVE)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packaging/tr/to92_tr.pdf.
© 1997 Fairchild Semiconductor Corporation
MMBFJ175 / MMBFJ176 / MMBFJ177 Rev. 1.1.0
www.fairchildsemi.com
6
J174 / J175 / J176 / J177_MMBFJ175 / MMBFJ176 / MMBFJ177 — P-Channel Switch
Physical Dimensions (Continued)
SOT-23
0.95
2.92±0.20
3
1.40
1.30+0.20
-0.15
1
2.20
2
0.60
0.37
(0.29)
0.95
0.20
1.00
A B
1.90
1.90
LAND PATTERN
RECOMMENDATION
SEE DETAIL A
1.20 MAX
0.10
0.00
(0.93)
0.10
C
C
2.40±0.30
NOTES: UNLESS OTHERWISE SPECIFIED
GAGE PLANE
0.23
0.08
A) REFERENCE JEDEC REGISTRATION
TO-236, VARIATION AB, ISSUE H.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE INCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR EXTRUSIONS.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M - 1994.
E) DRAWING FILE NAME: MA03DREV10
0.25
0.20 MIN
(0.55)
SEATING
PLANE
SCALE: 2X
Figure 13. 3-LEAD, SOT23, JEDEC TO-236, LOW PROFILE (ACTIVE)
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the
warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.
For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packaging/tr/SOT23-3L_tr.pdf.
© 1997 Fairchild Semiconductor Corporation
MMBFJ175 / MMBFJ176 / MMBFJ177 Rev. 1.1.0
www.fairchildsemi.com
7
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Advance Information
Formative / In Design
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
Definition
Datasheet contains the design specifications for product development. Specifications may change
in any manner without notice.
Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild
Semiconductor reserves the right to make changes at any time without notice to improve design.
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make
changes at any time without notice to improve the design.
Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor.
The datasheet is for reference information only.
Rev. I64
© Fairchild Semiconductor Corporation
www.fairchildsemi.com
Mouser Electronics
Authorized Distributor
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J176_D27Z J176_D26Z J176_D74Z J176