ONSEMI MSB1218A-RT1G

MSB1218A-- RT1G
PNP Silicon General
Purpose Amplifier
Transistor
This PNP Silicon Epitaxial Planar Transistor is designed for general
purpose amplifier applications. This device is housed in the
SC--70/SOT--323 package which is designed for low power surface
mount applications.
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COLLECTOR
3
Features
 High hFE, 210 -- 460
 Low VCE(sat), < 0.5 V
 These Devices are Pb--Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TA = 25C)
Rating
Symbol
Value
Unit
Collector--Base Voltage
V(BR)CBO
45
Vdc
Collector--Emitter Voltage
V(BR)CEO
45
Vdc
Emitter--Base Voltage
V(BR)EBO
7.0
Vdc
IC
100
mAdc
IC(P)
200
mAdc
Symbol
Max
Unit
Power Dissipation (Note 1)
PD
150
mW
Junction Temperature
TJ
150
C
Storage Temperature Range
Tstg
-- 55 to +150
C
Collector Current -- Continuous
Collector Current -- Peak
1
BASE
3
1
2
SC--70 (SOT--323)
CASE 419
STYLE 4
THERMAL CHARACTERISTICS
Rating
2
EMITTER
MARKING DIAGRAM
ELECTRICAL CHARACTERISTICS
Characteristic
BR M G
G
Symbol
Min
Max
Unit
Collector--Emitter Breakdown Voltage
(IC = 2.0 mAdc, IB = 0)
V(BR)CEO
45
--
Vdc
Collector--Base Breakdown Voltage
(IC = 10 mAdc, IE = 0)
V(BR)CBO
45
--
Vdc
Emitter--Base Breakdown Voltage
(IE = 10 mAdc, IE = 0)
V(BR)EBO
7.0
--
Vdc
Collector--Base Cutoff Current
(VCB = 20 Vdc, IE = 0)
ICBO
--
0.1
mA
BR = Device Code
M
= Date Code*
G
= Pb--Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
Collector--Emitter Cutoff Current
(VCE = 10 Vdc, IB = 0)
ICEO
--
100
mA
ORDERING INFORMATION
DC Current Gain (Note 2)
(VCE = 10 Vdc, IC = 2.0 mAdc)
hFE1
210
340
--
VCE(sat)
--
0.5
Vdc
Collector--Emitter Saturation Voltage
(Note 2) (IC = 100 mAdc, IB = 10 mAdc)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Device mounted on a FR--4 glass epoxy printed circuit board using the
minimum recommended footprint.
2. Pulse Test: Pulse Width  300 ms, D.C.  2%.
 Semiconductor Components Industries, LLC, 2010
October, 2010 -- Rev. 7
1
1
Device
MSB1218A--RT1G
Package
Shipping†
SC--70
(Pb--Free)
3000 /Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Publication Order Number:
MSB1218A--RT1/D
MSB1218A--RT1G
PD , POWER DISSIPATION (MILLIWATTS)
250
IC, COLLECTOR CURRENT (mA)
TA = 25C
200
150
100
RθJA = 833C/W
50
0
-- 50
0
50
100
300 mA
250
200
60
150
100
30
IB = 50 mA
0
3
6
9
12
TA, AMBIENT TEMPERATURE (C)
VCE, COLLECTOR VOLTAGE (V)
Figure 1. Derating Curve
Figure 2. IC -- VCE
15
VCE , COLLECTOR-EMITTER VOLTAGE (V)
2
VCE = 10 V
TA = 25C
TA = 75C
DC CURRENT GAIN
90
0
150
1000
TA = -- 25C
100
10
0.1
1
10
1.5
1
0.5
0.1
1
10
IC, COLLECTOR CURRENT (mA)
IB, BASE CURRENT (mA)
Figure 3. DC Current Gain
Figure 4. Collector Saturation Region
100
13
Cib, INPUT CAPACITANCE (pF)
800
700
600
500
400
300
TA = 25C
VCE = 5 V
200
100
0
0.2
TA = 25C
0
0.01
100
900
COLLECTOR VOLTAGE (mV)
120
0.5
1
5
10
20
40
60
80
100
12
11
10
9
8
7
6
150 200
0
IC, COLLECTOR CURRENT (mA)
1
2
VEB (V)
Figure 5. On Voltage
Figure 6. Capacitance
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2
3
4
MSB1218A--RT1G
14
C ob, CAPACITANCE (pF)
12
10
8
6
4
2
0
0
10
20
VCB (V)
Figure 7. Capacitance
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3
30
40
MSB1218A--RT1G
PACKAGE DIMENSIONS
SC--70 (SOT--323)
CASE 419--04
ISSUE N
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
e1
DIM
A
A1
A2
b
c
D
E
e
e1
L
HE
3
E
HE
1
2
b
e
A
0.05 (0.002)
0.30
0.10
1.80
1.15
1.20
0.20
2.00
MILLIMETERS
NOM
MAX
0.90
1.00
0.05
0.10
0.70 REF
0.35
0.40
0.18
0.25
2.10
2.20
1.24
1.35
1.30
1.40
0.65 BSC
0.38
0.56
2.10
2.40
MIN
0.032
0.000
0.012
0.004
0.071
0.045
0.047
0.008
0.079
INCHES
NOM
0.035
0.002
0.028 REF
0.014
0.007
0.083
0.049
0.051
0.026 BSC
0.015
0.083
MAX
0.040
0.004
0.016
0.010
0.087
0.053
0.055
0.022
0.095
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
c
A2
MIN
0.80
0.00
L
A1
SOLDERING FOOTPRINT*
0.65
0.025
0.65
0.025
1.9
0.075
0.9
0.035
0.7
0.028
SCALE 10:1
mm 
inches
*For additional information on our Pb--Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent
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applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur.
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4
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Sales Representative
MSB1218A--RT1/D