STMICROELECTRONICS STD30PF03L-1

STD30PF03LT4
STD30PF03L-1
P-channel 30 V - 0.025 Ω - 24 A - DPAK / IPAK
STripFET™ II Power MOSFET
Features
Type
VDSS
RDS(on) max
ID
STD30PF03LT4
30 V
< 0.028 Ω
24 A
STD30PF03L-1
30 V
< 0.028 Ω
24 A
3
3
■
Standard outline for easy automated surface
mount assembly
■
Low threshold device
■
Low gate charge
2
1
1
DPAK
IPAK
Application
■
Switching applications
Figure 1.
Description
Internal schematic diagram
This Power MOSFET is the latest development of
STMicroelectronics unique “single feature size”
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance and low gate charge.
Table 1.
Device summary
Order codes
Marking
Package
Packaging
STD30PF03LT4
D30PF03L
DPAK
Tape & reel
STD30PF03L-1
D30PF03L
IPAK
Tube
January 2008
Rev 2
1/13
www.st.com
13
Electrical ratings
1
STD30PF03LT4 - STD30PF03L-1
Electrical ratings
Table 2.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
30
V
± 16
V
VDS
Drain-source voltage (VGS=0)
VGS
Gate-source voltage
ID (1)
Drain current (continuous) at TC = 25 °C
24
A
ID (1)
Drain current (continuous) at TC = 100 °C
24
A
IDM (2)
Drain current (pulsed)
96
A
PTOT
Total dissipation at TC=25 °C
70
W
Derating factor
0.47
W/°C
Single pulse avalanche energy
850
mJ
-55 to 175
°C
175
°C
EAS (3)
Tstg
Tj
Storage temperature
Max. operating junction temperature
1. Current limited by wire bonding
2. Pulse width limited by safe operating area
3. Starting TJ = 25 °C, ID = 12 A, VDD =15 V
Table 3.
Thermal data
Max value
Symbol
Parameter
Unit
DPAK
Rthj-case
Thermal resistance junction-case max
Rthj-amb
Thermal resistance junction-ambient max
Rthj-pcb
Thermal resistance junction-pcb max
Tl
Maximum lead temperature for soldering purpose
IPAK
2.14
°C/W
--
100
°C/W
50(1)
--
°C/W
--
275
°C/W
1. When mounted on FR- 4board of 1 inch².
Note:
2/13
For the p-channel Power MOSFET actual polarity of voltages and current has to be reversed
STD30PF03LT4 - STD30PF03L-1
2
Electrical characteristics
Electrical characteristics
(TCASE=25 °C unless otherwise specified)
Table 4.
Symbol
V(BR)DSS
Drain-source breakdown
voltage
Test conditions
ID = 250 µA, VGS= 0
Min.
Typ.
IGSS
Gate body leakage current
(VDS = 0)
VGS = ±16 V
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 250 µA
RDS(on)
Static drain-source on
resistance
VGS= 10 V, ID= 12 A
Max.
30
VDS=Max rating,Tc=100 °C
1
10
µA
µA
±100
nA
1
V
0.025 0.028
0.032 0.040
VGS= 5 V, ID= 12 A
Unit
V
VDS=Max rating
Zero gate voltage drain
current (VGS = 0)
Symbol
Note:
Parameter
IDSS
Table 5.
1.
On/off states
Ω
Ω
Dynamic
Parameter
Test conditions
gfs(1)
Forward transconductance
VDS =15 V, ID= 12 A
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25 V, f=1MHz, VGS=0
Qg
Qgs
Qgd
Total gate charge
Gate-source charge
Gate-drain charge
VDD=15 V, ID = 24 A
VGS =5 V
Figure 15
Min.
Typ.
Max.
Unit
23
S
1670
345
120
pF
pF
pF
18.6
5.5
11
28
nC
nC
nC
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
For the p-channel Power MOSFET actual polarity of voltages and current has to be reversed
3/13
Electrical characteristics
Table 6.
Symbol
td(on)
tr
td(off)
tf
Table 7.
Symbol
STD30PF03LT4 - STD30PF03L-1
Switching times
Parameter
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
RG=4.7 Ω, VGS=5 V
Figure 14
Max
Unit
ns
ns
ns
ns
Source drain diode
Parameter
Test conditions
Source-drain current
Source-drain current (pulsed)
VSD (2)
Forward on voltage
ISD = 12 A, VGS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=24 A, di/dt =100 A/µs,
VDD=50 V, Tj=150 °C
Figure 16
IRRM
Typ
64
122
36
26
VDD=25 V, ID=24 A,
ISD
ISDM (1)
trr
Qrr
Min
Min
Typ
40
52
2.6
Max
Unit
24
96
A
A
1.3
V
ns
µC
A
1. Pulse width limited by safe operating area
2.
Note:
4/13
Pulsed: pulse duration = 300 µs, duty cycle 1.5%
For the p-channel Power MOSFET actual polarity of voltages and current has to be reversed
STD30PF03LT4 - STD30PF03L-1
Electrical characteristics
2.1
Electrical characteristics (curves)
Figure 2.
Safe operating area
Figure 3.
Thermal impedance
Figure 4.
Output characteristics
Figure 5.
Transfer characteristics
Figure 6.
Transconductance
Figure 7.
Static drain-source on resistance
5/13
Electrical characteristics
Figure 8.
STD30PF03LT4 - STD30PF03L-1
Gate charge vs gate-source voltage Figure 9.
Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 11. Normalized on resistance vs
temperature
Figure 12. Source-drain diode forward
characteristics
Figure 13. Normalized breakdown voltage vs
temperature
6/13
STD30PF03LT4 - STD30PF03L-1
3
Test circuit
Test circuit
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
Figure 16. Test circuit for diode recovery
behavior
7/13
Package mechanical data
4
STD30PF03LT4 - STD30PF03L-1
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
8/13
STD30PF03LT4 - STD30PF03L-1
Package mechanical data
DPAK MECHANICAL DATA
mm.
inch
DIM.
MIN.
A
A1
A2
B
b4
C
C2
D
D1
E
E1
e
e1
H
L
(L1)
L2
L4
R
V2
TYP
2.2
0.9
0.03
0.64
5.2
0.45
0.48
6
MAX.
MIN.
2.4
1.1
0.23
0.9
5.4
0.6
0.6
6.2
0.086
0.035
0.001
0.025
0.204
0.017
0.019
0.236
6.6
0.252
5.1
6.4
0.260
0.090
4.6
10.1
0.173
0.368
0.039
2.8
0.8
0.181
0.397
0.110
0.031
1
0.023
0.2
0°
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
0.185
2.28
0.6
MAX.
0.200
4.7
4.4
9.35
1
TYP.
0.039
0.008
8°
0°
8°
0068772-F
9/13
Package mechanical data
STD30PF03LT4 - STD30PF03L-1
TO-251 (IPAK) MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.2
2.4
0.086
0.094
A1
0.9
1.1
0.035
0.043
A3
0.7
1.3
0.027
0.051
B
0.64
0.9
0.025
0.031
B2
5.2
5.4
0.204
0.212
B3
0.85
B5
0.033
0.3
0.012
B6
0.95
C
0.45
C2
0.48
D
6
E
6.4
6.6
0.037
0.6
0.017
0.023
0.6
0.019
0.023
6.2
0.236
0.244
0.252
0.260
G
4.4
4.6
0.173
0.181
H
15.9
16.3
0.626
0.641
L
9
9.4
0.354
0.370
L1
0.8
1.2
0.031
0.047
L2
0.8
1
0.031
0.039
A1
C2
A3
A
C
H
B
B3
=
1
=
2
G
=
=
=
E
B2
=
3
B5
L
D
B6
L2
L1
0068771-E
10/13
STD30PF03LT4 - STD30PF03L-1
5
Packaging mechanical data
Packaging mechanical data
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT
REEL MECHANICAL DATA
DIM.
mm
MIN.
A
B
1.5
C
12.8
D
20.2
G
16.4
N
50
T
TAPE MECHANICAL DATA
DIM.
mm
inch
MIN.
MAX.
A0
6.8
7
0.267 0.275
B0
10.4
10.6
0.409 0.417
B1
D
1.5
D1
1.5
E
1.65
MIN.
12.1
0.476
1.6
0.059 0.063
1.85
0.065 0.073
7.4
7.6
0.291 0.299
2.55
2.75
0.100 0.108
0.153 0.161
P0
3.9
4.1
P1
7.9
8.1
0.311 0.319
P2
1.9
2.1
0.075 0.082
40
15.7
MAX.
330
12.992
13.2
0.504 0.520
18.4
0.645 0.724
0.059
0.795
1.968
22.4
0.881
BASE QTY
BULK QTY
2500
2500
0.059
F
R
MIN.
MAX.
K0
W
inch
MAX.
1.574
16.3
0.618
0.641
11/13
Revision history
6
STD30PF03LT4 - STD30PF03L-1
Revision history
Table 8.
12/13
Document revision history
Date
Revision
14-Jan-2008
2
Changes
– Document reformatted
– Corrected marking on Table 1: Device summary
STD30PF03LT4 - STD30PF03L-1
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13/13