STL23NM60ND N-channel 600 V, 0.150 Ω, 19.5 A, FDmesh™ II Power MOSFET (with fast diode) PowerFLAT™ (8x8) HV Preliminary data Features VDSS Type (@Tjmax) STL23NM60ND RDS(on) max ID < 0.180 Ω 19.5 A(1) 650 V 3 3 3 "OTTOMVIEW ' $ 1. This value is rated according to Rthj-case. ■ The worldwide best RDS(on) * area amongst the fast recovery diode devices ■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance ■ High dv/dt and avalanche capabilities Application ■ 0OWER&,!4X(6 Figure 1. Internal schematic diagram Switching applications $ Description The FDmesh™ II series belongs to the second generation of MDmesh™ technology. This revolutionary Power MOSFET associates a new vertical structure to the company's strip layout and associates all advantages of reduced onresistance and fast switching with an intrinsic fastrecovery body diode.It is therefore strongly recommended for bridge topologies, in particular ZVS phase-shift converters. Table 1. ' 3 !-V Device summary Order code Marking Package Packaging STL23NM60ND 23NM60ND PowerFLAT™ 8x8 HV Tape and reel April 2010 Doc ID 17439 Rev 1 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/11 www.st.com 11 Contents STL23NM60ND Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2/11 .............................................. 6 Doc ID 17439 Rev 1 STL23NM60ND 1 Electrical ratings Electrical ratings Table 2. Symbol Absolute maximum ratings Parameter Value Unit VDS Drain-source voltage (VGS = 0) 600 V VGS Gate-source voltage ± 25 V Drain current (continuous) at TC = 25 °C 19.5 A Drain current (continuous) at TC = 100 °C 11.7 A 78 A ID (1) ID (1) (1),(2) Drain current (pulsed) ID (3) Drain current (continuous) at TC = 25 °C 2.75 A ID (3) Drain current (continuous) at TC = 100 °C 1.75 A 11 A IDM IDM(2),(3) Drain current (pulsed) PTOT (3) Total dissipation at TC = 25 °C (steady state) 150 W PTOT (1) Total dissipation at TC = 25 °C (steady state) 3 W IAR Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max) 9 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 700 mJ Peak diode recovery voltage slope 40 V/ns - 55 to 150 °C 150 °C Value Unit dv/dt (4) Tstg Tj Storage temperature Max. operating junction temperature 1. The value is rated according to Rthj-case 2. Pulse width limited by safe operating area 3. When mounted on FR-4 board of inch², 2oz Cu 4. ISD ≤ 19.5 A, di/dt ≤ 400 A/µs, VPeak < V(BR)DSS Table 3. Symbol Thermal data Parameter Rthj-case Thermal resistance junction-case max 0.83 °C/W Rthj-amb(1) Thermal resistance junction-amb max 45 °C/W Maximum lead temperature for soldering purposes 300 °C Tl 1. When mounted on 1inch² FR-4 board, 2 oz Cu Doc ID 17439 Rev 1 3/11 Electrical characteristics 2 STL23NM60ND Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage ID = 1 mA, VGS= 0 Drain-source voltage slope VDD = 480 V, ID = 19.5 A, VGS = 10 V IDSS Zero gate voltage drain current (VGS = 0) VDS = Max rating, VDS = Max rating,@125 °C 1 100 µA µA IGSS Gate body leakage current (VDS = 0) VGS = ±20 V 100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 5 V RDS(on) Static drain-source on resistance VGS= 10 V, ID= 10 A V(BR)DSS dv/dt(1) 1. On/off states 600 V 48 3 4 V/ns 0.150 0.180 Ω Characteristic value at turn off on inductive load Table 5. Symbol Dynamic Min. Typ. Max. Unit VDS = 50 V, f =1 MHz, VGS = 0 - 2050 80 8 - pF pF pF Equivalent output capacitance VGS = 0, VDS = 0 to 480 V - 318 - pF Rg Gate input resistance f=1 MHz Gate DC Bias=0 Test signal level=20 mV open drain - 4 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 480 V, ID = 19.5 A VGS = 10 V (see Figure 3) - 70 10 30 - nC nC nC Ciss Coss Crss Coss eq.(1) Parameter Test conditions Input capacitance Output capacitance Reverse transfer capacitance 1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 4/11 Doc ID 17439 Rev 1 STL23NM60ND Electrical characteristics Table 6. Switching times Symbol Parameter td(on) tr td(off) tf Table 7. Turn-on delay time Rise time Turn-off delay time Fall time VDD = 300 V, ID = 10 A, RG = 4.7 Ω, VGS = 10 V (see Figure 2) Parameter ISD ISDM(1) Source-drain current Source-drain current (pulsed) VSD(2) Forward on voltage IRRM trr Qrr IRRM Min. Typ. - 25 45 90 40 Max. Unit - ns ns ns ns Source drain diode Symbol trr Qrr Test conditions Test conditions Min. Typ. Max. Unit - 19.5 78 A A ISD = 19.5 A, VGS=0 - 1.3 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 19.5 A, di/dt =100 A/µs, VDD = 100 V (see Figure 4) - 190 1.2 13 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current VDD = 100 V di/dt =100 A/µs, ISD = 19.5 A, Tj = 150 °C (see Figure 4) - 260 2.0 15 ns µC A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300µs, duty cycle 1.5% Doc ID 17439 Rev 1 5/11 Test circuits STL23NM60ND 3 Test circuits Figure 2. Switching times test circuit for resistive load Figure 3. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 µF 2200 RL µF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 µF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 4. AM01469v1 Test circuit for inductive load Figure 5. switching and diode recovery times A A D.U.T. FAST DIODE B B Unclamped inductive load test circuit L A D G VD L=100µH S 3.3 µF B 25 Ω 1000 µF D VDD 2200 µF 3.3 µF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 6. Unclamped inductive waveform AM01471v1 Figure 7. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 6/11 0 Doc ID 17439 Rev 1 10% AM01473v1 STL23NM60ND 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Doc ID 17439 Rev 1 7/11 Package mechanical data Table 8. STL23NM60ND PowerFLAT™ 8x8 HV mechanical data mm Dim. A Min. Typ. Max. 0.80 0.90 1.00 0.02 0.05 1.00 1.05 A1 b 0.95 c 0.10 D 8.00 E 8.00 D2 7.05 7.20 7.30 E2 4.15 4.30 4.40 e 2.00 L Figure 8. 0.40 0.50 0.60 PowerFLAT™ 8x8 HV drawing mechanical data BOTTOM VIEW b L e E2 PIN#1 ID 0.40 D D2 E INDEX AREA SIDE VIEW A A1 TOP VIEW SEATING PLANE 0.08 C AM05542v1 8/11 Doc ID 17439 Rev 1 STL23NM60ND PowerFLAT™ 8x8 HV recommended footprint 4.40 7.30 2.00 1.05 0.60 Figure 9. Package mechanical data AM05543v1 Doc ID 17439 Rev 1 9/11 Revision history 5 STL23NM60ND Revision history Table 9. 10/11 Document revision history Date Revision 28-Apr-2010 1 Changes First release Doc ID 17439 Rev 1 STL23NM60ND Please Read Carefully: Information in this document is provided solely in connection with ST products. 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