STY80NM60N N-channel 600 V - 0.035 Ω - 80 A - Max247 second generation MDmesh™ Power MOSFET Preliminary Data Features Type VDSS RDS(on) ID Pw STY80NM60N 600 V < 0.040 Ω 80 A 560 W ■ 100% avalanche tested ■ Low input capacitance and gate charge ■ Low gate input resistance 1 3 Max247 Application ■ 2 Switching applications Description This series of devices implements second generation MDmesh™ technology. This revolutionary Power MOSFET associates a new vertical structure to the Company’s strip layout to yield one of the world’s lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters. Table 1. Figure 1. Internal schematic diagram Device summary Order code Marking Package Packaging STY80NM60N 80NM60N Max247 Tube December 2007 Rev 2 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/9 www.st.com 9 Electrical ratings 1 STY80NM60N Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0) 600 V VGS Gate- source voltage ±25 V ID Drain current (continuous) at TC = 25 °C 80 A ID Drain current (continuous) at TC = 100 °C 50.4 A Drain current (pulsed) 320 A Total dissipation at TC = 25 °C 560 W Derating factor 4.48 W/°C 15 V/ns –55 to 150 °C 150 °C Value Unit 0.22 °C/W IDM (1) PTOT dv/dt (2) Tstg Tj Peak diode recovery voltage slope Storage temperature Max. operating junction temperature 1. Pulse width limited by safe operating area 2. ISD ≤ 80A, di/dt ≤ 400 A/µs, VDD =80% V(BR)DSS Table 3. Symbol Parameter Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max 30 °C/W Tl Maximum lead temperature for soldering purpose 300 °C Value Unit Table 4. Symbol 2/9 Thermal data Avalanche characteristics Parameter IAS Avalanche current, repetitive or not-repetitive (pulse width limited by Tj Max) Tbd A EAS Single pulse avalanche energy (starting Tj=25°C, Id=Ias, Vdd=50 V) Tbd mJ STY80NM60N 2 Electrical characteristics Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. Symbol On/off states Parameter Test conditions Min. Typ. Max. Unit V(BR)DSS Drain-source breakdown voltage ID = 1 mA, VGS = 0 dv/dt (1) Drain source voltage slope Vdd = 480 V, Id = 80 A, Vgs = 10 V IDSS Zero gate voltage drain current (VGS = 0) VDS = Max rating VDS = Max rating, @125 °C 1 10 µA µA IGSS Gate-body leakage current (VDS = 0) VGS = ± 20 V 100 nA VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source on resistance VGS = 10 V, ID = 40 A 0.035 0.04 Ω 600 V Tbd 2 V/ns 1. Characteristic value at turn off on inductive load Table 6. Symbol Dynamic Parameter Test conditions Min. Typ. Max. Unit gfs (1) Forward transconductance VDS=15 V, ID =40 A Tbd Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 50 V, f = 1 MHz, VGS = 0 Tbd Tbd Tbd Equivalent output capacitance VGS = 0 V, VDS = 0 V to 480 V Tbd pF Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 480 V, ID = 80 A, VGS = 10 V, (see Figure 3) Tbd Tbd Tbd nC nC nC Rg Gate input resistance f=1MHz Gate DC Bias=0 Test signal level = 20 mV open drain Tbd Ω Coss eq. (2) S pF pF pF 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDS 3/9 Electrical characteristics Table 7. Symbol td(on) tr td(off) tf Table 8. Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM trr Qrr IRRM STY80NM60N Switching times Parameter Turn-on delay time Rise time Turn-off delay time Fall time Test conditions Typ. Max. Unit Tbd Tbd Tbd Tbd VDD = 300 V, ID = 40A RG = 4.7 Ω VGS = 10 V (see Figure 2) ns ns ns ns Source drain diode Parameter Test conditions Min Typ. Source-drain current Source-drain current (pulsed) Max Unit 80 320 A A 1.5 V Forward on voltage ISD = 80 A, VGS = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 80 A, di/dt = 100 A/µs VDD = 100 V, Tj = 25 °C (see Figure 4) Tbd Tbd Tbd ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 80 A, di/dt = 100 A/µs VDD = 100 V, Tj = 150 °C (see Figure 4) Tbd Tbd Tbd ns µC A 1. Pulse width limited by safe operating area 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% 4/9 Min. STY80NM60N Test circuit 3 Test circuit Figure 2. Switching times test circuit for resistive load Figure 4. Test circuit for inductive load Figure 5. switching and diode recovery times Unclamped Inductive load test circuit Figure 6. Unclamped inductive waveform Switching time waveform Figure 3. Figure 7. Gate charge test circuit 5/9 Package mechanical data 4 STY80NM60N Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 6/9 STY80NM60N Package mechanical data Max247 MECHANICAL DATA mm DIM. MIN. TYP. inch MAX. A 4.70 5.30 A1 2.20 2.60 b 1.00 1.40 b1 2.00 2.40 b2 3.00 3.40 c 0.40 0.80 D 19.70 20.30 e 5.35 5.55 E 15.30 15.90 L 14.20 15.20 L1 3.70 4.30 MIN. TYP. MAX. P025Q 7/9 Revision history 5 STY80NM60N Revision history Table 9. 8/9 Document revision history Date Revision Changes 29-Nov-2007 1 First release 04-Dec-2007 2 Header has been corrected STY80NM60N Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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