TESDQ5V0 Bi-directional ESD Protection Diode Small Signal Diode DFN1006 ( 0402 ) Features Meet IEC61000-4-2 (ESD) ±15kV (air), ±8kV (contact) Meet IEC61000-4-4 (EFT) rating. 40A (5/50ήs) 100W Peak Pulse Power per Line (tp=8/20μs) Protects one birectional I/O line Working Voltage : 5V Pb free version, RoHS compliant, and Halogen free Mechanical Data Unit (mm) Dimensions Case : DFN1006(0402) 1.0mm x 0.6mm x 0.5mm package, Unit (inch) Min Max Min Max A 0.950 1.050 0.037 0.041 Molding Compound Flammability Ratting: UL94V-0 B 0.550 0.650 0.022 0.026 Terminal: Gold plated,solder C 0.450 0.550 0.018 0.022 D 0.275 0.325 0.011 0.013 E 0.275 0.325 0.011 0.013 molded plastic per MIL-STD-750, Method 2026 guaranteed High temperature soldering guaranteed: 260°C/10s Mounting position: Any Weight :0.5 mg (approximately) Marking Code : M Applications Pin Configutation Cell Phone Handsets and Accessories Notebooks, Desktops, and Servers Keypads, Side Keys, LCD Displays Portable Instrumentation Suggested PAD Layout Touch panel Ordering Information Part No. Package Packing TESDQ5V0 0402 5K / 7" Reel Packing Code Marking RJG M Maximum Ratings and Electrical Characteristics Rating at 25°C ambient temperature unless otherwise specified. Maximum Ratings Type Number Dimensions Value (in mm) X 0.354 X1 1.110 Y 0.354 Symbol Value Units Peak Pulse Power (tp=8/20μs waveform) PPP 100 W ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) VESD ±30 ±8 KV Junction and Storage Temperature Range TJ, TSTG . -55 to + 150 °C . Electrical Characteristics Type Number Reverse Stand-Off Voltage Reverse Breakdown Volta IR= Reverse Leakage Curren VR= IPP= IPP= Clamping Voltage Junction Capacitance 1mA 5V 1A 2A VR=0V, f=1.0MHz Min - V(BR) 6 - V IR - 1 12.5 20 uA Vc CJ Max 5 Units V Symbol VRWM 10 (Typ.) V pF Notes: 1. The suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary despending on application. Version : C11 TESDQ5V0 Bi-directional ESD Protection Diode Small Signal Diode Rating and Characteristic Curves FIG 1 Admissible Power Derating Curve FIG 2 Pulse Waveform 110 120 100 Waveform Parameters: tr = 8μs, td = 20μs 90 Percent of IPP Power Rating (%) 100 80 60 80 70 e-1 60 50 40 40 td=Ipp/2 30 20 20 10 0 0 0 20 40 60 80 100 120 140 160 0 180 5 FIG 3 Max. Clamping Voltage vs. Peak Pulse 15 20 25 30 FIG 4 Typical Junction Capacitance 25 15 Normalized Capacitance(pF) Clamping Voltage - Vc(V) 10 Time (us) Ambient Tempeatature ( oC) 20 10 15 10 Waveform Parameters: tr = 8μs, td = 20μs 5 5 f = 1.0MHz 0 0 1 2 3 4 5 0 0 1 Peak Pulse Current - Ipp (A) 2 3 4 5 Reverse Voltage (V) Applications Information Designed to protect one data, I/O, or power supply line. Designed to protect sensitive electronics from damage or latch-up due to ESD Designed to replace multilayer varistors (MLVs) in portable applications Features large crosssectional area junctions for conducting high transient currents Offers superior electrical characteristics such as lower clamping voltage and no device degradation when compared to MLVs The combination of small size and high ESD surge capability makes them ideal for use in portable applications. Circuit Board Layout Recommendations Good circuit board layout is critical for the suppression of ESD induced transients. Place the ESD Protection Diode near the input terminals or connectors to restrict transient Minimize the path length between the ESD Protection Diode and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible. Version : C11 TESDQ5V0 Bi-directional ESD Protection Diode Small Signal Diode Carrier & Reel specification TSC label Item Top Cover Tape Carieer Tape Any Additional Label (If Required) P0 D P1 T 10 Pitches Cumulative Tolerance on Tape ±2.0mm ( ±0.008") E F K0 Carrier depth K 1.2 Max. Sprocket hole D 1.50 +0.10 Reel outside diameter A 178 ± 1 Reel inner diameter D1 50 Min. Feed hole width D2 13.0 ± 0.5 Sprocke hole position E 1.75 ±0.10 Sprocke hole pitch P0 4.00 ±0.10 Embossment center P1 2.00 ±0.10 Overall tape thickness T 0.6 Max. Tape width W 8.30 Max. Reel width W1 14.4 Max. D' Top Cover Tape See Note1 K Dimension(mm) W BB0 0 B1 Symbol For Components 2.0mm X 1.2mm and Larger A0 Center Lines of Cavity Embossment For Machine Reference Only Including Draft and RADLL Concentric Around B 0 W1 D D2 D1 Direction of Feed Note 1: A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min. to 0.1 mm max. The component cannot rote more than 10o within the determined cavity. Note 2: If B1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. Version : C11