MICROCHIP MCP6286T-E/OT

MCP6286
Low Noise, Low Power Op Amp
Features
Description
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The Microchip Technology Inc. MCP6286 operational
amplifier (op amp) has low noise (5.4 nV/√Hz, typical),
low power (520 µA, typical) and rail-to-rail output
operation. It is unity gain stable and has a gain
bandwidth product of 3.5 MHz (typical). This device
operates with a single supply voltage as low as 2.2V,
while drawing low quiescent current. These features
make the product well suited for single-supply, low
noise, battery-powered applications.
Low Noise: 5.4 nV/√Hz (typical)
Low Quiescent Current: 520 µA (typical)
Rail-to-Rail Output
Wide Supply Voltage Range: 2.2V to 5.5V
Gain Bandwidth Product: 3.5 MHz (typical)
Unity Gain Stable
Extended Temperature Range: -40°C to +125°C
No Phase Reversal
Small Package
Applications
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Noise Cancellation Headphones
Cellular Phones
Analog Filters
Sensor Conditioning
Portable Instrumentation
Medical Instrumentation
Battery Powered Systems
Package Types
MCP6286
SOT-23-5
VOUT 1
VSS 2
VIN+ 3
Design Aids
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The MCP6286 op amp is offered in a space saving
SOT-23-5 package. It is designed with Microchip’s
advanced CMOS process and available in the
extended temperature range, with a power supply
range of 2.2V to 5.5V.
5 VDD
4 VIN–
SPICE Macro Models
FilterLab® Software
Mindi™ Circuit Designer & Simulator
MAPS (Microchip Advanced Part Selector)
Analog Demonstration and Evaluation Boards
Application Notes
Typical Application
C1
47 nF
R2
R1
382 kΩ 641 kΩ
+
VIN
C2
22 nF
fP = 10 Hz
MCP6286
VOUT
–
G = +1 V/V
Second-Order, Low-Pass Butterworth Filter
© 2009 Microchip Technology Inc.
DS22196A-page 1
MCP6286
NOTES:
DS22196A-page 2
© 2009 Microchip Technology Inc.
MCP6286
1.0
ELECTRICAL CHARACTERISTICS
1.1
Absolute Maximum Ratings †
VDD – VSS ........................................................................7.0V
Current at Input Pins .....................................................±2 mA
Analog Inputs (VIN+, VIN-)†† .......... VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ...................................... |VDD – VSS|
Output Short-Circuit Current .................................continuous
Current at Output and Supply Pins ............................±30 mA
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
†† See 4.1.2 “Input Voltage And Current Limits”
Storage Temperature ....................................-65°C to +150°C
Maximum Junction Temperature (TJ).......................... +150°C
ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 400V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +2.2V to +5.5V, VSS= GND, TA= +25°C, VCM = VDD/3,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
Input Offset Voltage
Input Offset Drift with Temperature
Power Supply Rejection Ratio
VOS
-1.5
—
+1.5
ΔVOS/ΔTA
—
±1
—
PSRR
80
100
—
IB
—
±1
—
pA
—
50
150
pA
TA = +85°C
TA = +125°C
mV
µV/°C TA= -40°C to +125°C
dB
Input Bias Current and Impedance
Input Bias Current
—
1500
3000
pA
Input Offset Current
IOS
—
±1
—
pA
Common Mode Input Impedance
ZCM
—
1013||20
—
Ω||pF
Differential Input Impedance
ZDIFF
—
1013||20
—
Ω||pF
Common Mode Input Voltage
Range
VCMR
VSS−0.3
—
VDD-1.2
V
Note 1
Common Mode Rejection Ratio
CMRR
76
95
—
dB
VCM = -0.3V to 1.0V,
VDD = 2.2V
80
100
—
dB
VCM = -0.3V to 4.3V,
VDD = 5.5V
AOL
100
120
—
dB
0.2V < VOUT <(VDD-0.2V)
VOL, VOH
VSS+15
—
VDD–15
mV
0.5V Input overdrive
VSS+75
—
VDD–75
mV
0.5V Input overdrive
RL = 2 kΩ
—
±20
—
mA
Common Mode
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
Output
Maximum Output Voltage Swing
Output Short-Circuit Current
Note 1:
ISC
Figure 2-12 shows how VCMR changes across temperature.
© 2009 Microchip Technology Inc.
DS22196A-page 3
MCP6286
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, VDD = +2.2V to +5.5V, VSS= GND, TA= +25°C, VCM = VDD/3,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 10 kΩ to VL. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
VDD
2.2
—
5.5
V
IQ
300
520
700
µA
IO = 0, VDD = 2.2V
320
540
720
µA
IO = 0, VDD = 5.5V
Power Supply
Supply Voltage
Quiescent Current per Amplifier
Note 1:
Figure 2-12 shows how VCMR changes across temperature.
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +2.2 to +5.5V, VSS = GND, VCM = VDD/3,
VOUT ≈ VDD/2, VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
GBWP
—
3.5
—
MHz
Phase Margin
PM
—
60
—
°
Slew Rate
SR
—
2
—
V/µs
Input Noise Voltage
Eni
—
1.0
—
µVP-P
Input Noise Voltage Density
eni
—
22
—
nV/√Hz
f = 10 Hz
—
5.4
—
nV/√Hz
f = 10 kHz
—
0.6
—
fA/√Hz
f = 1 kHz
AC Response
Gain Bandwidth Product
G = +1 V/V
Noise
Input Noise Current Density
ini
f = 0.1 Hz to 10 Hz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +2.2V to +5.5V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
θJA
—
256
—
°C/W
Conditions
Temperature Ranges
Note 1
Thermal Package Resistances
Thermal Resistance, 5L-SOT-23
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
DS22196A-page 4
© 2009 Microchip Technology Inc.
MCP6286
1.2
Test Circuits
The circuit used for most DC and AC tests is shown in
Figure 1-1. It independently sets VCM and VOUT; see
Equation 1-1. The circuit’s common mode voltage is
(VP + VM)/2, not VCM. VOST includes VOS plus the
effects of temperature, CMRR, PSRR and AOL.
EQUATION 1-1:
G DM = R F ⁄ R G
CF
6.8 pF
RG
100 kΩ
V OST = V IN– – V IN+
VOST = Op Amp’s Total Input Offset
Voltage
© 2009 Microchip Technology Inc.
CB1
100 nF
MCP6286
V OUT = V REF + ( V P – V M )G DM + V OST G N
Where:
VCM = Op Amp’s Common Mode
Input Voltage
VDD
VIN+
G N = 1 + G DM
GN = Noise Gain
VREF = VDD/2
VP
V CM = V P ( 1 – 1 ⁄ G N ) + V REF ( 1 ⁄ G N )
GDM = Differential Mode Gain
RF
100 kΩ
CB2
1 µF
VIN–
(V/V)
(V/V)
VM
RG
100 kΩ
RL
10 kΩ
RF
100 kΩ
VOUT
CL
60 pF
(V)
(mV)
CF
6.8 pF
VL
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
DS22196A-page 5
MCP6286
NOTES:
DS22196A-page 6
© 2009 Microchip Technology Inc.
MCP6286
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
14%
800
Input Offset Voltage (µV)
-600
600
VDD = 5.5V
600
Representative Part
400
200
0
-200
-400
-600
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-800
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 5.5V.
© 2009 Microchip Technology Inc.
FIGURE 2-5:
Output Voltage.
Input Offset Voltage (µV)
Input Offset Voltage (µV)
800
1.5
1.7
5.5
5.0
4.5
4.0
Output Voltage (V)
Input Offset Drift with Temperature (µV/°C)
Input Offset Voltage Drift.
3.5
0.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
0%
VDD = 5.5V
3.0
5%
2.5
10%
2.0
15%
VDD = 2.2V
1.5
20%
1.0
25%
500
400
300
200
100
0
-100
-200
-300
-400
-500
0.5
Input Offset Voltage (µV)
30%
FIGURE 2-2:
1.3
FIGURE 2-4:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 2.2V.
1360 Samples
-3.5
Percentage of Occurrences
Input Offset Voltage.
40%
35%
1.1
-0.5
Common Mode Input Voltage (V)
Input Offset Voltage (µV)
FIGURE 2-1:
0.9
-800
800
600
500
400
300
200
0
100
-100
-200
-300
-400
-500
-600
0%
TA = +125 °C
TA = +85°C
TA = +25°C
TA = -40°C
-400
0.7
2%
0
-200
0.5
4%
200
0.3
6%
400
0.1
8%
-0.1
10%
Representative Part
VDD = 2.2V
600
-0.3
1360 Samples
12%
-800
Percentage of Occurrences
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/3, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
Input Offset Voltage vs.
VCM = VCMR-L
Representative Part
400
200
0
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-200
-400
-600
1.5
2.0
2.5 3.0 3.5 4.0 4.5 5.0
Power Supply Voltage (V)
5.5
6.0
FIGURE 2-6:
Input Offset Voltage vs.
Power Supply Voltage with VCM = VCMR_L.
DS22196A-page 7
MCP6286
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/3, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
VCM = VCMR-H
400
Representative Part
CMRR, PSRR (dB)
Input Offset Voltage (µV)
600
200
0
-200
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
-400
-600
1.5
2.0
2.5 3.0 3.5 4.0 4.5 5.0
Power Supply Voltage (V)
5.5
120
110
100
90
80
70
60
50
40
30
20
100
1k
10k 100000
100k 1E+06
1M
100
1000
10000
Frequency (Hz)
CMRR, PSRR vs.
CMRR @ VDD = 5.5V
@ VDD = 2.2V
105
CMRR, PSRR (dB)
Input Noise Voltage Density
(nV/√ Hz)
10
10
110
100
10
100
95
90
PSRR
85
80
75
1
0.1 1.E+0
1
10
100 1.E+3
1k
10k 100k
1M
1.E-1
1.E+1
1.E+2
1.E+4
1.E+5 1.E+6
Frequency (Hz)
FIGURE 2-8:
vs. Frequency.
Input Noise Voltage Density
-50
7.0
6.5
f = 10 kHz
6.0
VDD = 5.5 V
5.5
5.0
4.5
VDD = 2.2 V
4.0
3.5
-0.3
0.0
0.3
0.6
0.9
1.2
1.5
1.8
2.1
2.4
2.7
3.0
3.3
3.6
3.9
4.2
4.5
3.0
Common Mode Input Voltage (V)
FIGURE 2-9:
Input Noise Voltage Density
vs. Common Mode Input Voltage.
DS22196A-page 8
-25
0
25
50
75
Ambient Temperature (°C)
FIGURE 2-11:
Temperature.
Common Mode Input Voltage
Headroom (V)
Input Voltage Noise Density
(nV/√ Hz)
CMRR
FIGURE 2-10:
Frequency.
1,000
Representative Part
PSRR+
11
6.0
FIGURE 2-7:
Input Offset Voltage vs.
Power Supply Voltage with VCM = VCMR_H.
PSRR-
100
125
CMRR, PSRR vs. Ambient
1.20
1.05
0.90
0.75
0.60
0.45
0.30
0.15
0.00
-0.15
-0.30
VDD - VCMR_H @ VDD = 5.5V
@ VDD = 2.2V
VCMR_L - VSS @ VDD = 2.2V
VOL - VSS @ VDD = 5.5V
V
V
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
125
FIGURE 2-12:
Common Mode Input
Voltage Headroom vs. Ambient Temperature.
© 2009 Microchip Technology Inc.
MCP6286
700
10000
Quiescent Current (uA)
VDD = 5.5V
1000
Input Bias Current
10
100
-150
0
VDD = 5.5V
500
VDD = 2.2V
400
350
300
250
-25
0
25
50
75
Ambient Temperature (°C)
100
FIGURE 2-15:
Quiescent Current vs
Ambient Temperature.
© 2009 Microchip Technology Inc.
1
1.0E+01
10
125
6.0
-210
1.0E+02
1.0E+03
1.0E+04
1.0E+05
1.0E+06
1.0E+07
100 1k 10k 100k 1M 10M
Frequency (Hz)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Open-Loop Gain, Phase vs.
100
90
80
70
60
50
40
30
20
10
0
Gain Bandwidth Product
Phase Margin
VDD = 5.5V
0.8
600
450
1.0E+00
0.2
650
-0.4
Gain Bandwidth Product
(MHz)
700
550
-180
VDD = 5.5V
-20 1.0E-01
0.1
Open-Loop Phase (°)
20
FIGURE 2-17:
Frequency.
FIGURE 2-14:
Input Bias Current vs.
Common Mode Input Voltage.
5.5
-120
Phase (°)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Votlage (V)
-90
40
4.4
TA = +85°C
200
60
3.8
400
-60
Open-Loop Phase
3.2
600
-30
80
2.6
800
100
2.0
TA = +125°C
0
Open-Loop Gain
1.4
Open-Loop Gain (dB)
1000
5.0
4.5
4.0
3.5
FIGURE 2-16:
Quiescent Current vs.
Power Supply Voltage.
120
0
Quiescent Current (µA)
3.0
Power Supply Voltage (V)
VDD = 5.5V
1200
-50
2.5
45 55 65 75 85 95 105 115 125
Ambient Temperature (°C)
2.0
0
FIGURE 2-13:
Input Bias, Offset Currents
vs. Ambient Temperature.
Input Bias Current (pA)
200
1.5
35
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
300
1.0
25
1400
400
Input Offset Current
1
1600
500
0.5
100
600
0.0
Input Bias, Offset Currents (pA)
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/3, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
Common Mode Input Voltage (V)
FIGURE 2-18:
Gain Bandwidth Product,
Phase Margin vs. Common Mode Input Voltage
with VDD = 5.5V.
DS22196A-page 9
MCP6286
VDD = 5.5V
-50
-25
0
25
50
75 100
Ambient Temperature (°C)
90
85
80
75
70
65
60
55
50
45
40
125
3.0
2.5
0.5
0.0
80
75
70
65
2.0
1.5
1.0
Phase Margin
VDD = 2.2V
-50
-25
0
25
50
75 100
Ambient Temperature (°C)
60
55
50
45
40
125
FIGURE 2-21:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature with
VDD = 2.2V.
DS22196A-page 10
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
VDD = 5.5V
VDD = 2.2V
1
100
100
1k
1000
FIGURE 2-23:
Frequency.
10k
100k
10000
100000
Frequency (Hz)
1M
1000000
10M
10000000
Output Voltage Swing vs.
1000
Phase (°)
Gain Bandwidth Product
(MHz)
Gain Bandwidth Product
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
5
0.1
90
85
4.0
3.5
10
10
FIGURE 2-20:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature with
VDD = 5.5V.
5.0
4.5
15
FIGURE 2-22:
Ouput Short Circuit Current
vs. Power Supply Voltage.
Output Voltage Swing (VP-P)
Phase Margin
20
Power Supply Voltage (V)
Phase (°)
Gain Bandwidth Product
(MHz)
Gain Bandwidth Product
25
1.1
FIGURE 2-19:
Gain Bandwidth Product,
Phase Margin vs. Common Mode Input Voltage
with VDD = 2.2V.
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Output Short Circuit Current
(mA)
100
90
80
70
60
50
40
30
20
10
0
Output Voltage Headroom
(mV)
5.0
4.5
Gain Bandwidth Product
4.0
3.5
3.0
2.5
Phase Margin
2.0
1.5
1.0
0.5 VDD = 2.2V
0.0
-0.4
-0.1
0.2
0.5
0.8
Common Mode Input Voltage (V)
Phase (°)
Gain Bandwidth Product
(MHz)
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/3, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF
100
10
VOL - VSS
VDD - VOH
1
0.01
0.1
1
Output Current (mA)
10
FIGURE 2-24:
Output Voltage Headroom
vs. Output Current.
© 2009 Microchip Technology Inc.
MCP6286
60
55
50
45
40
35
30
25
20
15
10
5
0
Output Voltage (50 mV/div)
Output Voltage Headroom
VDD - VOH, VOL - VSS (mV)
Note: Unless otherwise indicated, TA = +25°C, VDD = +2.2V to +5.5V, VSS = GND, VCM = VDD/3, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
VDD - VOH @ RL = 2kΩ
VOL - VSS @ RL = 2kΩ
VDD - VOH @ RL = 10kΩ
VOL - VSS @ RL = 10kΩ
-50
-25
0
25
50
75
100
Ambient Temperature (°C)
125
FIGURE 2-25:
Output Voltage Headroom
vs. Ambient Temperature.
Time (1 µs/div)
FIGURE 2-28:
Response.
3.0
2.8
Slew Rate (V/µs)
2.4
Output Voltage (V)
Falling Edge, VDD = 5.5V
Rising Edge, VDD = 5.5V
2.6
2.2
2.0
1.8
1.6
Falling Edge, VDD = 2.2V
Rising Edge, VDD = 2.2V
1.4
1.2
1.0
-25
Output Voltage (50 mV/div)
FIGURE 2-26:
Temperature.
0
25
50
75
Temperature (°C)
100
125
Slew Rate vs. Ambient
VDD = 5.5V
G = +1 V/V
Time (1 µs/div)
FIGURE 2-27:
Pulse Response.
Small Signal Non-Inverting
© 2009 Microchip Technology Inc.
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
FIGURE 2-29:
Pulse Response.
Output Voltage (V)
-50
VDD = 5.5V
G = -1 V/V
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Small Signal Inverting Pulse
VDD = 5.5V
G = +2 V/V
Time (5 µs/div)
Large Signal Non-Inverting
VDD = 5.5V
G = -2 V/V
Time (5 µs/div)
FIGURE 2-30:
Response.
Large Signal Inverting Pulse
DS22196A-page 11
MCP6286
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/3, VOUT ≈ VDD/2,
VL = VDD/2, RL = 10 kΩ to VL and CL = 60 pF.
1m
1m
1m
1000000000
5.0
100
µ
100000000
100
100
µµ
10000000
10µ
10µ
10µ
1µ
1000000
1µ
1µ
VOUT
4.0
VIN
-I IN (A)
Input, Output Voltages (V)
6.0
3.0
100000
100n
100n
10000
10n
10n
1000
1n
1n
100
100p
100p
2.0
1.0
VDD = 5.5V
G = +2 V/V
0.0
10p
10p10
1p1
1p
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
-1.0
V IN (V)
Time (1 ms/div)
FIGURE 2-31:
Phase Reversal.
The MCP6286 Shows No
FIGURE 2-33:
Measured Input Current vs.
Input Voltage (below VSS).
Closed Loop Output
Impedance (Ω)
1000
100
10
GN:
101 V/V
11 V/V
1 V/V
1
0.1
10
10
100
100
1k
1000
10k 100000
100k 1E+06
1M
10M
10000
1E+07
Frequency (Hz)
FIGURE 2-32:
Closed Loop Output
Impedance vs. Frequency.
DS22196A-page 12
© 2009 Microchip Technology Inc.
MCP6286
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6286
SOT-23-5
3.1
Symbol
1
VOUT
2
VSS
3
VIN+
Non-inverting Input
4
VIN–
Inverting Input
5
VDD
Positive Power Supply
Analog Output
The output pin is low-impedance voltage source.
3.2
Description
Analog Inputs
The non-inverting and inverting inputs are
high-impedance CMOS inputs with low bias currents.
© 2009 Microchip Technology Inc.
Analog Output
Negative Power Supply
3.3
Power Supply Pins
The positive power supply (VDD) is 2.2V to 5.5V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
DS22196A-page 13
MCP6286
NOTES:
DS22196A-page 14
© 2009 Microchip Technology Inc.
MCP6286
4.0
APPLICATION INFORMATION
VDD
The MCP6286 op amp is manufactured using
Microchip’s state-of-the-art CMOS process and is
specifically designed for low-power, low-noise
applications.
4.1
D1
R1
Input
4.1.1
MCP6286
V2
PHASE REVERSAL
R2
The MCP6286 op amp is designed to prevent phase
reversal when the input pins exceed the supply
voltages. Figure 2-31 shows the input voltage
exceeding the supply voltage without any phase
reversal.
4.1.2
D2
V1
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltage that goes too far
above VDD; their breakdown voltage is high enough to
allow normal operation and low enough to bypass ESD
events within the specified limits.
R3
VSS – (minimum expected V1)
2 mA
VSS – (minimum expected V2)
R2 >
2 mA
R1 >
FIGURE 4-2:
Inputs.
Protecting the Analog
It is also possible to connect the diodes to the left of the
resistors R1 and R2. In this case, the currents through
the diodes D1 and D2 need to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC currents into the input pins (VIN+ and
VIN-) should be very small. A significant amount of
current can flow out of the inputs when the common
mode voltage (VCM) is below ground (VSS). (See
Figure 2-33).
VDD Bond
Pad
4.1.3
VIN+ Bond
Pad
The input stage of the MCP6286 op amp uses a PMOS
input stage. It operates at low common mode input
voltage (VCM), including ground. With this topology, the
device operates with a VCM up to VDD - 1.2V and 0.3V
below VSS. (See Figure 2-12).The input offset voltage
is measured at VCM = VSS – 0.3V and VDD - 1.2V to
ensure proper operation.
Input
Stage
Bond
VIN–
Pad
VSS Bond
Pad
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
voltages and currents at the VIN+ and VIN- pins (see
Absolute Maximum Ratings at the beginning of
Section 1.0 “Electrical Characteristics”). Figure 4-2
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN-) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pins. Diodes D1 and D2 prevent the
input pins (VIN+ and VIN-) from going too far above VDD.
When implemented as shown, resistors R1 and R2 also
limit the current through D1 and D2.
© 2009 Microchip Technology Inc.
NORMAL OPERATION
For a unity gain buffer, since VOUT is the same voltage
as the inverting input, VOUT must be maintained below
VDD –1.2V for correct operation.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6286 op amp is
VSS + 15 mV (minimum) and VDD – 15 mV (maximum)
when RL = 10 kΩ is connected to VDD/2 and
VDD = 5.5V. Refer to Figure 2-24 and Figure 2-25 for
more information.
DS22196A-page 15
MCP6286
4.3
Capacitive Loads
4.4
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to capacitive loads, all gains show the
same general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 4-3) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
–
RISO
MCP6286
+
VIN
VOUT
CL
Supply Bypass
MCP6286 op amp’s power supply pin (VDD for
single-supply) should have a local bypass capacitor
(i.e., 0.01 µF to 0.1 µF) within 2 mm for good high
frequency performance. It can use a bulk capacitor
(i.e., 1 µF or larger) within 100 mm to provide large,
slow currents. This bulk capacitor can be shared with
other analog parts.
4.5
PCB Surface Leakage
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6286 op amp’s bias current at +25°C (±1 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-5.
FIGURE 4-3:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
Guard Ring
VIN– VIN+
VSS
Figure 4-4 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
FIGURE 4-5:
for Inverting Gain.
Recommended RISO (Ω)
1000
VDD = 5.5 V
RL = 10 kΩ
1.
100
10
GN:
1 V/V
2 V/V
≥ 5 V/V
1
10p
100p
1n
10n
0.1µ
1µ
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-4:
Recommended RISO Values
for Capacitive Loads.
After selecting RISO for your circuit, double check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6286 SPICE macro model are
very helpful.
DS22196A-page 16
2.
Example Guard Ring Layout
Non-inverting Gain and Unity-Gain Buffer:
a. Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b. Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a. Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b. Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
© 2009 Microchip Technology Inc.
MCP6286
4.6
4.6.1
Application Circuits
4.6.2
ACTIVE LOW-PASS FILTER
The MCP6286 op amp’s low input bias current makes
it possible for the designer to use larger resistors and
smaller capacitors for active low-pass filter
applications. However, as the resistance increases, the
noise generated also increases. Parasitic capacitances
and the large value resistors could also modify the
frequency response. These trade-offs need to be
considered when selecting circuit elements.
Figure 4-6
and
Figure 4-7
show
low-pass,
second-order, Butterworth filters with a cut-off
frequency of 10 Hz. The filter in Figure 4-6 has a
non-inverting gain of +1 V/V, and the filter in Figure 4-7
has an inverting gain of -1 V/V.
PHOTO DETECTION
The MCP6286 op amps can be used to easily convert
the signal from a sensor that produces an output
current (such as a photo diode) into a voltage (a
transimpedance amplifier). This is implemented with a
single resistor (R2) in the feedback loop of the
amplifiers shown in Figure 4-8 and Figure 4-9. The
optional capacitor (C2) sometimes provides stability for
these circuits.
A photodiode configured in the Photovoltaic mode has
zero voltage potential placed across it (Figure 4-8). In
this mode, the light sensitivity and linearity is
maximized, making it best suited for precision
applications. The key amplifier specifications for this
application are: low input bias current, low noise,
common mode input voltage range (including ground),
and rail-to-rail output.
G = +1 V/V
fP = 10 Hz
C1
47 nF
C2
R2
R2
R1
382 kΩ 641 kΩ
VOUT
ID1
+
VIN
MCP6286
C2
22 nF
VOUT
D1
Light
–
VDD
MCP6286
–
+
VOUT = ID1*R2
FIGURE 4-6:
Second-Order, Low-Pass
Butterworth Filter with Sallen-Key Topology.
G = -1 V/V
fP = 10 Hz
R2
618 kΩ
C1
8.2 nF
R3
R1
618 kΩ 1.00 MΩ
VOUT
VIN
C2
47 nF
FIGURE 4-8:
Photovoltaic Mode Detector.
In contrast, a photodiode that is configured in the
Photoconductive mode has a reverse bias voltage
across the photo-sensing element (Figure 4-9). This
decreases the diode capacitance, which facilitates
high-speed operation (e.g., high-speed digital
communications). The design trade-off is increased
diode leakage current and linearity errors. The op amp
needs to have a wide Gain Bandwidth Product
(GBWP).
–
C2
MCP6286
VDD/2
+
FIGURE 4-7:
Second-Order, Low-Pass
Butterwork Filter with Multiple-Feedback
Topology.
R2
ID1
D1
Light
VBIAS
–
VDD
VOUT
MCP6286
+
VOUT = ID1*R2
VBIAS < 0V
FIGURE 4-9:
Detector.
© 2009 Microchip Technology Inc.
Photoconductive Mode
DS22196A-page 17
MCP6286
NOTES:
DS22196A-page 18
© 2009 Microchip Technology Inc.
MCP6286
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6286 op amp.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6286 op
amp is available on the Microchip web site at
www.microchip.com. The model was written and tested
in official Orcad (Cadence) owned PSPICE. For the
other simulators, it may require translation.
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current, and resistance of the op amp, but it
also covers the temperature and noise effects on the
behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions can not be guaranteed that it will match the
actual op amp performance.
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
5.2
FilterLab® Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
5.3
Mindi™ Circuit Designer &
Simulator
Microchip’s Mindi™ Circuit Designer & Simulator aids
in the design of various circuits useful for active filter,
amplifier and power-management applications. It is a
free online circuit designer & simulator available from
the Microchip web site at www.microchip.com/mindi.
This interactive circuit designer & simulator enables
designers to quickly generate circuit diagrams,
simulate circuits. Circuits developed using the Mindi
Circuit Designer & Simulator can be downloaded to a
personal computer or workstation.
5.4
Microchip Advanced Part Selector
(MAPS)
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparison
reports. Helpful links are also provided for Datasheets,
Purchase, and Sampling of Microchip parts.
5.5
Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
•
•
•
•
•
•
MCP6XXX Amplifier Evaluation Board 1
MCP6XXX Amplifier Evaluation Board 2
MCP6XXX Amplifier Evaluation Board 3
MCP6XXX Amplifier Evaluation Board 4
Active Filter Demo Board Kit
5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
5.6
Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes and are
recommended as supplemental reference resources.
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177: “Op Amp Precision Design: DC Errors”,
DS01177
• AN1228: “Op Amp Precision Design: Random
Noise”, DS01228
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
© 2009 Microchip Technology Inc.
DS22196A-page 19
MCP6286
NOTES:
DS22196A-page 20
© 2009 Microchip Technology Inc.
MCP6286
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Example:
5-Lead SOT-23
5
4
5
WENN
XXNN
1
2
3
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
4
1
2
3
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2009 Microchip Technology Inc.
DS22196A-page 21
MCP6286
.# #$#
/!- 0
#
1/
%##!#
##
+22---
2
/
b
N
E
E1
3
2
1
e
e1
D
A2
A
c
φ
A1
L
L1
3#
4#
5$8%1
44""
5
56
7
5
(
4!1#
()*
6$# !4!1#
6,9#
:
!!1//
;
:
#!%%
:
(
6,<!#
"
:
!!1/<!#
"
:
;
6,4#
:
)*
(
.#4#
4
:
=
.#
#
4
(
:
;
.#
>
:
>
4!/
;
:
=
4!<!#
8
:
(
!"!#$!!% #$ !% #$ #&!
!
!#
"'(
)*+ ) #&#,$ --#$## - *)
DS22196A-page 22
© 2009 Microchip Technology Inc.
MCP6286
APPENDIX A:
REVISION HISTORY
Revision A (August 2009)
• Original Release of this Document.
© 2009 Microchip Technology Inc.
DS22196A-page 23
MCP6286
NOTES:
DS22196A-page 24
© 2009 Microchip Technology Inc.
MCP6286
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
X
/XX
Device
Temperature
Range
Package
Device:
MCP6286T:
Temperature Range:
E
Package:
OT = Plastic Small Outline Transistor, 5-lead
Examples:
a)
MCP6286T-E/OT:
Tape and Reel,
5-LD SOT-23 package
Single Op Amp (Tape and Reel)
= -40°C to +125°C
© 2009 Microchip Technology Inc.
DS22196A-page 25
MCP6286
NOTES:
DS22196A-page 26
© 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
rfPIC and UNI/O are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICkit, PICDEM, PICDEM.net,
PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total
Endurance, TSHARC, WiperLock and ZENA are trademarks
of Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2009 Microchip Technology Inc.
DS22196A-page 27
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Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-6578-300
Fax: 886-3-6578-370
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
03/26/09
DS22196A-page 28
© 2009 Microchip Technology Inc.