FDW2508P Dual P-Channel 1.8 V Specified PowerTrench MOSFET General Description Features This P-Channel –1.8V specified MOSFET uses Fairchild’s advanced low voltage PowerTrench process. It has been optimized for battery power management applications. • –6 A, –12 V. RDS(ON) = 18 mΩ @ VGS = –4.5 V RDS(ON) = 22 mΩ @ VGS = –2.5 V RDS(ON) = 30 mΩ @ VGS = –1.8 V Applications • Low gate charge(26nC typical) • Power management • • Load switch High performance trench technology for extremely low RDS(ON) • Battery protection • Low profile TSSOP-8 package G2 S2 S2 D2 G1 S1 S1 D1 TSSOP-8 1 8 2 7 3 6 4 5 Pin 1 Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current Ratings – Continuous (Note 1) – Pulsed PD V ±8 V –6 A –30 Power Dissipation for Single Operation TJ, TSTG Units –12 (Note 1a) 1.3 W (Note 1b) 1 –55 to +150 °C (Note 1a) 100 °C/W (Note 1b) 125 Operating and Storage Junction Temperature Range Thermal Characteristics RθJA Thermal Resistance, Junction-to-Ambient Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity 2508P FDW2508P 13’’ 12mm 2500 units 2001 Fairchild Semiconductor Corporation FDW2508P Rev. E (W) FDW2508P December 2001 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min ID = –250 µA –12 Typ Max Units Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ∆BVDSS ∆TJ IDSS Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current ID = –250 µA, Referenced to 25°C VDS = –10 V, VGS = 0 V –1 µA IGSSF Gate–Body Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –8 V, VDS = 0 V –100 nA ID = –250 µA On Characteristics V –2 mV/°C (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance ID = –250 µA, Referenced to 25°C 2.7 14 17 22 18 ID(on) On–State Drain Current VGS = –4.5 V, ID = –6 A VGS = –2.5 V, ID = –5 A VGS = –1.8 V, ID = –4 A VGS = –4.5 V, ID = –6A, TJ=125°C VGS = –4.5 V, VDS = –5 V gFS Forward Transconductance VDS = –5 V, ID = –6 A –0.4 –0.5 –1.5 V mV/°C 18 22 30 25 –30 mΩ A 32 S Dynamic Characteristics VDS = –6 V, f = 1.0 MHz Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time V GS = 0 V, 2644 pF 987 pF 602 pF (Note 2) VDD = –6 V, VGS = –4.5 V, ID = –1 A, RGEN = 6 Ω 14 25 ns 9.1 18 ns ns td(off) Turn–Off Delay Time 122 195 tf Turn–Off Fall Time 89 142 ns Qg Total Gate Charge 26 36 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = –6 V, VGS = –4.5 V ID = –6 A, 4 nC 7 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = –1.1 A (Note 2) –0.59 –1.1 A –1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA is 100°C/W (steady state) when mounted on a 1 inch² copper pad on FR-4. b) RθJA is 125°C/W (steady state) when mounted on a minimum copper pad on FR-4. 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDW2508P Rev. E (W) FDW2508P Electrical Characteristics FDW2508P Typical Characteristics 2 VGS = -4.5V -2.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 60 -ID, DRAIN CURRENT (A) -3.0V 45 -2.0V -1.8V 30 -1.5V 15 0 1.8 VGS = -1.8V 1.6 -2.0V 1.4 -2.5V 1.2 -3.0V 1 2 3 4 0 15 -VDS, DRAIN TO SOURCE VOLTAGE (V) 30 45 60 -ID, DIRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.4 0.045 ID = -6A VGS = -4.5V RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -4.5V 0.8 0 1.2 1 0.8 ID = -3A 0.035 TA = 125oC 0.025 TA = 25oC 0.015 0.005 0.6 -50 -25 0 25 50 75 100 125 1 150 2 Figure 3. On-Resistance Variation with Temperature. 4 5 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 40 100 TA = -55oC 25oC -IS, REVERSE DRAIN CURRENT (A) VDS = -5V 3 -VGS, GATE TO SOURCE VOLTAGE (V) TJ, JUNCTION TEMPERATURE (oC) o -ID, DRAIN CURRENT (A) -3.5V 1 125 C 30 20 10 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 0.6 1 1.4 1.8 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 2.2 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDW2508P Rev. E (W) FDW2508P Typical Characteristics 4000 VDS = -4V ID = -6A f = 1 MHz VGS = 0 V -6V 4 -8V CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 5 3 2 1 CISS 3000 2000 COSS 1000 CRSS 0 0 0 5 10 15 20 25 0 30 3 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 9 12 Figure 8. Capacitance Characteristics. 100 30 P(pk), PEAK TRANSIENT POWER (W) -ID, DRAIN CURRENT (A) 6 -VDS, DRAIN TO SOURCE VOLTAGE (V) 100µ 1ms 10ms RDS(ON) LIMIT 10 100m 1s DC 1 VGS = -4.5V SINGLE PULSE RθJA = 125oC/W 0.1 TA = 25oC 0.01 0.01 0.1 1 10 100 SINGLE PULSE RθJA = 125°C/W TA = 25°C 25 20 15 10 5 0 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 RθJA(t) = r(t) * RθJA 0.2 0.1 o RθJA = 125 C/W 0.1 P(pk) 0.05 0.02 0.01 t1 t2 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDW2508P Rev. E (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4