STMICROELECTRONICS CLP200M-TR

CLP200M
®
OVERVOLTAGE AND OVERCURRENT
PROTECTION FOR TELECOM LINE
Application Specific Discretes
A.S.D.
MAIN APPLICATIONS
Any telecom equipment submitted to transient
overvoltages and lightning strikes such as :
Analog and ISDN line cards
PABX
Main Distribution Frames
Primary protection modules
■
■
■
■
DESCRIPTION
The CLP200M is designed to protect telecommunication equipment. It provides both a transient
overvoltage protection and an overcurrent protection.
It is housed in a PowerSO-10TM package.
FEATURES
Dual bidirectional protection device.
High peak pulse current :
ipp = 100a (10/1000 µs surge)
Max. voltage at switching-on : 290v
Min. current at switching-off : 150ma
Failure status output pin
PowerSO-10TM
c
u
d
SCHEMATIC DIAGRAM
FS
■
1
e
t
le
■
TIP S
■
o
r
P
■
b
O
-
BENEFITS
Both primary and secondary protection levels in
one device.
Voltage and current controlled suppression.
Surface
Mounting
with
PowerSO-10TM
package.
Line card cost reduction thanks to the very low
power rating of external components required :
balanced resistors, ring relay, low voltage SLIC
protection
(s)
■
NC
RING S
TIP L
RING L
TIP L
RING L
TIP L
RING L
so
■
)
s
t(
TAB is connected to GND
t
c
u
■
d
o
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e
■
■
t
e
l
o
s
b
O
July 2003- Ed : 4B
1/21
CLP200M
Peak Surge
Voltage
(V)
Voltage
Waveform
(µs)
Current
Waveform
(µs)
Admissible
Ipp
(A)
Necessary
Resistor
(Ω)
CCITT K20
6000
10/700
5/310
150
-
VDE0433
6000
10/700
5/310
150
-
VDE0878
4000
1.2/50
1/20
100
-
IEC61000-4-5
6000
4000
10/700
1.2/50
5/310
8/20
150
100
-
FCC Part 68
1500
800
10/160
10/560
10/160
10/560
200
100
-
BELLCORE TR-NWT-001089
2500
1000
2/10
10/1000
2/10
10/1000
500
100
-
COMPLIES WITH THE
FOLLOWING STANDARDS:
BLOCK DIAGRAM
TIPL
TIPS
c
u
d
Overcurrent
detector
Overvoltage
detector
OR
SW3
so
FS
SW4
SW2
)
s
(
ct
u
d
o
t
e
l
o
s
b
O
2/21
b
O
-
Overvoltage
detector
OR
r
P
e
e
t
le
SW1
o
r
P
Overvoltage
reference
(+/- 215 V)
GND
Overvoltage
reference
(+/- 215 V)
Overcurrent
detector
RINGL
RINGS
Pin
Symbol
Description
1
FS
2
TIPS
TIP (SLIC side)
3/4/5
TIPL
TIP (Line side)
6/7/8
RINGL
RING (Line side)
9
RINGS
RING (SLIC side)
10
NC
TAB
GND
Failure Status
Not connected
Ground
)
s
t(
CLP200M
APPLICATION NOTE
2. STMicroelectronics CLP200M CONCEPT
1. INTRODUCTION
The aim of this section is to show the behavior of
our new telecom line protection device. This device includes a primary protection level and is suitable for main distribution frames and line
cardsThis protection concept is explained and, in
addition, the CLP200M performances are analysed when facing different surges as described in
the CCITT recommendations.
Fig. 1 : Subscriber line protection topology
"PRIMARY PROTECTION"
"SECONDARY PROTECTION"
telecommunication
CLP200M
SLIC
line
MDF
LINE CARD
EXCHANGE
2.1 Evolution of the SLIC protection
Over the years, the silicon protection performances have considerably changed.
The first generation of products like SMTHBTxx
and SMTHDTxx offered fixed overvoltage protection against surges on either TIP or RING line in
four packages.
The following generation like THBTxx and
THDTxx still offered fixed overvoltage protection
against surges on both TIP and RING lines in two
packages.
The next step was the introduction of the
LCP1511D which brought the advantage of full
programmable voltage.
Today, the CLP200M combines the features of all
the previous generations. In addition to that, it offers an overcurrent detection when operating in
speech mode and also a Failure Status output signal.
c
u
d
"SECONDARY PROTECTION"
telecommunication
CLP200M
line
MDF
THDTxx or
LPC1511D
or LB200B
SLIC
e
t
le
EXCHANGE
Figure 1 is a simplified block diagram of a subscriber line protection that is mainly used so far.
This shows two different things :
A “primary protection” located on the Main Distribution Frame (MDF) eliminates coarsely the
high energy environmental disturbances (lightning transients and AC power mains
disturbances)
A “secondary protection” located on the line card
includes a primary protection level (first stage) and
a residual protection (second stage) which eliminates finely the remaining transients that have not
been totally suppressed by the first stage.
The CLP200M can be used both in MDFs and in
line cards. In that case, any line card may be
swapped from one MDF to another one without reducing the efficiency of the whole system protection.
The CCITT requirements are different for these
two protection locations (MDFs and line cards).
Concerning the “primary protection”, the CCITT requires a 4kV, 10/700µs surge test whereas the
“secondary protection” has to withstand a 1kV,
10/700µs surge test.
The explanations which follow are basically
covering the line card application.
(s)
■
ct
u
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o
r
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■
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P
Fig. 2 : Line card protection
LINE CARD
so
Programmable thanks to
any external voltage reference
b
O
-
)
s
t(
I
Programmable thanks to
an external resistor
+ I SWON
V
- I SWON
Line card operating conditions
The figure 2 summarizes the performance of the
CLP200M which basically holds the SLIC inside its
correct voltage and current values.
s
b
O
3/21
CLP200M
APPLICATION CIRCUIT : CLP200M in line card
Fig. 3 : CLP200M in line card
I
Fuse
TIP
R sense
TIPL
-Vbat
1
TIPS
Rp
TIP
Overcurrent
detector
External
voltage
reference
2
Overvoltage
detector
OR
SW3 SW1
Overvoltage
reference
(+/- 215 V)
FS
Overvoltage
detector
OR
SLIC
(*)
1
GND
SW4 SW2
-Vbat
Overvoltage
reference
(+/- 215 V)
Rp
RING
2
Overcurrent
detector
RING
Ring
Generator
RINGS
RINGL
c
u
d
R sense
Fuse
(*) LCP1511D or THDT series
Figure 3 above shows the topology of a protected
analog subscriber line at the exchange side. The
CLP200M is connected to the ring relay via two
balanced Rp resistors, and to the Subscriber Line
Interface Circuit. A second device is located near
the SLIC : it can be either a LCP1511D or a THDT
series.
These two devices are complementary and their
functions are explained below :
The first stage based on CLP200M manages
the high power issued from the external
surges. When used in ringing mode, the
CLP200M operates in voltage mode and provides a symmetrical and bidirectional
overvoltage protection at +/-215 V on both TIP
and RING lines. When used in speech mode,
the CLP200M operates in current mode and
the activation current of the CLP200M is adjusted by RSENSE.
)
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b
O
4/21
e
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o
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P
)
s
t(
The second stage is the external voltage reference device which defines the firing threshold
voltage during the speech mode and also assumes
a
residual
power
overvoltage
suppression. This protection stage can be either
a fixed or programmable breakover device. The
THDTxx family acts as a fixed breakover device
while the LCP1511D operates as a programmable protection.
Thanks to this topology, the surge current in the
line is reduced after the CLP200M. Because the
remaining surge energy is low, the power ratings of
Rp, the ring relay contacts and the external voltage
reference circuit may be downsized. This results in
a significant cost reduction.
■
o
s
b
O
-
CLP200M
2.3 Ringing mode
Fig. 4 : Switching by voltage during ringing mode.
Fuse
ILG
TIP
ILG
R sense
A1
TIPL
1
TIPS
1/2 CLP200M
2
Rp
Overcurrent
detector
1
2
OR
-215
VLG
Overvoltage
detector
+215
Overvoltage
reference
(+/- 215 V)
SW3 SW1
VLG
3
FS
GND
In ringing mode (Ring relay in position 2), the only
protection device involved is the CLP200M.
In normal conditions, the CLP200M operates in region 1 of A1 curve, and is idle.
If an overvoltage occuring between TIP (or RING)
and GND reaches the internal overvoltage
refe-rence (+/- 215V), the CLP200M acts and the
line is short-circuited to GND. At this time the operating point moves to region 2 for positive surges
(region 3 for negative surges). Once the surge current disappears, the device returns to its initial
state (region 1).
Fig. 5a : Method to adjust the reference voltage.
)
s
(
ct
Fuse
TIP
c
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d
du
o
r
P
e
t
e
l
o
.
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o
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P
o
s
b
O
-
1
Rp
TIPS
2
VZ1
Overcurrent
detector
OR
Overvoltage
detector
OR
Overvoltage
detector
SW3 SW1
VZ2
Overvoltage
reference
(+/- 215 V)
FS
O
)
s
t(
When used alone, the CLP200M acts at the internal overvoltage reference level (+/- 215V). Furthermore, it is possible to adjust this threshold level
to a lower voltage by using :
up to 4 fixed external voltage reference (VZ1 to
VZ4) (see fig.5a).
R sense
TIPL
bs
For surges occuring between TIP and RING, the
CLP200M acts in the same way. This means that
the CLP200M ensures a tripolar protection.
GND
SW4 SW2
Overvoltage
reference
(+/- 215 V)
VZ3
Overcurrent
detector
VZ4
RINGL
RING
RINGS
R sense
1
Rp
Fuse
2
5/21
CLP200M
external reference supplies, Vb1 and Vb2 (see fig.5b)..
Fig. 5b : Method to adjust the reference voltage.
■
1
Fuse
TIP
R sense
Rp
TIPL
TIPS
2
Overcurrent
detector
OR
Overvoltage
detector
OR
Overvoltage
detector
SW3 SW1
VB1
Overvoltage
reference
(+/- 215 V)
FS
GND
SW4 SW2
Overvoltage
reference
(+/- 215 V)
VB2
Overcurrent
detector
RINGL
RING
c
u
d
RINGS
1
ro
R sense
P
e
let
Fuse
2.4 Speech mode
)
s
t(
Rp
o
s
b
O
-
2
Fig. 6 : Switching by current during speech mode.
Fuse
ILG
TIP
R sense
TIPL
TIPS
uc
Overcurrent
detector
SW3 SW1
FS
t
e
l
o
s
b
O
od
r
P
e
OR
Overvoltage
detector
(t s)
External
voltage
reference
VLG
5
-VREF2
4
VREF1
VLG
6
GND
In speech mode (Ring relay in position 1), the protection is provided by the combination of both
CLP200M and the external voltage reference device.
In normal conditions, the working point of this circuit is located in region 4 of A2 curve : the
CLP200M is idle.
When a surge occurs on the line, the external voltage reference device clamps at GND or -Vbat respectively for positive and negative surges.
This generates a current which is detected by
RSENSE and causes the protection to act : the line is
short-circuited to GND.
6/21
A2
-Vbat
Rp
2
Overvoltage
reference
(+/- 215 V)
ILG
1
The operating point moves to region 5 for positive
surges or region 6 for negative surges.
Once the surge current falls below the switching-off current ISWOFF, the CLP200M returns to its
initial state (region 4).
Furthermore, the CLP200M switches when an
overvoltage, either positive or negative, occurs either :
simultaneously on both TIP and RING lines versus GND.
between TIP and RING.
on TIP (or RING) versus GND.
■
■
■
CLP200M
Fig. 7a and 7b
RSENSE.
: Switching-on current versus
The CLP200M has an internal feature that allows
the user to get a Failure Status (FS) indication.
When the CLP200M is short-circuiting the line to
GND, a signal can be managed through pin 1. This
signal can be used to turn a LED on in order to provide a surge indication. It may also be used with a
logic circuitry to count the number of disturbances
appearing on the lines.
ISWON (mA)
500
-20°C
25°C
2.5 . Failure Status
75°C
300
200
Fig. 8 : Failure Status circuit and diagnostic.
100
Rsense
3
5
7
Rsense (Ω)
9
11
13
1
Iswon @ 25°C (mA)
CLP200M
FAILURE
500
Iswon min
negative
Iswon max
negative
Iswon min
positive
STATUS
Iswon min
positive
1k
300
c
u
d
Rsense
+12V
200
)
s
t(
o
r
P
If a surge exceeding the maximum ratings of the
CLP200M occurs on the line, the device will fail in a
short-circuit state.
100
3
5
7
Rsense (Ω)
9
11
e
t
le
o
s
b
O
-
Fig. 9 : Operation limits and destruction zone of
the CLP200M.
The choice of the switching-on current is function
of the RSENSE resistors.
In normal operating condition, only the negative
current of the signal is of interest. This current (typically below -150 mA) should not activate the protection device CLP200M. Therefore the level of
activation is to be chosen just above this limit (typically -200 mA). This level is adjusted through
RSENSE.
Figures 7a and 7b enable the designers to choose
the right RSENSE value.
)
s
(
ct
Ipp (A)
1000
u
d
o
r
P
e
100
t
e
l
o
s
b
O
EXAMPLE :
The choice of RSENSE = 4 Ω ensures a negative
triggering of -220 mA min and -320 mA max. In this
case, the positive triggering will be 180mA min and
280 mA max.
10
0.01
0.1
1
10
t (ms)
The figure 9 shows two different curves :
The lower one indicates the maximum
guaranted working limits of the CLP200M.
The upper curve shows the limit above which the
CLP200M is completely destructed . In this case,
the Fail Diagnostic pin is on.
■
■
7/21
CLP200M
3. CLP200M TESTS RESULTS ACCORDING TO
CCITT K20 RECOMMENDATIONS
Fig. 11 : Power induction test circuit.
3.1 CCITT K20 Recommendations
1µF
R1
A
In respect with the CCITT recommendations, the
CLP200M has to withstand three kinds of disturbances.
ITEM
100
S2
UNDER
TEST
S1 R2
3.1.1. Lightning simulation
(Test 2, table 2/K20)
B E
1µF
This test shall be done in transversal and longitudinal modes as shown in figure 10.
Fig. 10 : Transversal and longitudinal test
topologies.
15
3.1.3. Power contact (Test 3, table 1/K20)
This test shall be done with the test circuit of figure
12.
Vac(max) = 220VRMS , with switch S in each position and duration 15 min.
A or B
25
ITEM
UNDER
B or A
20µF
4kv
50
0.2µF
TEST
c
u
d
Fig. 12 : Power contact test circuit.
E
TRANSVERSAL TEST
<10
25
A
25
B
e
t
le
ITEM
15
20µF
4kv
UNDER
50
o
r
P
)
s
t(
0.2µF
TEST
LONGITUDINAL TEST
E
)
s
(
ct
o
s
b
O
-
600
A
ITEM
UNDER
TEST
<10
600
B
E
The test generator is the 10/700µs with 4kV of
peak voltage.
u
d
o
3.1.2. Power induction
(Test 3a and 3b, table 2/K20)
r
P
e
Two kinds of tests using the same circuit topology
(see fig.11) are defined in the CCITT K20.
Test 3a :
Vac(max) = 300VRMS, R1 = R2 = 600Ω
S2 operating and test duration = 200 ms.
t
e
l
o
■
s
b
O
■
Test 3b :
Vac(max) = 300VRMS (*), R1 = R2 = 200Ω
S2 operating and test duration not defined.
(*) Recommended value.
8/21
3.1.4. Acceptance criteria and number of tests
For the tests described in chapter 3.1.1., 3.1.2. and
3.1.3. two criteria are defined :
A: Equipment shall withstand the test without damage and shall operate properly within the specified
limits.
B: A fire hazard should not occur in the equipment
as a result of the tests.
The criteria are affected to the different tests as
mentioned in the table 1.
CLP200M
Table 1 : Acceptance criteria and number of tests.
TEST ACCEPTANCE
CRITERIA
NUMBER TO TESTS
2
A
10 for longitudinal A
10 for longitudinal B
and 10 for transversal
3a
A
5
3b
B
1
3
B
1 for each position of s
3.2. Ringing mode
3.2.1. Lightning simulation test
Lightning phenomena are the most common surge
causes. The purpose of this test is to check the robustness of the CLP200M against these lightning
strikes.
Fig. 13 : Lightning simulation test.
4Ω
I
Rp
Rsense
10/700µs
GENERATOR
TIPL
TIPS
1/2 CLP200M
GND
+/- 4kV
Fig. 15 : CLP200M response to a negative surge.
V
Figures 14 and 15 show that the remaining
overvoltage does not exceed +/- 260 V. The
CLP200M switches on within 0.7 µs and withstands the 100 A given by the CCITT K20 generator.
Consequently, the CLP200M totally fulfills this test.
3.2.2 Power induction
(Test 3a and 3b table 2/K20)
c
u
d
)
s
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o
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P
Surges of long duration with medium voltage value
are mainly produced by the proximity of a subscriber line with an AC mains line or equipment.
The purpose of this test is to check the robustness
of the CLP200M against these capacitive coupling
disturbances.
e
t
le
o
s
b
O
-
Fig. 16 : Power inductance test.
)
s
(
ct
u
d
o
Fig. 14 : CLP200M response to a positive surge.
r
P
e
t
e
l
o
O
bs
TEST
V(RMS)
R(Ω)
Duration
3a
300
600
0.2s
3b
300
200
?
9/21
CLP200M
Fig. 17 : CLP200M response to the induction test
(Test 3a).
The test 3 of CCITT K20 requires a serial PTC (or
fuse) which is inserted in the test circuit to limit the
current rate. This PTC acts like an open-circuit in a
non-instantaneous way when a surge occurs on
the line. Meanwhile, the CLP200M has to withstand the surge.
Fig. 19 : Power contact test.
I
600 Ω or < 10 Ω
4
Rsense
Rp
PTC
TIPL
TIPS
1/2 CLP200M
15min
V(RMS)
GND
V
50Hz
Fig. 20 : Power contact test 3 (With 10Ω series).
c
u
d
Fig. 18 : CLP200M reponse to the induction test
(Test 3b).
e
t
le
)
s
(
ct
o
r
P
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
Figures 17 and 18 show that the remaining voltage
does not exceed 270 V.
Consequently, the CLP200M totally fulfills this test.
The test duration is not specified in test 3b. If the
duration exceeds 5s we do suggest to follow the
soldering and mounting recommendations given
on page 17 of this document.
bs
O
Figure 20 shows that the remaining overvoltage
does not exceed 250 V and shows that the PTC
acts like an open-circuit after 60 ms.
Consequently, the CLP200M totally fulfills this test.
3.3. Speech mode
3.3.1. Lightning simulation test
(Test 2, table 2/K20)
Fig. 21: Lightning test in speech mode.
3.2.3 Power contact (Test 3 table 1/K20)
4
I1
This long duration surge is produced when connecting a subscriber line to an AC mains line or
equipment. The purpose of this test is to check the
robustness of the CLP200M against these disturbances.
GENERATOR
+/- 4kV
50
Rp
Rsense
10/700µs
10/21
)
s
t(
TIPL
1/2 CLP200M
GND
I2
SLIC
TIPS
-48V
V1
LCP1511D
V2
CLP200M
Fig. 22 : CLP200M response to a positive surge.
3.3.2 Power induction test
(Test 3a and 3b, table 2/K20)
Fig. 24 : Power induction test.
4Ω
I1
SLIC
TIPS
TIPL
V(RMS)
50 Hz
I2
50
Rp
Rsense
1/2 CLP200M
GND
-48V
V2
V1
LCP1511D
Fig. 23 : CLP200 M response to a negative surge.
TEST
V(RMS)
R(Ω)
Duration
3a
300
600
0.2s
Figures 25 and 26 show that the maximum remaining voltage does not exceed +2V for positive
surges and -55V for negative surges.
Consequently, the CLP200M totally fulfills this test.
The test duration is not specified in test 3b. If the
duration exceeds 5s we do suggest to follow the
soldering and mounting recommendations given
on page 17 of this document.
c
u
d
e
t
le
)
s
t(
o
r
P
Fig. 25 : Induction test behavior (Test 3a).
)
s
(
ct
o
s
b
O
-
u
d
o
r
P
e
Figures 22 and 23 give the voltage and current behavior during positive and negative 4kV, 10/700µs,
surge tests using a LCP1511D as second stage
protection device. The firing threshold values are
now adjusted to GND and to -Vbat (-48V) by the
action of the second stage protection which acts as
an external voltage reference.
t
e
l
o
s
b
O
As shown on these figures, the maximum remaining voltage does not exceed +2.5V for positive
surges and -60V for negative surges.
Consequently, the CLP200M totally fulfills this test.
11/21
CLP200M
Fig. 28 : Power contact test 3 (with R  10 Ω series).
Fig. 26 : Induction test behavior (Test 3b).
c
u
d
3.3.3 - Power contact test (Test 3 table 1/K20)
The test 3 of CCITT K20 requires a serial PTC (or
fuse) which is inserted in the test circuit to limit the
current rate. This PTC acts like an open-circuit after 60 ms when a surge occurs on the line. Meanwhile, the CLP200M has to withstand the surge.
The protection device CLP200M totally fulfills this
test.
)
s
(
ct
Fig. 27 : Power contact test.
I
r
P
e
Rsense
PTC
15min
V(RMS)
t
e
l
o
50Hz
s
b
O
12/21
u
d
o
4Ω
600 or < 10
TIPL
I2
SLIC
Rp
TIPS
1/2 CLP200M
GND
V
o
s
b
O
-
-48V
LCP1511D
V2
e
t
le
o
r
P
)
s
t(
CLP200M
ABSOLUTE MAXIMUM RATINGS (RSENSE = 4 Ω, and Tamb = 25 °C)
Symbol
Parameter
Test Conditions
Value
Unit
10/1000µs (open circuit voltage
wave shape 10/1000µs)
100
A
5/310µs (open circuit voltage
wave shape 10/700µs)
150
A
Mains power induction
current
VRMS = 300V, R = 600Ω
t = 200ms
0.5
A
Mains power contact current
VRMS = 220V, R = 10Ω
(failure status threshold)
t = 200 ms
22
A
VRMS = 220V, R = 600Ω
t = 15 mn
0.30
A
- 40 to + 150
150
°C
Line to GND peak surge
current
IPP
ITSM
Tstg
Tj
Storage temperature range
Maximum junction temperature
TL
Maximum lead temperature for soldering during 10 s
ELECTRICAL CHARACTERISTICS (RSENSE = 4 Ω, and Tamb = 25°C)
Symbol
e
t
le
Parameter
Test Conditions
260
c
u
d
o
r
P
Value
Min.
so
ILGL
Line to GND leakage
current
. VLG = 200 V
. Measured between TIP
(or RING) and GND
Vref
Overvoltage internal reference
. ILG = 1 mA
. Measured between TIP
(or RING) and GND
VSWON
Line to GND voltage at SW1
or SW2 switching-on
. Measured at 50 Hz between
TIPL (or RINGL) and GND
ISWOFF
Line to GND current at SW1
or SW2 switching-off
. Refer to test circuit page 14
150
ISWON
Line current at SW1 or SW2
switching-on
. Positive pulse
. Negative pulse
180
220
Line to GND capacitance
. VLG = -1 V + 1VRMS
. F = 1 MHz
)
s
(
ct
u
d
o
C
t
e
l
o
r
P
e
b
O
-
)
s
t(
°C
Max.
10
215
Unit
µA
V
290
V
mA
280
320
mA
200
pF
s
b
O
13/21
CLP200M
TEST CIRCUIT FOR ISWOFF PARAMETER : GO-NO GO TEST
R
- VP
D.U.T.
VBAT = - 48 V
Surge
generator
This is a GO-NO GO test which allows to confirm the switch-off (ISWOFF) level in a functional test circuit.
TEST PROCEDURE :
- Adjust the current level at the ISWOFF value by short circuiting the D.U.T.
- Fire the D.U.T. with a surge current : IPP = 10A, 10/1000µs.
- The D.U.T. will come back to the OFF-state within a duration of 50ms max.
Fig. 29 : Typical variation of switching-on current
(positive or negative) versus RSENSE resistor and
junction temperature (see test condition Fig 31).
c
u
d
Fig. 30 : Variation of switching-on current versus
RSENSE at 25°C.
ISWON (mA)
25°C
75°C
300
Iswon min
negative
Iswon max
negative
Iswon min
positive
Iswon min
positive
o
s
b
O
300
200
200
(s)
100
3
5
t
c
u
7
Rsense (Ω)
9
11
100
13
3
d
o
r
P
e
Fig. 31 : ISWON MEASUREMENT
- Iswon = I1 when the CLP200M switches on (I1 is
progressively increased using R)
- Both TIP and RING sides of the CLP200M are
checked
- RL = 10 Ω.
t
e
l
o
bs
R sense
RL
TIPL
I1
TIPS
R
DUT
GND
RINGL RINGS
14/21
e
t
le
500
-20°C
± 48 V
o
r
P
Iswon @ 25°C (mA)
500
O
)
s
t(
5
7
Rsense (Ω)
9
11
Fig. 32 : Relative variation of switching-off current
versus junction temperature for RSENSE between 3
and 10 Ω.
ISWOFF [Tj°C] / ISWOFF [25°C]
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
-40
-20
0
20
40
Tj (°C)
60
80
CLP200M
Fig. 33 : Relative variation of switching-off current
versus RSENSE (between 3 and 10 Ω).
ISWOFF [Rsense] / ISWOFF [4 Ω]
Fig. 34 : Residual current l1 after the CLP200M.
The residual current l1 is defined by its peak value
(IP) and its duration (τ) @ IP/2 .
1.6
Residual current
after the CLP200M
Current surge input
1.4
Peak cur- waveform
t(µs)
rent
IP (A)
waveform(µs)
IPP(A)
1.2
1.0
0.8
5/310 positive surge
130A negative surge
0.6
0.4
4
6
8
Rsense (Ω)
4.2
1.1
1
0.5
10
-48V
R sense
R = 50 Ohms
SURGE
GENERATOR
TIPL
I1
TIPS
DUT
RINGL
GND
RINGS
c
u
d
Fig. 35 : Relative variation of switching-on voltage
versus dV/dt with an external resistor of 4 Ω.
VSWON / VREF
e
t
le
)
s
t(
o
r
P
Fig. 36 : Relative variation of internal reference
voltage versus junction temperature (ILG=1mA).
o
s
b
O
-
VREF [Tj°C] / V REF [25°C]
1.12
1.10
1.10
1.05
1.08
(s)
1.06
ct
1.04
1.02
1.00
0.98
0.1
0.3
o
r
P
e
1
3
10
du
30
dV/dt (V/µs)
100
1.00
0.95
0.90
300
1000
0.85
-40
-20
0
20
40
60
Tj (°C)
t
e
l
o
s
b
O
15/21
CLP200M
Fig. 37 : Junction capacitance (TIPL/GND) versus
applied voltage
C (pF)
220
200
180
160
140
120
100
80
60
40
Fig. 38 : Typical and maximal capacitance
between TIPL, RINGL and GND.
V TIPL = - 48 V
V RINGL # 0 V
V GND = 0 V
Capacitance Capacitance Capacitance
between
between
between
RINGL and TIPL and
TIPL and
GND
GND
RINGL
0
10
20
30
VR (V)
40
50
Typ.
195
Max.
200
62
57
60
Fig. 39 : Maximum non repetitive surge RMS on
state current versus overload duration (with 50Hz
sinusoidal wave and initial junction temperature
equal to 25°C)
c
u
d
Fig. 40 : Maximum peak pulse current versus
surge duration
ITSM (A)
e
t
le
Ipp (A)
100
300
o
r
P
o
s
b
O
200
10
)
s
t(
100
1
ct
t (s)
0.1
o
r
P
e
0.1
1
t
e
l
o
s
b
O
16/21
(s)
10
du
100
1000
50
30
20
0.01 0.02
0.05
0.1
0.2
0.5
t (ms)
1
2
5
10
CLP200M
SOLDERING RECOMMENDATION
The soldering process causes considerable thermal stress to a semiconductor component. This
has to be minimized to assure a reliable and extended lifetime of the device. The PowerSO-10TM
package can be exposed to a maximum temperature of 260°C for 10 seconds. However a proper
soldering of the package could be done at 215°C
for 3 seconds. Any solder temperature profile
should be within these limits. As reflow techniques
are most common in surface mounting, typical
heating profiles are given in Figure 1,either for
mounting on FR4 or on metal-backed boards. For
each particular board, the appropriate heat profile
has to be adjusted experimentally. The present
proposal is just a starting point. In any case, the following precautions have to be considered :
- always preheat the device
- peak temperature should be at least 30 °C
higher than the melting point of the solder
alloy chosen
- thermal capacity of the base substrate
Voids pose a difficult reliability problem for large
surface mount devices. Such voids under the
package result in poor thermal contact and the
high thermal resistance leads to component failures. The PowerSO-10 is designed from scratch to
be solely a surface mount package, hence symmetry in the x- and y-axis gives the package excellent
weight balance. Moreover, the PowerSO-10 offers
the unique possibility to control easily the flatness
and quality of the soldering process. Both the top
and the bottom soldered edges of the package are
accessible for visual inspection (soldering meniscus).
Coplanarity between the substrate and the package can be easily verified. The quality of the solder
joints is very important for two reasons : (I) poor
quality solder joints result directly in poor reliability
and (II) solder thickness affects the thermal resistance significantly. Thus a tight control of this parameter results in thermally efficient and reliable
solder joints.
c
u
d
Fig 1 : Typical reflow soldering heat profile
e
t
le
Temperature (o C)
250
o
245 C
215oC
200
)
s
(
ct
Epoxy FR4
board
150
u
d
o
100
t
e
l
o 50
o
r
P
o
s
b
O
-
Soldering
Preheating
r
P
e
)
s
t(
Cooling
Metal-backed
board
s
b
O
0
0
40
80
120
160
200
240
280
320
360
Time (s)
17/21
CLP200M
SUBSTRATES AND MOUNTING INFORMATION
The use of epoxy FR4 boards is quite common for
surface mounting techniques, however, their poor
thermal conduction compromises the otherwise
outstanding thermal performance of the
PowerSO-10. Some methods to overcome this
limitation are discussed below.
One possibility to improve the thermal conduction
is the use of large heat spreader areas at the copper layer of the PC board. This leads to a reduction
of thermal resistance to 35 °C for 6 cm2 of the
board heatsink (see fig. 2).
Use of copper-filled through holes on conventional
FR4 techniques will increase the metallization and
decrease thermal resistance accordingly. Using
a configuration with 16 holes under the spreader of
the package with a pitch of 1.8 mm and a diameter
of 0.7 mm, the thermal resistance (junction heatsink) can be reduced to 12°C/W (see fig. 3).
Beside the thermal advantage, this solution allows
multi-layer boards to be used. However, a drawback of this traditional material prevent its use in
very high power, high current circuits. For instance, it is not advisable to surface mount devices
with currents greater than 10 A on FR4 boards. A
Power Mosfet or Schottky diode in a surface mount
power package can handle up to around 50 A if
better substrates are used.
Fig 2 : Mounting on epoxy FR4 head dissipation by extending the area of the copper layer
Copper foil
e
t
le
)
s
(
ct
o
r
P
o
s
b
O
-
Fig 3 : Mounting on epoxy FR4 by using copper-filled through holes for heat transfer
u
d
o
r
P
e
t
e
l
o
s
b
O
18/21
Copper foil
heatsink
c
u
d
FR4 board
FR4 board
heat transfer
)
s
t(
CLP200M
A new technology available today is IMS - an Insulated Metallic Substrate. This offers greatly enhanced thermal characteristics for surface
mount components. IMS is a substrate consisting
of three different layers, (I) the base material which
is available as an aluminium or a copper plate, (II)
a thermal conductive dielectrical layer and (III) a
copper foil, which can be etched as a circuit layer.
Using this material a thermal resistance of 8°C/W
with 40 cm2 of board floating in air is achievable
(see fig. 4). If even higher power is to be dissipated
an external heatsink could be applied which leads
to an Rth(j-a) of 3.5°C/W (see Fig. 5), assuming
that Rth (heatsink-air) is equal to Rth (junction-heatsink). This is commonly applied in practice, leading to reasonable heatsink dimensions.
Often power devices are defined by considering
the maximum junction temperature of the device.
In practice , however, this is far from being exploited. A summary of various power management
capabilities is made in table 1 based on a reasonable delta T of 70°C junction to air.
Fig 4 : Mounting on metal backed board
Fig 5 : Mounting on metal backed board with an
external heatsink applied
Copper foil
FR4 board
Copper foil
Insulation
Aluminium
Aluminium
c
u
d
heatsink
The PowerSO-10 concept also represents an attractive alternative to C.O.B. techniques.
PowerSO-10 offers devices fully tested at low and
high temperature. Mounting is simple - only conventional SMT is required - enabling the users to
get rid of bond wire problems and the problem to
)
s
(
ct
e
t
le
)
s
t(
o
r
P
control the high temperature soft soldering as well.
An optimized thermal management is guaranteed
through PowerSO-10 as the power chips must in
any case be mounted on heat spreaders before
being mounted onto the substrate.
o
s
b
O
-
TABLE 1 : THERMAL IMPEDANCE VERSUS SUBSTRATE
PowerSo-10 package mounted on
Rth (j-a)
P Diss (*)
1.FR4 using the recommended pad-layout
50 °C/W
1.5 W
2.FR4 with heatsink on board (6cm2)
35 °C/W
2.0 W
3.FR4 with copper-filled through holes and external heatsink applied
12 °C/W
5.8 W
4. IMS floating in air (40 cm2)
8 °C/W
8.8 W
3.5 °C/W
20 W
u
d
o
r
P
e
t
e
l
o
s
b
O
5. IMS with external heatsink applied
(*) Based on a delta T of 70 °C junction train.
19/21
CLP200M
PACKAGE MECHANICAL DATA
B
0.10 A B
10
H
6
E
E3 E1
E2
5
1
SEATING
PLANE
e
B
A
DETAIL "A"
C
0.25 M
Q
D
D1
h
c
u
d
A
F
SEATING
PLANE
A1
o
r
P
A1
e
t
le
)
s
t(
L
DETAIL "A"
so
E4
du
DIMENSIONS
REF.
o
r
P
e
Millimeters
Min. Typ. Max.
A
3.35
)
s
(
ct
Min.
b
O
-
Inches
Typ.
a
Max.
DIMENSIONS
REF.
Millimeters
Min. Typ. Max.
Inches
Min.
Typ.
Max.
3.65 0.131
0.143
E3
6.10
6.35 0.240
0.250
0.10
0.0039
E4
5.90
6.10 0.232
0.240
C
t
e
l
o
0.35
0.55 0.0137
0.0217
F
1.25
1.35 0.0492
0.0531
D
9.40
9.60 0.370
0.378
H
7.40
7.60 0.291
0.299
14.4 0.543
0
0.567
D1
13.8
0
E
9.30
9.50 0.366
0.374
h
A1
B
0.00
s
b
O
0.00
0.40
0.60 0.0157
0.0236
e
E1
7.20
7.40 0.283
0.291
L
E2
7.20
7.60 0.283
0.299
Q
MARKING
Package
Power SO-10
20/21
TM
Type
Marking
CLP200M
CLP200M
1.27
0.05
0.50
1.20
0.019
1.80 0.0472
1.70
0.0708
0.067
CLP200M
ORDER CODE
CLP
200
M
-TR
TR = tape & reel
= tube
Current Limiting Protection
Package: PowerSO-10
Minimum operation voltage
FOOT PRINT
MOUNTING PAD LAYOUT RECOMMENDED
HEADER SHAPE
0.54 - 0.60
10.8 - 11.0
6.30
14.6 - 14.9
c
u
d
e
t
le
1.27
0.67 - 0.73
9.5
(s)
SHIPPING TUBE
o
r
P
o
s
b
O
-
Dimensions in millimeters
ct
C
B
t
e
l
o
o
r
P
e
A
du
)
s
t(
DIMENSIONS (mm)
TYP
A
B
C
Length tube
18
12
0,8
532
Quantity per tube
50
s
b
O
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written
approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 2003 STMicroelectronics - Printed in Italy - All rights reserved.
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21/21