STMICROELECTRONICS STS20NHS3LL

STS20NHS3LL
N-channel 30V - 0.0032Ω - 20A - SO-8™
STripFET™III Power MOSFET plus monolithic schottky
General features
Type
VDSS
RDS(on)
ID
STS20NHS3LL
30V
0.0042Ω
20A(1)
1. This value is rated accordingly to Rthj-pcb
■
Optimal RDS(on) x Qg trade-off @ 4.5V
■
Reduced switching losses
■
Reduced conduction losses
■
Improved junction-case thermal resistance
SO-8
Description
This product utilizes the latest advanced design
rules of ST’s proprietary STripFET™ technology
and a proprietary process for integrating a
monolithic Schottky diode. The new Power
MOSFET is optimized for the most demanding
synchronous switch function in DC-DC converter
for Computer and Telecom.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STS20NHS3LL
20HS3LL-
SO-8
Tape & reel
January 2007
Rev 5
1/12
www.st.com
12
Contents
STS20NHS3LL
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................. 6
3
Test circuit
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12
................................................ 8
STS20NHS3LL
1
Electrical ratings
Electrical ratings
Table 1.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VDS
Drain-source voltage (VGS = 0)
30
V
VGS
Gate-source voltage
±16
V
ID(1)
Drain current (continuous) at TC = 25°C
20
A
ID
Drain current (continuous) at TC=100°C
12.6
A
Drain current (pulsed)
80
A
Total dissipation at TC = 25°C
2.7
W
-55 to 150
°C
IDM
(2)
PTOT
TJ
Tstg
Operating junction temperature
Storage temperature
1. This value is rated accordingly to Rthj-pcb
2. Pulse width limited by safe operating area
Table 2.
Symbol
Rthj-pcb(1)
Thermal data
Parameter
Thermal resistance junction-pcb max
Value
Unit
47
°C/W
Value
Unit
1. When mounted on 1 inch² FR-4 board, 2oz Cu. (t<10sec.)
Table 3.
Symbol
Avalanche data
Parameter
IAV
Avalanche current, not repetitive (pulse
width limited by Tjmax)
10
A
EAS
Single pulse avalanche energy (starting
Tj=25°C, ID=IAV, VDD=24V)
1.8
J
3/12
Electrical characteristics
2
STS20NHS3LL
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 4.
Symbol
On/off states
Parameter
Test conditions
Typ.
Max.
Unit
Drain-source breakdown
voltage
ID = 1mA, VGS= 0
IDSS
Zero gate voltage drain
current (VGS = 0)
VDS = 24V
500
µA
IGSS
Gate body leakage current
(VDS = 0)
VGS = ±16V
±100
nA
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 1mA
2.5
V
RDS(on)
Static drain-source on
resistance
VGS= 10V, ID= 10A
V(BR)DSS
Table 5.
Symbol
gfs (1)
Ciss
Coss
Crss
Qg
Qgs
Qgd
30
V
1
0.0032 0.0042
0.004 0.0057
VGS= 4.5V, ID= 10A
Ω
Ω
Dynamic
Parameter
Test conditions
Forward transconductance
VDS =10V, ID = 15A
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS =25V, f=1MHz, VGS=0
Total gate charge
Gate-source charge
Gate-drain charge
VDD= 15V, ID = 20A
VGS = 4.5V,
(see Figure 13)
1. Pulsed: pulse duration=300µs, duty cycle 1.5%
4/12
Min.
Min.
Typ.
Max.
Unit
44
S
4200
700
46.2
pF
pF
pF
27
8.5
7.2
35
nC
nC
nC
STS20NHS3LL
Electrical characteristics
Table 6.
Switching times
Symbol
Parameter
td(on)
tr
td(off)
tf
Table 7.
Symbol
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD=15V, ID=10A,
RG=4.7Ω, VGS=4.5V
(see Figure 12)
VDD=15V, ID=10A,
RG=4.7Ω, VGS=4.5V
(see Figure 12)
Parameter
Test conditions
ISDM(1)
VSD(2)
Forward on voltage
ISD=5A, VGS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=20A, di/dt = 100A/µs,
VDD=25V, Tj=150°C
trr
Qrr
IRRM
Typ.
Max.
Unit
16
45
ns
ns
68
8
ns
ns
Source drain diode
Source-drain current
Source-drain current
(pulsed)
ISD
Min.
(see Figure 17)
Min.
Typ.
30
30
2
Max.
Unit
20
80
A
A
0.75
V
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
5/12
Electrical characteristics
STS20NHS3LL
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
Figure 5.
Normalized BVDSS vs. temperature
Figure 6.
Static drain-source on resistance
6/12
STS20NHS3LL
Electrical characteristics
Figure 7.
Gate charge vs. gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs. temperature
Capacitance variations
Figure 10. Normalized on resistance vs.
temperature
Figure 11. Source-drain diode forward
characteristics
7/12
Test circuit
3
STS20NHS3LL
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
Figure 14. Test circuit for inductive load
Figure 15. Unclamped inductive load test
switching and diode recovery times
circuit
Figure 16. Unclamped inductive waveform
8/12
Figure 17. Switching time waveform
STS20NHS3LL
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at : www.st.com
9/12
Package mechanical data
STS20NHS3LL
SO-8 MECHANICAL DATA
DIM.
mm.
MIN.
TYP
A
a1
inch
MAX.
TYP.
1.75
0.1
MAX.
0.068
0.25
a2
0.003
0.009
1.65
0.064
a3
0.65
0.85
0.025
0.033
b
0.35
0.48
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.25
0.5
0.010
0.019
D
4.8
5.0
0.188
0.196
E
5.8
6.2
0.228
c1
45 (typ.)
1.27
e
e3
3.81
0.150
3.8
4.0
0.14
L
0.4
1.27
0.015
S
0.244
0.050
F
M
10/12
MIN.
0.6
0.157
0.050
0.023
8 (max.)
STS20NHS3LL
5
Revision history
Revision history
Table 8.
Revision history
Date
Revision
Changes
24-May-2005
1
Initial release.
19-Dec-2005
2
Inserted curves
05-Jan-2006
3
Modified value on On/off states
18-Jul-2006
4
The document has been reformatted
31-Jan-2007
5
Typo mistake on Table 1.
11/12
STS20NHS3LL
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