STB80PF55 STP80PF55 P-channel 55V - 0.016Ω - 80A - TO-220 - D2PAK STripFET™ II Power MOSFET General features Type VDSS RDS(on) ID STP80PF55 55V <0.018Ω 80A STB80PF55 55V <0.018Ω 80A ■ Extremely dv/dt capability ■ 100% avalanche tested ■ Application oriented characterization 3 3 1 D2PAK 1 2 TO-220 Description This Power MOSFET is the laest development of STMicroelectronics unique “Single feature size™”strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. Internal schematic diagram Applications ■ Switching application Order codes Part number Marking Package Packaging STP80PF55 P80PF55 TO-220 Tube B80PF55 D2PAK Tape & reel STB80PF55 September 2006 Rev. 5 1/13 www.st.com 13 Contents STB80PF55 - STP80PF55 Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 ................................................ 8 STB80PF55 - STP80PF55 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0) 55 V VGS Gate-source voltage ±16 V ID(1) Drain current (continuous) at TC = 25°C 80 A ID Drain current (continuous) at TC = 100°C 57 A Drain current (pulsed) 320 A Total dissipation at TC = 25°C 300 W Derating factor 2 W/°C Peak diode recovery voltage slope 7 V/ns IDM (2) PTOT dv/dt (3) EAS(4) Single pulse avalanche energy 1.4 J Tj Tstg Operating junction temperature Storage temperature -55 to 175 °C 1. Current limited by package 2. Pulse width limited by safe operating area 3. ISD < 40A, di/dt < 300 A/µs, VDD=80% V(BR)DSS 4. Starting Tj=25°C, ID=80A, VDD=40V Note: For the P-CHANNEL MOSFET actual polarity of voltages and current has to be reversed Table 2. Thermal data Symbol Rthj-case Rthj-a Tl Parameter Value Unit Thermal resistance junction-case max 0.5 °C/W Thermal resistance junction-ambient max 62.5 °C/W Maximum lead temperature for soldering purpose 300 °C 3/13 Electrical characteristics 2 STB80PF55 - STP80PF55 Electrical characteristics (TCASE=25°C unless otherwise specified) Table 3. Symbol Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage ID = 250mA, VGS = 0 IDSS Zero gate voltage drain current (VGS = 0) VDS = Max rating VDS = Max rating, TC=125°C 1 10 µA µA IGSS Gate-body leakage current (VDS = 0) VGS = ±16V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 250µA 4 V RDS(on) Static drain-source on resistance VGS = 10V, ID = 40A V(BR)DSS Table 4. Symbol 55 2 V 3 0.016 0.018 Ω Dynamic Parameter Test conditions Forward transconductance VDS > ID(on) x RDS(on)max, ID= 40A Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge gfs 4/13 On/off states Min. Typ. Max. Unit 32 S VDS = 25V, f = 1MHz, VGS = 0 5500 1130 600 pF pF pF ID = 25A, VDD = 80V, VGS = 10V (see Figure 14) 190 27 65 258 nC nC nC STB80PF55 - STP80PF55 Table 5. Symbol Electrical characteristics Switching times Parameter Test conditions Min. Typ. Max. Unit td(on) tr Turn-on delay time Rise time VDD=25V, ID=40A, RG=4.7Ω, VGS=10V (see Figure 13) 35 190 ns ns td(off) tf Turn-off delay time Fall time VDD=25V, ID=40A, RG=4.7Ω, VGS=10V (see Figure 13) 165 80 ns ns tr(Voff) tf tc Off-voltage rise time Fall time Cross-over time Vclamp=40V, ID=80A, RG=4.7Ω, VGS=10V (see Figure 13) 60 40 85 ns ns ns Table 6. Source drain diode Symbol Parameter ISD ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage ISD = 80A, VGS = 0 Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 80A, di/dt = 100A/µs VDD = 25V, Tj =150°C trr Qrr IRRM Test condictions Min Typ. 110 495 9 Max Unit 10 40 A A 1.6 V ns µC A 1. Pulse width limited by Tjmax 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5 % 5/13 Electrical characteristics STB80PF55 - STP80PF55 2.1 Electrical characteristics (curves) Figure 1. Safe operating area for TO-220 Figure 2. Thermal impedance for TO-220 Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/13 STB80PF55 - STP80PF55 Electrical characteristics Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Figure 11. Source-drain diode forward characteristics Capacitance variations Figure 10. Normalized on resistance vs temperature Figure 12. Normalized BVDSS vs temperature 7/13 Test circuit 3 STB80PF55 - STP80PF55 Test circuit Figure 13. Switching times test circuit for resistive load Figure 15. Test circuit for inductive load switching and diode recovery times 8/13 Figure 14. Gate charge test circuit STB80PF55 - STP80PF55 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 9/13 Package mechanical data STB80PF55 - STP80PF55 TO-220 MECHANICAL DATA DIM. mm. MIN. inch MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 b1 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 e1 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 H1 6.20 6.60 0.244 0.256 J1 2.40 2.72 0.094 0.107 0.551 L 13 14 0.511 L1 3.50 3.93 0.137 L20 16.40 L30 10/13 TYP 0.154 0.645 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 STB80PF55 - STP80PF55 Package mechanical data D2PAK MECHANICAL DATA TO-247 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 10.4 0.393 D1 E 8 10 E1 0.315 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 R 0º 0.126 0.015 4º 3 V2 0.4 1 11/13 Revision history 5 STB80PF55 - STP80PF55 Revision history Table 7. 12/13 Revision history Date Revision Changes 09-Sep-2004 4 Revalidation 12-Sep-2006 5 New template, D2PAK added STB80PF55 - STP80PF55 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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