Freescale Semiconductor Technical Data Document Number: MHVIC2115NR2 Rev. 5, 5/2006 RF LDMOS Wideband Integrated Power Amplifier MHVIC2115NR2 The MHVIC2115NR2 wideband integrated circuit is designed for base station applications. It uses Freescale’s newest High Voltage (26 to 28 Volts) LDMOS IC technology and integrates a multi - stage structure. Its wideband On - Chip matching design makes it usable from 1600 to 2600 MHz. The linearity performances cover W - CDMA modulation formats. Final Application • Typical W - CDMA Performance: - 45 dBc ACPR, 2110 - 2170 MHz, VDD = 27 Volts, IDQ1 = 56 mA, IDQ2 = 61 mA, IDQ3 = 117 mA, Pout = 34 dBm, 3GPP Test Model 1, Measured in 1.0 MHz BW @ 4 MHz offset, 64 DTCH Power Gain — 30 dB PAE = 16% Driver Application • Typical W - CDMA Performance: - 53 dBc ACPR, 2110 - 2170 MHz, VDD = 26 Volts, IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 23 dBm, 3GPP Test Model 1, Measured in 3.84 MHz BW @ 5 MHz offset, 64 DTCH Power Gain — 34 dB • Gain Flatness = 0.3 dB from 2110 - 2170 MHz • P1dB = 15 Watts, Gain Flatness = 0.2 dB from 2110 - 2170 MHz • Capable of Handling 3:1 VSWR, @ 26 Vdc, 2140 MHz, 15 Watts CW Output Power Features • Characterized with Series Equivalent Large - Signal Impedance Parameters • On - Chip Matching (50 Ohm Input, DC Blocked, >5 Ohm Output) • Integrated Temperature Compensation with Enable/Disable Function • Integrated ESD Protection • RoHS Compliant • In Tape and Reel. R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel. 2170 MHz, 26 V, 23/34 dBm W - CDMA RF LDMOS WIDEBAND INTEGRATED POWER AMPLIFIER 16 1 CASE 978 - 03 PFP - 16 Table 1. Maximum Ratings Rating Symbol Value Unit Drain- Source Voltage VDSS - 0.5, +65 Vdc Gate- Source Voltage VGS - 0.5, +15 Vdc Storage Temperature Range Tstg - 65 to +150 °C Operating Junction Temperature TJ 150 °C VGS3 VGS2 VGS1 Quiescent Current Temperature Compensation RFin IC VDS1 VDS2 VDS3/RFout 3 Stages IC 1 16 N.C. 2 15 VDS3/RFout VGS2 3 14 VDS3/RFout VGS1 4 13 VDS3/RFout RFin 5 12 VDS3/RFout RFin 6 11 VDS3/RFout VDS1 VDS2 7 8 10 9 VDS3/RFout N.C. (Top View) Note: Exposed backside flag is source terminal for transistors. Figure 1. Block Diagram © Freescale Semiconductor, Inc., 2006. All rights reserved. RF Device Data Freescale Semiconductor N.C. VGS3 Figure 2. Pin Connections MHVIC2115NR2 1 Table 2. Thermal Characteristics Characteristic Symbol Thermal Resistance, Junction to Case Value Unit RθJC °C/W Driver Application (Pout = +0.2 W CW) Stage 1, 26 Vdc, IDQ = 96 mA Stage 2, 26 Vdc, IDQ = 204 mA Stage 3, 26 Vdc, IDQ = 111 mA 3.5 Output Application (Pout = +2.5 W CW) Stage 1, 27 Vdc, IDQ = 56 mA Stage 2, 27 Vdc, IDQ = 61 mA Stage 3, 27 Vdc, IDQ = 117 mA 2.7 Table 3. ESD Protection Characteristics Test Conditions Class Human Body Model 1 (Minimum) Machine Model M1 (Minimum) Charge Device Model C2 (Minimum) Table 4. Moisture Sensitivity Level Test Methodology Rating Package Peak Temperature Unit 3 260 °C Per JESD 22 - A113, IPC/JEDEC J - STD - 020 Table 5. Electrical Characteristics (TC = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit W - CDMA Characteristics (In Freescale Test Fixture, 50 ohm system) VDD = 26 Vdc, IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA, Pout = 23 dBm, 2110- 2170 MHz Power Gain Gps 31 34 — dB Gain Flatness GF — 0.3 0.5 dB Input Return Loss IRL — - 12 - 10 dB Group Delay — — 1.7 — ns Phase Linearity — — 0.2 — ° 1 - Carrier W - CDMA Conditions: Adjacent Channel Power Ratio @ Pout = 23 dBm, 5 MHz Offset ACPR — - 53 - 50 dBc 1 - Carrier W - CDMA Conditions: Adjacent Channel Power Ratio @ Pout = 28 dBm, 5 MHz Offset ACPR — - 50 — dBc W - CDMA Characteristics (In Freescale Test Fixture, 50 ohm system) VDD = 27 Vdc, IDQ1 = 56 mA, IDQ2 = 61 mA, IDQ3 = 117 mA, Pout = 34 dBm, 2110- 2170 MHz Power Gain Gps — 30 — dB Gain Flatness GF — 0.2 — dB Input Return Loss IRL — - 12 — dB Power Added Efficiency PAE — 16 — % ACPR — - 45 — dBc 1 - Carrier W - CDMA Conditions: Adjacent Channel Power Ratio @ Pout = 34 dBm, 4 MHz Offset MHVIC2115NR2 2 RF Device Data Freescale Semiconductor 1 16 2 15 Vbias3 + R3 C1 C2 C15 Vbias2 + R2 C5 14 3 C3 Vbias1 4 13 5 12 C16 RF OUTPUT + R1 C14 RF INPUT C4 6 VD1 + C21 VD2 + C13 7 + C8 C7 C1, C5, C8, C12, C14, C19 C2, C3, C4, C7, C11, C18 C6, C10, C17 C9, C15, C16 VD3 10 + C17 8 C11 11 C6 + C12 Quiescent Current Temperature Compensation C9 C18 C19 + C20 9 C10 1 mF SMT Tantalum Chip Capacitors 0.01 mF Chip Capacitors (0805C103K5RACTR) 6.8 pF Chip Capacitors, ACCU - P (AVX 08051J6R8BBT) 1.8 pF Chip Capacitors, ACCU - P (AVX 08051J1R8BBT) C13, C20, C21 330 mF Electrolytic Capacitors (MCR35V337M10X16) R1, R2, R3 1 kW Chip Resistors (0805) PCB Arlon, 0.020,, er = 2.55 Figure 3. MHVIC2115NR2 Demo Board Schematic MHVIC2115NR2 RF Device Data Freescale Semiconductor 3 Vbias1 Vbias2 Vbias3 R1 R2 R3 VGS C2 C14 C5 C4 VG1 VG2 VG3 C1 MHVIC2115R2 Rev 1 C3 C15 C9 C16 C6 C10 C17 C7 C18 C12 C8 C19 C11 C21 VDD1 C13 VDD2 C20 VDD3 Freescale has begun the transition of marking Printed Circuit Boards (PCBs) with the Freescale Semiconductor signature/logo. PCBs may have either Motorola or Freescale markings during the transition period. These changes will have no impact on form, fit or function of the current product. Figure 4. MHVIC2115NR2 Demo Board Component Layout MHVIC2115NR2 4 RF Device Data Freescale Semiconductor TYPICAL CHARACTERISTICS 50 0 40 1.8 1.6 −5 S21 TC = 85_C 1.4 25_C 20 −15 S11 10 −20 0 −25 S11 (dB) −10 DELAY, (nSEC) S21 (dB) 30 1.2 −30_C 1 0.8 0.6 0.4 −10 −30 VDD = 27 Vdc, Pout = 23 dBm CW VDD = 27 Vdc, Pout = 23 dBm CW 0.2 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA −20 −35 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 0 2100 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA 2110 2120 2130 2140 2150 2160 f, FEQUENCY (MHz) f, FREQUENCY (MHz) Figure 5. Broadband Frequency Response Figure 6. Delay versus Frequency 40 2170 2180 2170 2180 20 38 TC = −30_C 37 36 25_C 35 34 85_C 33 32 IRL, INPUT RETURN LOSS (dB) G ps , POWER GAIN (dB) 39 TC = 85_C 15 25_C −30_C 10 5 VDD = 27 Vdc, Pout = 23 dBm CW VDD = 27 Vdc, Pout = 23 dBm CW 31 30 2100 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA 2110 2120 2130 2140 2150 2160 2170 0 2100 2180 2110 2120 2130 2140 2150 2160 f, FREQUENCY (MHz) f, FREQUENCY, (MHz) Figure 7. Power Gain versus Frequency Figure 8. Input Return Loss versus Frequency 40 70 39 37 65 TC = 25_C TC = −30_C S21 PHASE(_) G ps , POWER GAIN (dB) 38 36 25_C 35 34 85_C 33 60 −30_C 55 50 85_C 32 45 VDD = 27 Vdc, f = 2140 MHz 31 IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA 30 20 25 30 35 VDD = 27 Vdc, f = 2140 MHz IDQ1 = 96 mA, IDQ2 = 204 mA, IDQ3 = 111 mA 40 40 45 20 25 30 35 40 Pout, OUTPUT POWER (dBm) Pout, OUTPUT POWER (dBm) Figure 9. Power Gain versus Output Power Figure 10. S21 Phase versus Output Power 45 MHVIC2115NR2 RF Device Data Freescale Semiconductor 5 −40 −40 VDD = 27 Vdc 3GPP Test Model 1 64 DPCH −42 −44 −45 −46 VDD = 27 Vdc Pout = 23 dBm Two−Tone Avg. Tone Spacing = 100 kHz IDQ3 = 100 mA −50 −50 IMR (dBc) −48 2110 MHz −52 2170 MHz −54 −56 −58 17 19 21 −55 3rd Order 23 25 27 29 31 111 mA 100 mA −65 2140 MHz −60 15 122 mA −60 5th Order 33 −70 2000 35 122 mA 2050 2100 2150 2200 2250 Pout, OUTPUT POWER (dBm) f, FREQUENCY (MHz) Figure 11. W - CDMA ACPR versus Output Power Figure 12. Two - Tone IMR versus Frequency −50 6.00 −52 5.75 5.50 VBIAS1 5.25 VBIAS2 Vbias, FIXTURE BIAS VOLTAGE (V) −54 3rd Order −56 −58 VDD = 27 Vdc, f = 2140 Pout = 23 dBm, Two−Tone Avg. −60 −62 5th Order −64 −66 −68 −70 5 10 15 20 25 5.00 VDD = 27 Vdc R1 = R2 = R3 = 1000 Ohms 4.75 4.50 4.25 VBIAS3 4.00 3.75 3.50 3.25 3.00 −40 −30 −20 −10 0 10 20 30 40 50 60 70 80 90 100 TONE SPACING (MHz) T, TEMPERATURE (C) Figure 13. Two - Tone Broadband Performance Figure 14. Fixture Bias versus Temperature Vgs, IC GATE BIAS VOLTAGE (V) 0 4.20 2.00 4.10 1.80 4.00 3.90 1.60 Vgs1 & Vgs2 Igs1 & Igs2 3.80 3.60 1.40 1.20 VDD = 27 Vdc R1 = R2 = R3 = 1000 Ohms 3.70 Vgs3 1.00 0.80 3.50 0.60 3.40 0.40 Igs3 3.30 3.20 −40 −30 −20 −10 2300 Igs, GATE BIAS CURRENT (mA) IMD, INTERMODULATION DISTORTION (dBc) ACPR, ADJACENT CHANNEL POWER RATIO (dBc) TYPICAL CHARACTERISTICS 0.20 0.00 0 10 20 30 40 50 60 70 80 90 100 T, TEMPERATURE (C) Figure 15. Gate Bias versus Temperature MHVIC2115NR2 6 RF Device Data Freescale Semiconductor Zo = 50 Ω f = 2170 MHz f = 2110 MHz Zin Zload f = 2170 MHz f = 2110 MHz VDD = 27 Vdc, IDQ = 1411 mA, Pout = 15 W Avg. Zin f MHz Zin Ω Zload Ω 2110 72.55 + j12.8 4.25 + j1.00 2140 71.40 + j9.9 4.13 + j1.37 2170 70.20 + j7.1 4.12 + j1.46 = Device input impedance as measured from gate to ground. Zload = Test circuit impedance as measured from drain to ground. Output Matching Network Device Under Test Z in Z load Figure 16. Series Equivalent Input and Load Impedance MHVIC2115NR2 RF Device Data Freescale Semiconductor 7 NOTES MHVIC2115NR2 8 RF Device Data Freescale Semiconductor NOTES MHVIC2115NR2 RF Device Data Freescale Semiconductor 9 NOTES MHVIC2115NR2 10 RF Device Data Freescale Semiconductor PACKAGE DIMENSIONS h X 45 _ A E2 1 14 x e 16 D e/2 D1 8 9 E1 8X bbb M B BOTTOM VIEW E C B S ÉÉ ÇÇÇ ÇÇÇ ÉÉ b1 Y c A A2 c1 b DATUM PLANE SEATING PLANE H M ccc C q W GAUGE PLANE W L C A SECT W - W L1 C aaa A1 1.000 0.039 S NOTES: 1. CONTROLLING DIMENSION: MILLIMETER. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE −H− IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.250 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE −H−. 5. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION IS 0.127 TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. DATUMS −A− AND −B− TO BE DETERMINED AT DATUM PLANE −H−. DIM A A1 A2 D D1 E E1 E2 L L1 b b1 c c1 e h q aaa bbb ccc MILLIMETERS MIN MAX 2.000 2.300 0.025 0.100 1.950 2.100 6.950 7.100 4.372 5.180 8.850 9.150 6.950 7.100 4.372 5.180 0.466 0.720 0.250 BSC 0.300 0.432 0.300 0.375 0.180 0.279 0.180 0.230 0.800 BSC −−− 0.600 0_ 7_ 0.200 0.200 0.100 DETAIL Y CASE 978 - 03 ISSUE C PFP - 16 MHVIC2115NR2 RF Device Data Freescale Semiconductor 11 How to Reach Us: Home Page: www.freescale.com E - mail: [email protected] USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 +1 - 800- 521- 6274 or +1 - 480- 768- 2130 [email protected] Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen 7 81829 Muenchen, Germany +44 1296 380 456 (English) +46 8 52200080 (English) +49 89 92103 559 (German) +33 1 69 35 48 48 (French) [email protected] Japan: Freescale Semiconductor Japan Ltd. Headquarters ARCO Tower 15F 1 - 8 - 1, Shimo - Meguro, Meguro - ku, Tokyo 153 - 0064 Japan 0120 191014 or +81 3 5437 9125 [email protected] Asia/Pacific: Freescale Semiconductor Hong Kong Ltd. Technical Information Center 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong +800 2666 8080 [email protected] For Literature Requests Only: Freescale Semiconductor Literature Distribution Center P.O. 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Freescalet and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2006. All rights reserved. RoHS- compliant and/or Pb - free versions of Freescale products have the functionality and electrical characteristics of their non - RoHS- compliant and/or non - Pb- free counterparts. For further information, see http://www.freescale.com or contact your Freescale sales representative. For information on Freescale’s Environmental Products program, go to http://www.freescale.com/epp. MHVIC2115NR2 Document Number: MHVIC2115NR2 Rev. 5, 5/2006 12 RF Device Data Freescale Semiconductor