TI TS3L500AERHUR

TS3L500AE
www.ti.com ....................................................................................................................................................... SCDS246A – JUNE 2007 – REVISED AUGUST 2008
16-BIT TO 8-BIT SPDT GIGABIT LAN SWITCH
WITH LED SWITCH AND ENHANCED ESD PROTECTION
•
FEATURES
1
•
•
•
•
10/100/1000 Base-T Signal Switching
Differential (LVDS, LVPECL) Signal Switching
Audio/Video Switching
Hub and Router Signal Switching
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
28
2LED2
VCC
0B1
39
0B2
36
1B2
A1
4
35
2B1
VCC
5
34
3B1
A2
6
33
2B2
A3
7
32
3B2
GND
VCC
4B1
5B1
4B2
5B2
VCC
8
31
VCC
A4
9
30
4B1
A5
10
29
5B1
A6
11
28
4B2
A7
12
27
5B2
GND
6B1
7B1
6B2
7B2
SEL
13
26
6B1
VCC
14
25
7B1
LED0
15
24
6B2
LED1
16
23
7B2
N.C.
17
22
VCC
GND
GND
0LED2
1LED2
VCC
GND
0LED1
1LED1
27
29
26
20
24
30
25
19
GND
2B1
3B1
2B2
3B2
37
3
N.C. – Not internally connected
21
43
2
A0
1LED2
44
VCC
19
5
6
1B1
20
45
38
1LED1
4
1
LED2
0LED2
46
0B1
1B1
0B2
1B2
41
GND
49
51
50
GND
2LED1
2LED2
VCC
53
52
GND
LED2
3
21
GND
SEL
VCC
LED0
LED1
48
47
23
GND
A6
A7
54
VCC
GND
VCC
A4
A5
55
56
N.C.
GND
A2
A3
1
2
22
GND
A0
A1
VCC
40
RUA PACKAGE
(TOP VIEW)
RHU PACKAGE
(TOP VIEW)
2LED1
•
•
APPLICATIONS
42
•
18
•
Wide Bandwidth (BW = 950 MHz Typ)
Low Crosstalk (XTALK = –37 dB Typ)
Low Bit-to-Bit Skew (tsk(o) = 100 ps Max)
Low and Flat ON-State Resistance
(ron = 4 Ω Typ, ron(flat) = 0.5 Ω Typ)
Low Input/Output Capacitance
(CON = 8 pF Typ)
Rail-to-Rail Switching on Data I/O Ports
(0 to 3.6 V)
VCC Operating Range From 3 V to 3.6 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
0LED1
•
•
•
•
ESD Performance
– 8-kV IEC61000-4-2, Contact Discharge on
Switch IOs
– 3-kV Human Body Model Per
JESD22-A114E
– 14-kV Human Body Model (Switch Pins to
GND)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007–2008, Texas Instruments Incorporated
TS3L500AE
SCDS246A – JUNE 2007 – REVISED AUGUST 2008 ....................................................................................................................................................... www.ti.com
DESCRIPTION/ORDERING INFORMATION
The TS3L500AE is a 16-bit to 8-bit multiplexer/demultiplexer LAN switch with a single select (SEL) input. SEL
controls the data path of the multiplexer/demultiplexer. The device provides additional I/Os for switching status
indicating LED signals and includes high ESD protection.
The device provides a low and flat ON-state resistance (ron) and an excellent ON-state resistance match. Low
input/output capacitance, high bandwidth, low skew, and low crosstalk among channels make this device suitable
for various LAN applications, such as 10/100/1000 Base-T.
This device can be used to replace mechanical relays in LAN applications. It also can be used to route signals
from a 10/100 Base-T ethernet transceiver to the RJ-45 LAN connectors in laptops or in docking stations.
ORDERING INFORMATION
TA
–40°C to 85°C
(1)
(2)
PACKAGE
(1) (2)
.
ORDERABLE PART NUMBER
QFN – RUA
Tape and reel
TS3L500AERUAR
TQFN – RHU
Tape and reel
TS3L500AERHUR
TOP-SIDE MARKING
TK500AE
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
FUNCTION TABLE
INPUT
SEL
INPUT/OUTPUT
An
FUNCTION
L
nB1
An = nB1, LEDx = XLED1
H
nB2
An = nB2, LEDx = XLED2
PIN DESCRIPTION
2
NAME
DESCRIPTION
An
Data I/Os
nBm
Data I/Os
SEL
Select input
LEDx
LED I/O port
XLEDm
LED I/O port
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TS3L500AE
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LOGIC DIAGRAM (POSITIVE LOGIC)
2
48
3
47
0B1
A0
1B1
A1
46
0B2
45
1B2
7
43
8
42
2B1
A2
3B1
A3
41
2B2
40
3B2
11
37
12
36
4B1
A4
5B1
A5
35
4B2
34
5B2
14
32
6B1
A6
15
31
7B1
A7
30
6B2
29
7B2
19
LED0
22
25
LED1
20
23
26
LED2
54
52
51
SEL
0LED1
0LED2
1LED1
1LED2
2LED1
2LED2
17
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TS3L500AE
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ABSOLUTE MAXIMUM RATINGS (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
VCC
Supply voltage range
–0.5
4.6
V
VIN
Control input voltage range (2) (3)
–0.5
7
V
(2) (3) (4)
VI/O
Switch I/O voltage range
IIK
Control input clamp current
VIN < 0
–50
mA
II/OK
I/O port clamp current
VI/O < 0
–50
mA
±128
mA
II/O
ON-state switch current
–0.5
(5)
7
UNIT
V
Continuous current through VDD or GND
±100
mA
θJA
Package thermal impedance (6)
31.8
°C/W
Tstg
Storage temperature range
150
°C
(1)
(2)
(3)
(4)
(5)
(6)
–65
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltages are with respect to ground, unless otherwise specified.
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
VI and VO are used to denote specific conditions for VI/O.
II and IO are used to denote specific conditions for II/O.
The package thermal impedance is calculated in accordance with JESD 51-7.
RECOMMENDED OPERATING CONDITIONS (1)
MIN
MAX
VCC
Supply voltage
3
3.6
V
VIH
High-level control input voltage (SEL)
2
5.5
V
VIL
Low-level control input voltage (SEL)
0
0.8
V
VI
Input voltage (SEL)
0
5.5
V
VI/O
Input/output voltage
0
VCC
V
TA
Operating free-air temperature
–40
85
°C
(1)
4
UNIT
All unused control inputs of the device must be held at VDD or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
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TS3L500AE
www.ti.com ....................................................................................................................................................... SCDS246A – JUNE 2007 – REVISED AUGUST 2008
ELECTRICAL CHARACTERISTICS
for 1000 Base-T Ethernet switching over recommended operating free-air temperature range, VDD = 3.3 V ± 0.3 V
(unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
VIK
SEL
VCC = 3.6 V,
IIN = –18 mA
IIH
SEL
VCC = 3.6 V,
IIL
SEL
IOFF
SEL
ICC
MIN
TYP (2) MAX
UNIT
–1.2
V
VIN = VDD
±1
µA
VCC = 3.6 V,
VIN = GND
±1
µA
VCC = 0 V,
VIN = 0 to 3.6 V
VCC = 3.6 V,
II/O = 0,
CIN
SEL
f = 1 MHz,
VIN = 0
COFF
B port
–0.7
Switch ON or OFF
±1
µA
250
600
µA
2
2.5
pF
VI = 0,
f = 1 MHz,
Outputs open,
Switch OFF
3
4
pF
CON
VI = 0,
f = 1 MHz,
Outputs open,
Switch ON
9
9.8
pF
ron
VCC = 3 V,
1.5 V ≤ VI ≤ VCC,
IO = –40 mA
4
8
Ω
VCC = 3 V,
VI = 1.5 V and VCC,
IO = –40 mA
0.7
VCC = 3 V,
1.5 V ≤ VI ≤ VCC,
IO = –40 mA
0.2
ron(flat)
(3)
Δron (4)
(1)
(2)
(3)
(4)
Ω
1.2
Ω
VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs.
All typical values are at VDD = 3.3 V (unless otherwise noted), TA = 25°C.
ron(flat) is the difference of ron in a given channel at specified voltages.
Δron is the difference of ron from center (A4, A5) ports to any other port.
ELECTRICAL CHARACTERISTICS
for 10/100 Base-T Ethernet switching over recommended operating free-air temperature range, VDD = 3.3 V ± 0.3 V
(unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TYP (2)
MAX
–0.7
–1.2
V
UNIT
VIK
SEL
VCC = 3.6 V,
IIN = –18 mA
IIH
SEL
VCC = 3.6 V,
VIN = VDD
±1
µA
IIL
SEL
VCC = 3.6 V,
VIN = GND
±1
µA
IOFF
SEL
VCC = 0 V,
VIN = 0 to 3.6 V
VCC = 3.6 V,
II/O = 0,
ICC
CIN
SEL
f = 1 MHz,
VIN = 0
COFF
B port
Switch ON or OFF
±1
µA
250
600
µA
2
2.5
pF
VI = 0,
f = 1 MHz,
Outputs open,
Switch OFF
3
4
pF
CON
VI = 0,
f = 1 MHz,
Outputs open,
Switch ON
9
9.8
pF
ron
VCC = 3 V,
1.25 V ≤ VI ≤ VCC,
IO = –10 mA to –30 mA
4
6
Ω
VCC = 3 V,
VI = 1.25 V and VCC,
IO = –10 mA to –30 mA
0.5
VCC = 3 V,
1.25 V ≤ VI ≤ VCC,
IO = –10 mA to –30 mA
0.4
ron(flat)
(3)
Δron (4)
(1)
(2)
(3)
(4)
Ω
1
Ω
VI, VO, II, and IO refer to I/O pins. VIN refers to the control inputs.
All typical values are at VDD = 3.3 V (unless otherwise noted), TA = 25°C.
ron(flat) is the difference of ron in a given channel at specified voltages.
Δron is the difference of ron from center (A4, A5) ports to any other port.
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SWITCHING CHARACTERISTICS
over recommended operating free-air temperature range, VDD = 3.3 V ± 0.3 V, RL = 200 Ω, CL = 10 pF
(unless otherwise noted) (see Figures 4 and 5)
FROM
(INPUT)
TO
(OUTPUT)
A or B
B or A
SEL
A or B
0.5
tPHZ, tPLZ
SEL
A or B
0.9
tsk(o) (3)
A or B
B or A
PARAMETER
tpd
(2)
tPZH, tPZL
MIN
TYP (1)
0.25
tsk(p) (4)
(1)
(2)
(3)
(4)
MAX
UNIT
ns
15
ns
9
ns
50
100
ps
50
100
ps
All typical values are at VDD = 3.3 V (unless otherwise noted), TA = 25°C.
The propagation delay is the calculated RC time constant of the typical ON-state resistance of the switch and the specified load
capacitance when driven by an ideal voltage source (zero output impedance).
Output skew between center port (A4 to A5) to any other port
Skew between opposite transitions of the same output in a given device |tPHL – tPLH|
DYNAMIC CHARACTERISTICS
over recommended operating free-air temperature range, VDD = 3.3 V ± 0.3 V (unless otherwise noted)
PARAMETER
(1)
6
TYP (1)
TEST CONDITIONS
UNIT
XTALK
RL = 100 Ω,
f = 250 MHz,
See Figure 8
–37
OIRR
RL = 100 Ω,
f = 250 MHz,
See Figure 9
–37
dB
BW
RL = 100 Ω,
See Figure 7
950
MHz
dB
All typical values are at VCC = 3.3 V (unless otherwise noted), TA = 25°C.
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OPERATING CHARACTERISTICS
0
0
−2
Attenuation (dB)
−20
Gain (dB)
−4
−6
−8
−40
−60
−80
−10
−12
0.1
1
10
100
1000
10,000
−100
0.1
1
Frequency (MHz)
Figure 1. Gain vs Frequency
10,000
Figure 2. OFF Isolation vs Frequency
6
0
5
−20
4
ron (W)
Attenuation (dB)
1000
10
100
Frequency (MHz)
−40
−60
2
−80
−100
0.1
3
1
0
1
10
100
Frequency (MHz)
1000
10,000
0
1
2
3
4
5
6
VCOM (V)
Figure 3. Crosstalk vs Frequency
Figure 4. ron (Ω) vs Vcom (V)
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PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
VCC
Input Generator
VIN
50 Ω
50 Ω
VG1
TEST CIRCUIT
DUT
2 × VCC
Input Generator
VI
S1
RL
VO
50 Ω
CL
(see Note A)
50 Ω
VG2
RL
TEST
VCC
S1
RL
Vin
CL
V∆
tPLZ/tPZL
3.3 V ± 0.3 V
2 × VCC
200 Ω
GND
10 pF
0.3 V
tPHZ/tPZH
3.3 V ± 0.3 V
GND
200 Ω
VCC
10 pF
0.3 V
VI
VO
2.5 V
Output Control
(VIN)
1.25 V
1.25 V
0V
Output
Waveform 1
S1 at 2 y VCC
(see Note B)
tPZL
tPLZ
VOH
VCC/2
VOL + 0.3 V
tPZH
VO
Open
GND
Output
Waveform 2
S1 at GND
(see Note B)
VOL
tPHZ
VCC/2
VOH − 0.3 V
VOH
VOL
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
Figure 5. Test Circuit and Voltage Waveforms
8
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PARAMETER MEASUREMENT INFORMATION
(Skew)
VCC
Input Generator
VIN
50 Ω
50 Ω
VG1
TEST CIRCUIT
DUT
2 × VCC
Input Generator
50 Ω
Open
RL
TEST
VCC
S1
RL
Vin
CL
tsk(o)
3.3 V ± 0.3 V
Open
200 Ω
VCC or GND
10 pF
tsk(p)
3.3 V ± 0.3 V
Open
200 Ω
VCC or GND
10 pF
3.5 V
2.5 V
1.5 V
Data In at
Ax or Ay
tPHLx
VOH
(VOH + VOL)/2
VOL
Data Out at
XB1 or XB2
tsk(o)
VO
CL
(see Note A)
50 Ω
tPLHx
VO
S1
GND
VG2
VI
RL
VO
VI
3.5 V
2.5 V
1.5 V
Input
tsk(o)
VOH
(VOH + VOL)/2
VOL
Data Out at
YB1 or YB2
tPLHy
tPHLy
tPLH
VOH
(VOH + VOL)/2
VOL
Output
tsk(p) = |tPHL − tPLH|
tsk(o) = |tPLHy − tPLHx| or |tPHLy − tPHLx|
VOLTAGE WAVEFORMS
OUTPUT SKEW (tsk(o))
tPHL
VOLTAGE WAVEFORMS
PULSE SKEW [tsk(p)]
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time, with one transition per measurement.
Figure 6. Test Circuit and Voltage Waveforms
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TS3L500AE
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PARAMETER MEASUREMENT INFORMATION
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
A0
SEL
0B1
DUT
CL = 10 pF
(see Note A)
VSEL
A.
CL includes probe and jig capacitance.
Figure 7. Test Circuit for Frequency Response (BW)
Frequency response is measured at the output of the ON channel. For example, when VSEL = 0 and A0 is the
input, the output is measured at 0B1. All unused analog I/O ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
10
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PARAMETER MEASUREMENT INFORMATION (continued)
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
A0
0B1
RL = 100 Ω
A1
1B1
0B2
DUT
A2
1B2
2B1
RL = 100 Ω
A3
3B1
2B2
3B2
SEL
VSEL
A.
CL includes probe and jig capacitance.
B.
A 50-Ω termination resistor is needed to match the loading of the network analyzer.
Figure 8. Test Circuit for Crosstalk (XTALK)
Crosstalk is measured at the output of the nonadjacent ON channel. For example, when VSEL = 0 and A1 is the
input, the output is measured at A3. All unused analog input (A) ports are connected to GND, and output (B)
ports are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
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PARAMETER MEASUREMENT INFORMATION (continued)
EXT TRIGGER
BIAS
VBIAS
Network Analyzer
(HP8753ES)
P1
P2
VCC
A0
0B1
RL = 100 Ω
A1
1B1
DUT
0B2
1B2
SEL
VSEL
A.
CL includes probe and jig capacitance.
B.
A 50-Ω termination resistor is needed to match the loading of the network analyzer.
Figure 9. Test Circuit for OFF Isolation (OIRR)
OFF isolation is measured at the output of the OFF channel. For example, when VSEL = GND and A1 is the input,
the output is measured at 1B2. All unused analog input (A) ports are connected to ground, and output (B) ports
are left open.
HP8753ES Setup
Average = 4
RBW = 3 kHz
VBIAS = 0.35 V
ST = 2 s
P1 = 0 dBM
12
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PACKAGE OPTION ADDENDUM
www.ti.com
20-Mar-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TS3L500AERHUR
ACTIVE
WQFN
RHU
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS3L500AERHURG4
ACTIVE
WQFN
RHU
56
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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