ONSEMI NTMD6P02R2

NTMD6P02R2
Preferred Device
Power MOSFET
6 Amps, 20 Volts
P–Channel SO–8, Dual
Features
•
•
•
•
•
•
•
Ultra Low RDS(on)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Miniature Dual SO–8 Surface Mount Package
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
SO–8 Mounting Information Provided
http://onsemi.com
6 AMPERES
20 VOLTS
RDS(on) = 33 m
Applications
• Power Management in Portable and Battery–Powered Products, i.e.:
P–Channel
Cellular and Cordless Telephones and PCMCIA Cards
D
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol
Value
Unit
VDSS
–20
V
Gate–to–Source Voltage – Continuous
VGS
12
V
Thermal Resistance –
Junction–to–Ambient (Note 1.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
PD
ID
IDM
62.5
2.0
–7.8
–5.7
0.5
–3.89
–40
°C/W
W
A
A
W
A
A
Drain–to–Source Voltage
Thermal Resistance –
Junction–to–Ambient (Note 2.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
PD
ID
IDM
98
1.28
–6.2
–4.6
0.3
–3.01
–35
°C/W
W
A
A
W
A
A
Thermal Resistance –
Junction–to–Ambient (Note 3.)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 70°C
Maximum Operating Power Dissipation
Maximum Operating Drain Current
Pulsed Drain Current (Note 4.)
RθJA
PD
ID
ID
PD
ID
IDM
166
0.75
–4.8
–3.5
0.2
–2.48
–30
°C/W
W
A
A
W
A
A
1. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz. Cu 0.06″ thick single
sided), t = 10 seconds.
2. Mounted onto a 2″ square FR–4 Board (1″ sq. 2 oz. Cu 0.06″ thick single
sided), t = steady state.
3. Minimum FR–4 or G–10 PCB, t = steady state.
4. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%.
G
S
MARKING
DIAGRAM
SO–8, Dual
CASE 751
STYLE 11
8
E6P02
LYWW
1
L
Y
WW
= Location Code
= Year
= Work Week
PIN ASSIGNMENT
Source–1
1
8
Drain–1
Gate–1
2
7
Drain–1
Source–2
3
6
Drain–2
Gate–2
4
5
Drain–2
Top View
ORDERING INFORMATION
Device
NTMD6P02R2
Package
SO–8
Shipping
2500 Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
 Semiconductor Components Industries, LLC, 2000
November, 2000 – Rev. 1
1
Publication Order Number:
NTMD6P02R2/D
NTMD6P02R2
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) (continued)
Rating
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy – Starting TJ = 25°C
(VDD = –20 Vdc, VGS = –5.0 Vdc, Peak IL = –5.0 Apk, L = 40 mH, RG = 25 Ω)
Maximum Lead Temperature for Soldering Purposes for 10 seconds
Symbol
Value
Unit
TJ, Tstg
–55 to +150
°C
EAS
500
mJ
TL
260
°C
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) *
Characteristic
Symbol
Min
Typ
Max
Unit
–20
–
–
–11.6
–
–
–
–
–
–
–1.0
–5.0
–
–
–100
–
–
100
–0.6
–
–0.88
2.6
–1.20
–
–
–
–
0.027
0.038
0.038
0.033
0.050
–
gFS
–
15
–
Mhos
pF
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = –250 µAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Drain Current
(VDS = –20 Vdc, VGS = 0 Vdc, TJ = 25°C)
(VDS = –20 Vdc, VGS = 0 Vdc, TJ = 70°C)
IDSS
Gate–Body Leakage Current
(VGS = –12 Vdc, VDS = 0 Vdc)
IGSS
Gate–Body Leakage Current
(VGS = +12 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
µAdc
nAdc
nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = –250 µAdc)
Temperature Coefficient (Negative)
VGS(th)
Static Drain–to–Source On–State Resistance
(VGS = –4.5 Vdc, ID = –6.2 Adc)
(VGS = –2.5 Vdc, ID = –5.0 Adc)
(VGS = –2.5 Vdc, ID = –3.1 Adc)
RDS(on)
Forward Transconductance (VDS = –10 Vdc, ID = –6.2 Adc)
Vdc
mV/°C
Ω
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
16 Vd
(VDS = –16
Vdc, VGS = 0 Vd
Vdc,
f = 1.0 MHz)
Reverse Transfer Capacitance
Ciss
–
1380
1700
Coss
–
515
775
Crss
–
250
450
td(on)
–
15
25
tr
–
20
50
td(off)
–
85
125
tf
–
50
110
td(on)
–
17
–
tr
–
65
–
td(off)
–
50
–
SWITCHING CHARACTERISTICS (Notes 5. and 6.)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
(VDD = –10 Vdc, ID = –1.0 Adc,
Vdc
VGS = –10 Vdc,
RG = 6.0 Ω)
Fall Time
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
(VDD = –16 Vdc, ID = –6.2 Adc,
VGS = –4.5
4 5 Vdc,
Vdc
RG = 6.0 Ω)
Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
(VDS = –16 Vdc,
VGS = –4.5 Vdc,
ID = –6.2
6 2 Adc)
Ad )
5. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%.
6. Switching characteristics are independent of operating junction temperature.
* Handling precautions to protect against electrostatic discharge is mandatory.
http://onsemi.com
2
tf
–
80
–
Qtot
–
20
35
Qgs
–
4.0
–
Qgd
–
8.0
–
ns
ns
nC
NTMD6P02R2
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) (continued) *
Characteristic
Symbol
Min
Typ
Max
Unit
BODY–DRAIN DIODE RATINGS (Note 5.)
Diode Forward On–Voltage
(IS = –1.7 Adc, VGS = 0 Vdc)
(IS = –1.7 Adc, VGS = 0 Vdc, TJ = 125°C)
VSD
–
–
–0.80
–0.65
–1.2
–
Vdc
Diode Forward On–Voltage
(IS = –6.2 Adc, VGS = 0 Vdc)
(IS = –6.2 Adc, VGS = 0 Vdc, TJ = 125°C)
VSD
–
–
–0.95
–0.80
–
–
Vdc
trr
–
50
80
ns
ta
–
20
–
tr
–
30
–
QRR
–
0.04
–
Reverse Recovery Time
(IS = –1.7
1 7 Adc,
Ad VGS = 0 Vdc,
Vd
dIS/dt = 100 A/µs)
Reverse Recovery Stored Charge
µC
5. Indicates Pulse Test: Pulse Width = 300 µs max, Duty Cycle = 2%.
* Handling precautions to protect against electrostatic discharge is mandatory.
–10 V
10
–4.5 V
–3.8 V
10
–2.1 V
–ID, DRAIN CURRENT (AMPS)
–ID, DRAIN CURRENT (AMPS)
12
TJ = 25°C
8.0
–3.1 V
–2.5 V
6.0
–1.8 V
4.0
2.0
0
–1.5 V
VGS = –1.3 V
0
VDS ≥ –10 V
8.0
6.0
25°C
4.0
100°C
0
0.25
0.50
0.75
1.00
1.25
1.50
1.75
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
TJ = –55°C
2.0
0
1.0
1.5
2.0
2.5
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.05
ID = –6.2 A
TJ = 25°C
0.04
0.03
0.02
0.01
0
0
2.0
4.0
6.0
8.0
–VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
10
RDS(on), DRAIN–TO–SOURCE RESISTANCE ()
RDS(on), DRAIN–TO–SOURCE RESISTANCE ()
Figure 1. On–Region Characteristics
0.05
TJ = 25°C
VGS = –2.5 V
0.04
–2.7 V
0.03
–4.5 V
0.02
0.01
0
Figure 3. On–Resistance versus
Gate–To–Source Voltage
2.0
8.0
10
4.0
6.0
–ID, DRAIN CURRENT (AMPS)
12
14
Figure 4. On-Resistance versus Drain Current
and Gate Voltage
http://onsemi.com
3
1.6
1000
ID = –6.2 A
VGS = –4.5 V
1.2
1
0.8
0.6
–50
–25
0
25
50
75
100
125
TJ, JUNCTION TEMPERATURE (°C)
100°C
10
1
25°C
0.1
4
5000
VDS = 0 V
C, CAPACITANCE (pF)
4000
VGS = 0 V
TJ = 25°C
Ciss
3500
3000
2500 Crss
2000
Ciss
1500
1000
Coss
Crss
500
0
10
5.0
0
5.0
10
15
20
–VGS –VDS
5
20
QT
16
4
VDS
3
Q1
VGS
12
Q2
8
2
ID = –6.2 A
VDS = –16 V
VGS = –4.5 V
TJ = 25°C
1
4
0
0
GATE–TO–SOURCE OR DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
5.0
0
10
15
20
25
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate–To–Source and Drain–To–Source
Voltage versus Total Charge
1000
VDD = –16 V
ID = –1.0 A
VGS = –10 V
VDD = –16 V
ID = –6.2 A
VGS = –4.5 V
td(off)
tf
t, TIME (ns)
t, TIME (ns)
8
12
16
20
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 6. Drain–To–Source Leakage Current
versus Voltage
VGS , GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 5. On–Resistance Variation with
Temperature
4500
TJ = 125°C
100
0.01
150
VGS = 0 V
V DS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
1.4
–I DSS , LEAKAGE (nA)
RDS(on), DRAIN–TO–SOURCE RESISTANCE
(NORMALIZED)
NTMD6P02R2
100
tr
100
tf
tr
td(off)
td(on)
td(on)
10
10
1
10
100
1
10
100
RG, GATE RESISTANCE (OHMS)
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Resistive Switching Time Variation
versus Gate Resistance
http://onsemi.com
4
NTMD6P02R2
DRAIN–TO–SOURCE DIODE CHARACTERISTICS
100
VGS = 0 V
TJ = 25°C
4
–ID , DRAIN CURRENT (AMPS)
–IS, SOURCE CURRENT (AMPS)
5
3
2
1
0
0.2
0.4
0.6
0.8
10 ms
1
1.2
1.0
1.0 ms
10
0.1
0
VGS = 2.5 V
SINGLE PULSE
TC = 25°C
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
–VSD, SOURCE–TO–DRAIN VOLTAGE (VOLTS)
dc
1
0.1
10
100
–VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 11. Diode Forward Voltage versus Current
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
di/dt
IS
trr
tb
ta
TIME
0.25 IS
tp
IS
Figure 13. Diode Reverse Recovery Waveform
TYPICAL ELECTRICAL CHARACTERISTICS
Rthja(t)
, EFFECTIVE TRANSIENT
THERMAL RESISTANCE
10
1
0.1
D = 0.5
0.2
0.1
0.05
Normalized to θja at 10s.
Chip
0.02
0.01
0.0175 Ω
0.0710 Ω
0.2706 Ω
0.0154 F
0.0854 F
0.3074 F
0.5776 Ω
0.7086 Ω
0.01
SINGLE PULSE
1.7891 F
107.55 F
Ambient
0.001
1.0E–05
1.0E–04
1.0E–03
1.0E–02
1.0E–01
1.0E+00
t, TIME (s)
Figure 14. Thermal Response
http://onsemi.com
5
1.0E+01
1.0E+02
1.0E+03
NTMD6P02R2
INFORMATION FOR USING THE SO–8 SURFACE MOUNT PACKAGE
MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS
Surface mount board layout is a critical portion of the total
design. The footprint for the semiconductor packages must
be the correct size to ensure proper solder connection
interface between the board and the package. With the
correct pad geometry, the packages will self–align when
subjected to a solder reflow process.
0.060
1.52
0.275
7.0
0.155
4.0
0.024
0.6
0.050
1.270
inches
mm
SOLDERING PRECAUTIONS
• The soldering temperature and time shall not exceed
260°C for more than 10 seconds.
• When shifting from preheating to soldering, the
maximum temperature gradient shall be 5°C or less.
• After soldering has been completed, the device should
be allowed to cool naturally for at least three minutes.
Gradual cooling should be used as the use of forced
cooling will increase the temperature gradient and
result in latent failure due to mechanical stress.
• Mechanical stress or shock should not be applied
during cooling.
The melting temperature of solder is higher than the rated
temperature of the device. When the entire device is heated
to a high temperature, failure to complete soldering within
a short time could result in device failure. Therefore, the
following items should always be observed in order to
minimize the thermal stress to which the devices are
subjected.
• Always preheat the device.
• The delta temperature between the preheat and
soldering should be 100°C or less.*
• When preheating and soldering, the temperature of the
leads and the case must not exceed the maximum
temperature ratings as shown on the data sheet. When
using infrared heating with the reflow soldering
method, the difference shall be a maximum of 10°C.
* Soldering a device without preheating can cause
excessive thermal shock and stress which can result in
damage to the device.
http://onsemi.com
6
NTMD6P02R2
TYPICAL SOLDER HEATING PROFILE
temperature versus time. The line on the graph shows the
actual temperature that might be experienced on the surface
of a test board at or near a central solder joint. The two
profiles are based on a high density and a low density
board. The Vitronics SMD310 convection/infrared reflow
soldering system was used to generate this profile. The type
of solder used was 62/36/2 Tin Lead Silver with a melting
point between 177–189°C. When this type of furnace is
used for solder reflow work, the circuit boards and solder
joints tend to heat first. The components on the board are
then heated by conduction. The circuit board, because it has
a large surface area, absorbs the thermal energy more
efficiently, then distributes this energy to the components.
Because of this effect, the main body of a component may
be up to 30 degrees cooler than the adjacent solder joints.
For any given circuit board, there will be a group of
control settings that will give the desired heat pattern. The
operator must set temperatures for several heating zones
and a figure for belt speed. Taken together, these control
settings make up a heating “profile” for that particular
circuit board. On machines controlled by a computer, the
computer remembers these profiles from one operating
session to the next. Figure 15 shows a typical heating
profile for use when soldering a surface mount device to a
printed circuit board. This profile will vary among
soldering systems, but it is a good starting point. Factors
that can affect the profile include the type of soldering
system in use, density and types of components on the
board, type of solder used, and the type of board or
substrate material being used. This profile shows
STEP 1
PREHEAT
ZONE 1
“RAMP”
200°C
STEP 2
STEP 3
VENT
HEATING
“SOAK” ZONES 2 & 5
“RAMP”
DESIRED CURVE FOR HIGH
MASS ASSEMBLIES
STEP 4
HEATING
ZONES 3 & 6
“SOAK”
160°C
STEP 5
STEP 6
STEP 7
HEATING
VENT
COOLING
ZONES 4 & 7
205° TO 219°C
“SPIKE”
PEAK AT
170°C
SOLDER
JOINT
150°C
150°C
100°C
140°C
100°C
SOLDER IS LIQUID FOR
40 TO 80 SECONDS
(DEPENDING ON
MASS OF ASSEMBLY)
DESIRED CURVE FOR LOW
MASS ASSEMBLIES
5°C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 15. Typical Solder Heating Profile
http://onsemi.com
7
NTMD6P02R2
PACKAGE DIMENSIONS
SO–8
CASE 751–07
ISSUE V
–X–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
–Y–
G
C
N
X 45 SEATING
PLANE
–Z–
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
XXXXXX
ALYW
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
STYLE 11:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
SOURCE 1
GATE 1
SOURCE 2
GATE 2
DRAIN 2
DRAIN 2
DRAIN 1
DRAIN 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada
Email: [email protected]
Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada
N. American Technical Support: 800–282–9855 Toll Free USA/Canada
EUROPE: LDC for ON Semiconductor – European Support
German Phone: (+1) 303–308–7140 (Mon–Fri 2:30pm to 7:00pm CET)
Email: ONlit–[email protected]
French Phone: (+1) 303–308–7141 (Mon–Fri 2:00pm to 7:00pm CET)
Email: ONlit–[email protected]
English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT)
Email: [email protected]
CENTRAL/SOUTH AMERICA:
Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST)
Email: ONlit–[email protected]
Toll–Free from Mexico: Dial 01–800–288–2872 for Access –
then Dial 866–297–9322
ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support
Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time)
Toll Free from Hong Kong & Singapore:
001–800–4422–3781
Email: ONlit–[email protected]
JAPAN: ON Semiconductor, Japan Customer Focus Center
4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031
Phone: 81–3–5740–2700
Email: [email protected]
ON Semiconductor Website: http://onsemi.com
EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781
*Available from Germany, France, Italy, UK, Ireland
For additional information, please contact your local
Sales Representative.
http://onsemi.com
8
NTMD6P02R2/D