FAIRCHILD FDG6322C_08

June 2008
FDG6322C
Dual N & P Channel Digital FET
General Description
Features
These dual N & P-Channel logic level enhancement mode
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very
high density process is especially tailored to minimize
on-state resistance. This device has been designed
especially for low voltage applications as a replacement for
bipolar digital transistors and small signal MOSFETs. Since
bias resistors are not required, this dual digital FET can
replace several different digital transistors, with different bias
resistor values.
N-Ch 0.22 A, 25 V, RDS(ON) = 4.0 Ω @ VGS= 4.5 V,
RDS(ON) = 5.0 Ω @ VGS= 2.7 V.
P-Ch -0.41 A,-25V, RDS(ON) = 1.1 Ω @ VGS= -4.5V,
RDS(ON) = 1.5 Ω @ VGS= -2.7V.
Very small package outline SC70-6.
Very low level gate drive requirements allowing direct
operation in 3 V circuits (VGS(th) < 1.5 V).
Gate-Source Zener for ESD ruggedness
(>6kV Human Body Model).
SC70-6
SuperSOTTM-6
SOT-23
G2
SO-8
SOT-8
S2
SOIC-14
6
1
Q1
D1
5
2
pin 1
SC70-6
S1
G1
D2
Q2
3
4
Mark: .22
Absolute Maximum Ratings
Symbol
Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current
TA = 25oC unless other wise noted
N-Channel
P-Channel
Units
25
-25
V
8
-8
V
- Continuous
0.22
-0.41
A
- Pulsed
0.65
-1.2
PD
Maximum Power Dissipation
TJ,TSTG
Operating and Storage Temperature Range
ESD
Electrostatic Discharge Rating MIL-STD-883D
Human Body Model (100pf / 1500 Ohm)
(Note 1)
0.3
W
-55 to 150
°C
6
kV
415
°C/W
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
© 2008 Fairchild Semiconductor Corporation
(Note1)
FDG6322C Rev.F1
DMOS Electrical Characteristics (TA = 25 OC unless otherwise noted )
Symbol
Parameter
Conditions
Type
Min
N-Ch
25
-25
Typ
Max
Units
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
VGS = 0 V, ID = -250 µA
P-Ch
∆BVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
ID = 250 µA, Referenced to 25 oC
N-Ch
25
ID = -250 µA, Referenced to 25 oC
P-Ch
-22
N-Ch
IDSS
Zero Gate Voltage Drain Current
VDS = 20 V, VGS= 0 V,
IDSS
Zero Gate Voltage Drain Current
VDS =-20 V, VGS = 0 V,
IGSS
Gate - Body Leakage Current
V
mV/oC
1
TJ = 55°C
µA
10
P-Ch
-1
VGS = 8 V, VDS = 0 V
N-Ch
100
nA
VGS = -8 V, VDS = 0 V
P-Ch
-100
nA
N-Ch
0.65
0.85
1.5
V
-0.65
-0.82
-1.5
TJ = 55°C
µA
-10
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
VDS = VGS, ID = -250 µA
P-Ch
∆VGS(th)/∆TJ
Gate Threshold Voltage Temp. Coefficient
ID = 250 µA, Referenced to 25 o C
N-Ch
-2.1
ID= -250 µA, Referenced to 25 o C
P-Ch
2.1
VGS = 4.5 V, ID = 0.22 A
N-Ch
2.6
4
5.3
7
RDS(ON)
Static Drain-Source On-Resistance
TJ =125°C
VGS = 2.7 V, ID = 0.19 A
VGS = -4.5 V, ID = -0.41 A
P-Ch
TJ =125°C
VGS = -2.7 V, ID = -0.25 A
ID(ON)
On-State Drain Current
VGS = 4.5 V, VDS = 5 V
gFS
Forward Transconductance
mV/ oC
3.7
5
0.85
1.1
1.2
1.9
1.15
1.5
N-Ch
0.22
VGS = -4.5 V, VDS = -5 V
P-Ch
-0.41
VDS = 5 V, ID= 0.22 A
N-Ch
0.2
VDS = -5 V, ID = -0.5 A
P-Ch
0.9
N-Channel
N-Ch
9.5
VDS = 10 V, VGS = 0 V,
P-Ch
62
f = 1.0 MHz
N-Ch
6
Ω
A
S
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
P-Channel
P-Ch
34
VDS = -10 V, VGS = 0 V,
N-Ch
1.3
f = 1.0 MHz
P-Ch
10
pF
FDG6322C Rev.F1
Electrical Characteristics (continued)
SWITCHING CHARACTERISTICS (Note 2)
Symbol
Parameter
Conditions
Type
tD(on)
Turn - On Delay Time
N-Channel
VDD = 5 V, ID = 0.5 A,
VGS = 4.5 V, RGEN = 50 Ω
tr
tD(off)
tf
Qg
Qgs
Qgd
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Min
Typ
Max
Units
N-Ch
5
10
nS
P-Ch
7
15
N-Ch
4.5
10
P-Ch
8
16
P-Channel
N-Ch
4
8
VDD = -5 V, ID = -0.5 A,
P-Ch
55
80
VGS = -4.5 V, RGEN = 50 Ω
N-Ch
3.2
7
P-Ch
35
60
N-Channel
N-Ch
0.29
0.4
VDS= 5 V, ID = 0.22 A,
P-Ch
1.1
1.5
VGS = 4.5 V
N-Ch
0.12
P- Channel
P-Ch
0.31
VDS = -5 V, ID = -0.41 A,
N-Ch
0.03
VGS = -4.5 V
P-Ch
0.29
nS
nS
nS
nC
nC
nC
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
VSD
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = 0.5 A
VGS = 0 V, IS = -0.5 A
(Note 2)
(Note 2)
N-Ch
0.25
P-Ch
-0.25
N-Ch
0.8
1.2
P-Ch
-0.85
-1.2
A
V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed
by design while RθCA is determined by the user's board design. RθJA = 415OC/W on minimum mounting pad on FR-4 board in still air.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
FDG6322C Rev.F1
Typical Electrical Characteristics: N-Channel
5
VGS =4.5V
3.5V
R DS(ON), NORMALIZED
0.4
3.0V
2.7V
0.3
2.5V
0.2
2.0V
0.1
0
DRAIN-SOURCE ON-RESISTANCE
I D , DRAIN-SOURCE CURRENT (A)
0.5
4.5
1
2
3
4
2.7V
3.0V
3.5
3.5V
3
4.0V
5
0
0.1
Figure 1. On-Region Characteristics.
0.3
0.4
20
I D = 0.22A
1.6
RDS(ON), ON-RESISTANCE(OHM)
RDS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
0.2
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.8
V GS = 4.5V
1.4
1.2
1
0.8
0.6
-50
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
125
ID = 0.10A
16
12
8
TA =125°C
4
25°C
0
150
1
2
J
3
4
5
VGS ,GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
TJ = -55°C
VDS = 5V
I S , REVERSE DRAIN CURRENT (A)
0.4
0.2
I D , DRAIN CURRENT (A)
5.0V
I D , DRAIN CURRENT (A)
VDS , DRAIN-SOURCE VOLTAGE (V)
25°C
125°C
0.15
0.1
0.05
0
0.5
4.5V
2.5
2
0
VGS = 2.5V
4
VGS = 0V
0.1
TJ = 125°C
0.01
25°C
0.0001
1
1.5
2
2.5
VGS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
3
-55°C
0.001
0
0.2
0.4
0.6
0.8
1
1.2
VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDG6322C.Rev F1
Typical Electrical Characteristics: N-Channel (continued)
30
VDS = 5V
I D = 0.22A
10V
5
CAPACITANCE (pF)
V GS , GATE-SOURCE VOLTAGE (V)
6
4
3
2
15
Ciss
8
Coss
5
Crss
f = 1 MHz
VGS = 0 V
3
1
2
0.1
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.3
10
25
50
0.3
RD
S(
O
L
N)
IM
10m
s
IT
1s
0.1
10
V GS = 4.5V
SINGLE PULSE
RθJA = 415 °C/W
T A = 25°C
0.8
2
SINGLE PULSE
R θJA=415°C/W
TA= 25°C
40
100
ms
POWER (W)
I D , DRAIN CURRENT (A)
1
0.01
0.4
3
Figure 8. Capacitance Characteristics.
Figure 7. Gate Charge Characteristics.
0.03
1
V DS , DRAIN TO SOURCE VOLTAGE (V)
Q g , GATE CHARGE (nC)
s
30
20
DC
10
5
10
25
VDS , DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
40
0
0.0001
0.001
0.01
0.1
1
10
200
SINGLE PULSE TIME (SEC)
Figure 10. Single Pulse Maximum Power
Dissipation.
FDG6322C Rev.F1
Typical Electrical Characteristics: P-Channel
2.5
VGS =-4.5V -3.0V
-2.7V
R DS(ON) , NORMALIZED
-2.5V
0.9
0.6
-2.0V
0.3
-1.5V
DRAIN-SOURCE ON-RESISTANCE
-ID , DRAIN-SOURCE CURRENT (A)
1.2
VGS = -2.0V
2
-2.5V
1.5
-2.7V
-3.0V
-3.5V
-4.5V
1
0.5
0
0
1
2
3
0
4
0.2
0.4
R DS(ON),ON-RESISTANCE(OHM)
R DS(ON) , NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1
1.2
5
1.6
I D = -0.41A
V GS = -4.5V
1.4
1.2
1
0.8
0.6
-50
I D = -0.2A
4
3
2
TJ = 125 ° C
1
25° C
0
-25
0
25
50
75
100
125
150
1
2
TJ , JUNCTION TEMPERATURE (°C)
3
4
5
-VGS , GATE TO SOURCE VOLTAGE (V)
Figure 13. On-Resistance Variation
with Temperature.
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
1
-I S , REVERSE DRAIN CURRENT (A)
1
TJ = -55°C
VDS = -5V
25°C
-ID , DRAIN CURRENT (A)
0.8
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
Figure 11. On-Region Characteristics.
0.8
125°C
0.6
0.4
0.2
0
0.5
0.6
-I D , DRAIN CURRENT (A)
-VDS , DRAIN-SOURCE VOLTAGE (V)
1
1.5
2
2.5
-VGS , GATE TO SOURCE VOLTAGE (V)
Figure 15. Transfer Characteristics.
3
VGS = 0V
TJ = 125°C
0.1
25°C
0.01
-55°C
0.001
0.0001
0.2
0.4
0.6
0.8
1
1.2
-VSD , BODY DIODE FORWARD VOLTAGE (V)
Figure 16. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
FDG6322C Rev.F1
Typical Electrical Characteristics: P-Channel (continued)
200
-V GS , GATE-SOURCE VOLTAGE (V)
5
I D = -0.41A
VDS = -5V
-10V
4
80
CAPACITANCE (pF)
1
-15V
3
2
Ciss
30
Coss
10
5
3
0.1
0
0
0.4
0.8
1.2
1.6
0.3
Figure 17. Gate Charge Characteristics.
5
10
25
50
1
0.5
S
RD
(O
N)
LI
1m
s
10
ms
T
MI
10
0m
s
1s
10
s
DC
0.1
VGS = -4.5V
SINGLE PULSE
RθJA = 415°C
A A = 25°C
T
0.2
0.5
SINGLE PULSE
R θJA=415°C/W
TA= 25°C
40
POWER (W)
-I D , DRAIN CURRENT (A)
2
Figure 18. Capacitance Characteristics.
3
0.01
0.1
1
-VDS , DRAIN TO SOURCE VOLTAGE (V)
Q g , GATE CHARGE (nC)
0.05
Crss
f = 1 MHz
V GS = 0 V
1
30
20
10
1
2
5
10
25
- V DS , DRAIN-SOURCE VOLTAGE (V)
Figure 19. Maximum Safe Operating Area.
40
0
0.0001
0.001
0.01
0.1
1
10
200
SINGLE PULSE TIME (SEC)
Figure 20. Single Pulse Maximum Power
Dissipation.
FDG6322C Rev.F1
Typical Thermal Characteristics: N & P-Channel (continued)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
0.5
D = 0.5
0.2
0.2
0.1
0.05
0.02
0.01
R θJA (t) = r(t) * R θJA
R θJA =415 °C/W
0.1
P(pk)
0.05
t1
0.02
0.01
t2
TJ - TA = P * R θJA (t)
Single Pulse
Duty Cycle, D = t 1/ t 2
0.005
0.002
0.0001
0.001
0.01
0.1
1
10
100
200
t 1, TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in note 1.
Transient thermalresponse will change depending on the circuit board design.
FDG6322C Rev.F1
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body or
(b) support or sustain life, and (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in a significant injury of the user.
2. A critical component in any component of a life support,
device, or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
This datasheet contains the design specifications for product development.
Specifications may change in any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data; supplementary data will be published
at a later date. Fairchild Semiconductor reserves the right to make changes at
any time without notice to improve design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild Semiconductor reserves
the right to make changes at any time without notice to improve the design.
Obsolete
Not In Production
This datasheet contains specifications on a product that is discontinued by
Fairchild Semiconductor. The datasheet is for reference information only.
Rev. I34
© 2008 Fairchild Semiconductor Corporation
www.fairchildsemi.com