March 1998 FDT459N N-Channel Enhancement Mode Field Effect Transistor General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance, provide superior switching performance. These products are well suited to low voltage, low current applications such as notebook computer power management, battery powered circuits, and DC motor control. SuperSOTTM-3 SuperSOTTM-8 SuperSOTTM-6 6.5 A, 30 V. RDS(ON) = 0.035Ω @ VGS = 10 V RDS(ON) = 0.055 Ω @ VGS = 4.5 V. High density cell design for extremely low RDS(ON). High power and current handling capability in a widely used surface mount package. SO-8 SOT-223 SOIC-16 D G Absolute Maximum Ratings D D Symbol Parameter Drain-Source Voltage VGSS Gate-Source Voltage - Continuous ID Maximum Drain Current - Continuous (Note 1a) - Pulsed Maximum Power Dissipation FDT459N Units 30 V ±20 V 6.5 A 20 (Note 1a) (Note 1b) (Note 1c) TJ,TSTG S TA = 25oC unless otherwise noted VDSS PD G S Operating and Storage Temperature Range 3 W 1.3 1.1 -55 to 150 °C THERMAL CHARACTERISTICS RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 42 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 12 °C/W * Order option J23Z for cropped center drain lead. © 1998 Fairchild Semiconductor Corporation FDT459NRev.C Electrical Characteristics (TA = 25 OC unless otherwise noted ) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 30 V ∆BVDSS/∆TJ Breakdown Voltage Temp. Coefficient ID = 250 µA, Referenced to 25 C IDSS Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V IGSSF Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V IGSSR Gate - Body Leakage, Reverse VGS = -20 V, VDS = 0 V -100 nA o 33 TJ =55°C ON CHARACTERISTICS o mV/ C 1 µA 10 µA 100 nA (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA ∆VGS(th)/∆TJ Gate Threshold Voltage Temp.Coefficient ID = 250 µA, Referenced to 25 oC 1 RDS(ON) Static Drain-Source On-Resistance VGS = 10 V, ID = 6.5 A TJ =125°C VGS = 4.5 V, ID = 5.5 A ID(ON) On-State Drain Current VGS = 10 V, VDS = 5 V gFS Forward Transconductance VDS = 10 V, ID = 6.5 A 1.6 2 V mV/ oC -4.2 0.031 0.035 0.044 0.06 0.046 0.055 20 Ω A 16 S DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 15 V, VGS = 0 V, f = 1.0 MHz 365 pF 210 pF 70 pF SWITCHING CHARACTERISTICS (Note 2) tD(on) Turn - On Delay Time tr Turn - On Rise Time 5.2 11 ns 8.2 16 ns tD(off) tf Turn - Off Delay Time 6 12 ns Turn - Off Fall Time 16 26 ns Qg Total Gate Charge 12 17 nC Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω VDS = 10 V, ID = 6.5 A, VGS = 10 V 2.2 nC 3 nC DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS Maximum Continuous Drain-Source Diode Forward Current VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = 2.5 A 0.8 (Note 2) 2.5 A 1.2 V Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. Typical RθJA using the board layouts shown below on FR-4 PCB in a still air environment: a. 42o C/W when mounted on a 1 in2 pad of b. 95oC/W when mounted on a 2oz Cu. pad of 2oz Cu. 0.066 in2 c. 110oC/W when mounted on a 0.00123 in2 pad of 2oz Cu. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDT459NRev.C Typical Electrical Characteristics 3.5 VGS = 10V 6.0 5.0 25 R DS(ON), NORMALIZED 4.5 20 4.0 15 10 3.5 5 3.0 0 0 1 2 3 4 DRAIN-SOURCE ON-RESISTANCE I D , DRAIN-SOURCE CURRENT (A) 30 3 2.5 4.0 2 4.5 5.0 1.5 6.0 10 1 0.5 5 VGS = 3.5V 0 5 10 VDS , DRAIN-SOURCE VOLTAGE (V) R DS(ON) , ON-RESISTANCE (OHM) R DS(ON) NORMALIZED DRAIN-SOURCE ON-RESISTANCE I D = 6.5A V GS = 10V 1.4 1.2 1 0.8 0.6 -50 I D= 6.5A 0.1 0.08 0.04 25°C 0.02 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (°C) 125 TJ = 125°C 0.06 150 2 4 6 8 10 VGS , GATE TO SOURCE VOLTAGE (V) Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 20 VDS = 10V I S , REVERSE DRAIN CURRENT (A) I D , DRAIN CURRENT (A) 30 0.12 Figure 3. On-Resistance Variation with Temperature. TJ = -55°C 25°C 20 125°C 15 10 5 1 25 0.14 1.6 0 20 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. Figure 1. On-Region Characteristics. 25 15 I D , DRAIN CURRENT (A) 2 3 4 5 VGS , GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 6 VGS = 0V TJ = 125°C 1 25°C 0.1 -55°C 0.01 0.001 0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDT459NRev.C Typical Electrical Characteristics 1000 VDS= 5V I D = 6.5A 10V 8 15V CAPACITANCE (pF) V GS , GATE-SOURCE VOLTAGE (V) 10 6 4 400 Ciss 200 Coss 100 2 30 0.1 0 0 2 4 6 8 10 12 14 0.3 Figure 7. Gate Charge Characteristics. 5 100 1m s 10m s 100 ms 1s 10s DC 2 1 0.5 0.1 0.05 0.01 0.1 0.5 30 SINGLE PULSE R θJA= see note 1c TA = 25°C 160 VGS =10V SINGLE PULSE RθJA = See Note 1c TAA = 25°C 0.2 10 200 us 120 80 40 1 2 5 10 20 30 0 0.001 50 0.01 0.1 1 10 100 300 SINGLE PULSE TIME (SEC) V DS , DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE I D , DRAIN CURRENT (A) 10 3 Figure 8. Capacitance Characteristics. POWER (W) 40 T IMI )L (ON S RD 1 VDS , DRAIN TO SOURCE VOLTAGE (V) Q g , GATE CHARGE (nC) 20 Crss f = 1 MHz VGS = 0 V 50 Figure 10. Single Pulse Maximum Power Dissipation. 1 0.5 D = 0.5 0.2 0.2 0.1 0.05 0.02 0.01 0.005 RθJA (t) = r(t) * RθJA R JA = See Note 1c 0.1 θ 0.05 0.02 P(pk) 0.01 t1 Single Pulse 0.002 0.001 0.0001 t2 TJ - TA = P * R θJA (t) Duty Cycle, D = t 1 / t 2 0.001 0.01 0.1 1 10 100 300 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Note: Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. FDT459NRev.C TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™ UltraFET VCX™ STAR*POWER is used under license DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4