BSS84 P-Channel Enhancement Mode Field Effect Transistor General Description Features These P-Channel enhancement mode field effect transistors are produced using Fairchild’s proprietary, high cell density, DMOS technology. This very high density process has been designed to minimize onstate resistance, provide rugged and reliable performance and fast switching. They can be used, with a minimum of effort, in most applications requiring up to 0.13A DC and can deliver current up to 0.52A. This product is particularly suited to low voltage applications requiring a low current high side switch. • −0.13A, −50V. RDS(ON) = 10Ω @ VGS = −5 V • Voltage controlled p-channel small signal switch • High density cell design for low RDS(ON) • High saturation current D D S G SOT-23 S G Absolute Maximum Ratings Symbol TA=25oC unless otherwise noted Parameter Ratings Units VDSS Drain-Source Voltage −50 V VGSS Gate-Source Voltage ±20 V ID Drain Current −0.13 A – Continuous (Note 1) −0.52 – Pulsed Maximum Power Dissipation PD (Note 1) Derate Above 25°C TJ, TSTG Operating and Storage Junction Temperature Range Maximum Lead Temperature for Soldering Purposes, 1/16” from Case for 10 Seconds TL 0.36 2.9 W mW/°C −55 to +150 °C 300 Thermal Characteristics Thermal Resistance, Junction-to-Ambient RθJA (Note 1) 350 °C/W Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity SP BSS84 7’’ 8mm 3000 units 2002 Fairchild Semiconductor Corporation BSS84 Rev B(W) BSS84 July 2002 Symbol Parameter TA = 25°C unless otherwise noted Test Conditions Min Typ Max Units Off Characteristics BVDSS ∆BVDSS ∆TJ IDSS IGSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage. On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) ID = –250 µA VGS = 0 V, ID = –250 µA,Referenced to 25°C VDS = –50 V, –50 V mV/°C –48 VGS = 0 V –15 µA VDS = –50 V,VGS = 0 V TJ = 125°C –60 µA VGS = ±20 V, VDS = 0 V ±10 nA VDS = VGS, ID = –1 mA (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance –0.8 ID = –1 mA,Referenced to 25°C ID(on) On–State Drain Current VGS = –5 V, ID = –0.10 A VGS = –5 V,ID = –0.10 A,TJ=125°C VGS = –5 V, VDS = – 10 V gFS Forward Transconductance VDS = –25V, ID = – 0.10 A VDS = –25 V, f = 1.0 MHz V GS = 0 V, –0.6 0.05 –1.7 3 –2 1.2 1.9 10 17 V mV/°C Ω A 0.6 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance RG Gate Resistance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time td(off) Turn–Off Delay Time tf Turn–Off Fall Time Qg Total Gate Charge Qgs Gate–Source Charge Qgd Gate–Drain Charge VGS = –15 mV, f = 1.0 MHz 73 pF 10 pF 5 pF 9 Ω (Note 2) VDD = –30 V, VGS = –10 V, VDS = –25 V, VGS = –5 V ID = – 0.27A, RGEN = 6 Ω ID = –0.10 A, 2.5 5 ns 6.3 13 ns 10 20 ns 4.8 9.6 ns 0.9 1.3 nC 0.2 nC 0.3 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD trr Drain–Source Diode Forward Voltage Diode Reverse Recovery Time Qrr Diode Reverse Recovery Charge VGS = 0 V, IS = –0.26 A(Note 2) IF = –0.10A diF/dt = 100 A/µs (Note 2) –0.8 –0.13 A –1.2 V 10 nS 3 nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 350°C/W when mounted on a minimum pad.. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2.0% BSS84 Rev B(W) BSS84 Electrical Characteristics BSS84 Typical Characteristics 1 2 -4.5V -3.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -ID, DRAIN CURRENT (A) VGS = -5V 0.8 0.6 -3.0V 0.4 -2.5V 0.2 0 1.8 VGS=-3.0V 1.6 1.4 -3.5V 1.2 -4.0V -5.0V 0.8 0 1 2 3 4 5 0 0.2 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0.4 0.6 0.8 1 -ID, DRAIN CURRENT (A) Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 5 ID = -0.10A VGS = -5V 1.6 ID = -0.05A RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -4.5V 1 1.4 1.2 1 0.8 0.6 0.4 -50 -25 0 25 50 75 100 125 4 3 TA = 125oC 2 TA = 25oC 1 150 2 2.5 3 3.5 4 4.5 5 o TJ, JUNCTION TEMPERATURE ( C) -VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. On-Resistance Variation with Temperature. Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 1 -ID, DRAIN CURRENT (A) VDS = -5V -IS, REVERSE DRAIN CURRENT (A) 1 25oC TA = -55oC 0.8 125oC 0.6 0.4 0.2 VGS = 0V 0.1 TA = 125oC 25oC 0.01 -55oC 0.001 0.0001 0 1 1.5 2 2.5 3 3.5 -VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 4 0.0 0.2 0.4 0.6 0.8 1.0 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. BSS84 Rev B(W) BSS84 Typical Characteristics 100 VDS = -8V ID = -0.10A f = 1 MHz VGS = 0 V -25V 4 80 -30V CAPACITANCE (pF) -VGS, GATE-SOURCE VOLTAGE (V) 5 3 2 CISS 60 40 1 20 0 0 COSS CRSS 0 0.2 0.4 0.6 0.8 1 0 10 Qg, GATE CHARGE (nC) Figure 7. Gate Charge Characteristics. 40 50 5 P(pk), PEAK TRANSIENT POWER (W) 100us RDS(ON) LIMIT 1ms 10ms 100ms 10s 0.1 1s DC VGS = -5V SINGLE PULSE RθJA = 350oC/W 0.01 TA = 25oC 0.001 1 10 100 SINGLE PULSE RθJA = 350°C/W TA = 25°C 4 3 2 1 0 0.01 0.1 1 -VDS, DRAIN-SOURCE VOLTAGE (V) 10 100 t1, TIME (sec) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 30 Figure 8. Capacitance Characteristics. 1 -ID, DRAIN CURRENT (A) 20 -VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 RθJA(t) = r(t) * RθJA RθJA = 350oC/W 0.2 0.1 0.1 P(pk) 0.05 0.02 0.01 t1 t2 0.01 TJ - TA = P * RθJA(t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 1 10 100 1000 t1, TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1a. Transient thermal response will change depending on the circuit board design. BSS84 Rev B(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless CoolFET CROSSVOLT DOME EcoSPARK E2CMOSTM EnSignaTM FACT FACT Quiet Series FASTâ FASTr FRFET GlobalOptoisolator GTO HiSeC I2C Across the board. Around the world. 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Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I