ACST2 Series AC Switch family Alternating current switch Main features Symbol OUT Value Unit G COM IT(RMS) 2 A VDRM/VRRM 800 V IGT 10 mA ■ Overvoltage crowbar technology ■ High noise immunity: static dV/dt > 500 V/µs The ACST2-8SFP in the TO-220FPAB package provides insulation voltage rated at 1500VRMS Main application ■ AC ON/OFF static switching in appliances & industrial control systems ■ Drive of low power highly resistive or inductive loads like: – solenoid, – pump, fan, micro-motor G OUT COM TO-220FPAB ACST2-8SFP DPAK ACST2-8SB Benefits ■ Enables equipment to meet IEC 61000-4-5 ■ High off-state reliability with planar technology ■ Needs no external overvoltage protection ■ Reduces component count ■ Interfaces directly with the micro-controller ■ High immunity against fast transients described in IEC 61000-4-4 standards Order code Description Part number Marking The ACST2 series belongs to the AC power switch family built around the ASD technology. This high performance device is adapted to home appliances or industrial systems and drives loads up to 2 A. ACST2-8SFP ACST28S ACST2-8SB ACST28S Functional diagram This ACST2 switch embeds a Triac structure with a high voltage clamping device to absorb the inductive turn-off energy and withstand line transients such as those described in the IEC 61000-4-5 standards. The component needs a low gate current to be activated (IGT < 10 mA) and in the mean time provides a high electrical noise immunity such as those described in the IEC 61000-4-4 standards. March 2007 OUT G COM Rev 1 1/11 www.st.com 11 Characteristics ACST2 Series 1 Characteristics Table 1. Absolute maximum ratings (limiting values) Symbol Parameter Value TO-220FPAB IT(RMS) ITSM ² It dI/dt RMS on-state current (full sine wave) Non repetitive surge peak on-state current (full cycle sine wave, TJ initial = 25° C) ² Tc = 105° C A 2 DPAK Tc = 110 °C F = 60 Hz t = 16.7 ms 8.4 F = 50 Hz t = 20 ms 8.0 I t Value for fusing tp = 10 ms Critical rate of rise of on-state current IG = 2 x IGT, tr = 100 ns F = 120 Hz Unit A 0.5 A ²s Tj = 125° C 50 A/µs VPP (1) Non repetitive line peak mains voltage (1) Tj = 25° C 2 kV PG(AV) Average gate power dissipation Tj = 125° C 0.1 W PGM Peak gate power dissipation (tp = 20 µs) Tj = 125° C 10 W IGM Peak gate current (tp = 20 µs) Tj = 125° C 1.6 A Tstg Tj Storage junction temperature range Operating junction temperature range -40 to +150 -40 to +125 °C 260 °C Tl Maximum lead soldering temperature during 10 s (at 3 mm from plastic case) 1. according to test described by IEC 61000-4-5 standard and Figure 16 Table 2. Electrical characteristics (Tj = 25° C, unless otherwise specified) Symbol Test conditions Value Unit IGT(1) VOUT = 12 V RL = 33 Ω I - II - III MAX 10 mA VGT VOUT = 12 V RL = 33 Ω I - II - III MAX 1.1 V VGD VOUT = VDRM RL = 3.3 kΩ Tj = 125° C I - II - III MIN 0.2 V IH (2) IOUT = 100 mA MAX 10 mA I - III MAX 25 II MAX 35 VOUT = 67% VDRM gate open Tj = 125° C MIN 500 V/µs (dV/dt)c = 15 V/µs Tj = 125° C MIN 0.5 A/ms ICL = 0.1 mA tp = 1 ms Tj = 25° C MIN 850 V IL dV/dt (2) (dI/dt)c (2) VCL IG = 1.2 x IGT 1. minimum IGT is guaranteed at 5% of IGT max 2. for both polarity of OUT pin referenced to COM pin 2/11 Quadrant mA ACST2 Series Table 3. Characteristics Static electrical characteristics Symbol VTM(1) (1) Test conditions Value Unit ITM = 2.8 A tp = 500 µs Tj = 25° C MAX 2 V Threshold voltage Tj = 125° C MAX 0.9 V RD(1) Dynamic resistance Tj = 125° C MAX 250 mΩ IDRM IRRM 10 µA VOUT = VDRM / VRRM 0.5 mA VTO Tj = 25° C MAX Tj = 125° C 1. for both polarity of OUT pin referenced to COM pin Table 4. Thermal resistances Symbol Parameter Value DPAK Rth(j-c) Unit 4.5 Junction to case (AC) TO-220FPAB 7 TO-220FPAB 60 DPAK 70 ° C/W Rth(j-a) Junction to ambient SCU (1)= 0.5 cm² 1. SCU = copper surface under tab Figure 1. Maximum power dissipation versus Figure 2. RMS on-state current (full cycle) P(W) RMS on-state current versus case temperature IT(RMS)(A) 2.8 2.4 α=180 ° 2.2 2.4 DPAK 2.0 1.8 2.0 TO-220FPAB 1.6 1.4 1.6 1.2 1.2 1.0 0.8 0.8 0.6 180° 0.4 0.4 0.2 0.4 0.6 0.8 1.0 TC(°C) 0.0 0.0 0.0 α=180 ° 0.2 IT(RMS)(A) 1.2 1.4 1.6 1.8 2.0 0 25 50 75 100 125 3/11 Characteristics Figure 3. ACST2 Series RMS on-state current versus ambient temperature Figure 4. IT(RMS) (A) 1.00 1.8 Relative variation of thermal impedance versus pulse duration TO-220FPAB K=[Zth/Rth] α=180 ° Printed circuit board FR4 Natural convection SCU=0.5 cm² 1.6 1.4 Zth(j-c) 1.2 Zth(j-a) 1.0 0.10 0.8 0.6 0.4 0.2 Tamb(°C) 0.0 0 25 Figure 5. 1.0E+00 50 75 100 125 1.0E-04 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 Relative variation of gate trigger current IGT, holding current IH and latching current IL versus junction temperature (typical values) IGT, IH, IL [T J] / IGT, IH, IL [T j=25 °C] 2.8 2.6 2.4 2.2 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 Zth(j-c) Zth(j-a) 1.0E-01 DPAK tP(s) 1.0E-02 Relative variation of static dV/dt versus junction temperature 2.0 VOUT=540 V IL & IH Tj(°C) Figure 8. dV/dt [T j] / dV/dt [T j=125 °C] 100 IGT -40 -30 -20 -10 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03 Figure 7. 1.0E-03 Relative variation of thermal Figure 6. impedance versus pulse duration DPAK K=[Zth/Rth] TO-220FPAB tP(s) 0.01 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Relative variation of critical rate of decrease of main current versus reapplied dV/dt (typical values) (dI/dt)c [ (dV/dt) c ] / Specified (dI/dt) c VOUT=300 V 1.8 1.6 1.4 1.2 1.0 10 0.8 0.6 0.4 0.2 T j(°C) 25 4/11 (dV/dt)c(V/µs) 0.0 1 50 75 100 125 0.1 1.0 10.0 100.0 ACST2 Series Figure 9. Characteristics Relative variation of critical rate of decrease of main current versus junction temperature (dI/dt)c [T j] / (dI/dt)c [T j=125 °C] Figure 10. Surge peak on-state current versus number of cycles 9 20 VOUT=300 V 18 ITSM (A) 8 16 t=20ms 7 14 One cycle Non repetitive Tj initial=25 °C 6 12 5 10 4 8 Repetitive TC=110 °C 3 6 2 4 1 2 T j(°C) Number of cycles 0 0 25 50 75 100 125 1 10 100 1000 Figure 11. Non repetitive surge peak on-state Figure 12. On-state characteristics (maximum values) current for a sinusoidal pulse with width tP < 10 ms, and corresponding value of I²t ITSM(A), I²t (A²s) 100.0 ITM(A) 1.E+01 Tj initial=25 °C ITSM 10.0 Tj=125 °C 1.E+00 1.0 1.E-01 I²t 0.10 TJ max. : VTO= 0.90 V RD= 250 mW VTM(V) tP(ms) 0.1 0.01 Tj=25 °C 1.E-02 1.00 10.00 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 Figure 14. Relative variation of clamping voltage VCL versus junction temperature Figure 13. Thermal resistance junction to ambient versus copper surface under tab (printed circuit board FR4, eCU = 35 µm) (DPAK) Rth(j-a) (°C/W) VCL [T j] / VCL [T j=25 °C] 1.20 100 DPAK 90 1.15 80 1.10 70 60 1.05 50 1.00 40 30 0.95 20 0.90 10 T j(°C) SCU(cm²) 0 0 5 10 15 20 0.85 25 30 35 40 -40 -20 0 20 40 60 80 100 120 140 5/11 AC line switch basic application 2 ACST2 Series AC line switch basic application The ACST2 device has been designed to switch on and off highly inductive or resistive loads such as pump, valve, fan, or bulb lamp. Thanks to its high sensitivity (IGT max = 10 mA), the ACST2 can be driven directly by logic level circuits through a resistor as shown on the typical application diagram. Thanks to its thermal and turn-off commutation performances, the ACST2 switch can drive, without any additional snubber, an inductive load up to 2 A. Figure 15. Typical application diagram Line L AC Mains AC LOAD R ACST2 Rg Power supply 2.1 MCU Protection against overvoltage: the best choice is ACST In comparison with standard triacs, which are not robust against surge voltages, the ACST2 is over-voltage self-protected, specified by the new parameter VCL. In addition, ACST2 is a sensitive device (IGT = 10mA), but provides a high noise immunity level against fast transients. The ACST2 switch is able to sustain safely the AC line transient voltages either by clamping the low energy spikes or by breaking over under high energy shocks, even with fast turn-on current rises. The test circuit of the Figure 16 is representative of the final ACST2 application, and is also used to stress the ACST switch according to the IEC 61000-4-5 standard conditions. Thanks to the load limiting the current, the ACST switch sustains the voltage spikes up to 2 kV above the peak line voltage. The protection is based on an overvoltage crowbar technology. Actually, the ACST2 will break over safely as shown on Figure 17. The ACST is recovering its blocking voltage capability at the next zero current crossing point. Such non repetitive test can be done 10 times on each AC line voltage polarity. 6/11 ACST2 Series Ordering information scheme Figure 16. Overvoltage ruggedness test circuit Figure 17. Typical current and voltage for resistive and inductive loads waveforms across the ACST2 according to IEC 61000-4-5 during IEC 61000-4-5 standard test standards: R = 200 Ω, L = 10 µH, Vpp = 2 kV Surge generator 2kV surge Filtering unit VOUT (200 V/div) Rgene Model of the load L R IOUT (500 mA/div) AC Mains ACST2-8x Rg 2.2 Electrical noise immunity Even if the ACST2 is a sensitive device (IGT = 10 mA) and can be controlled directly though a simple resistor by a logic level circuit, it provides a high electrical noise immunity. The intrinsic immunity of the ACST2 is shown by the specified dV/dt equal to 500 V/µs @ 125° C. This immunity level is 5 to 10 times higher than the immunity provided by an equivalent standard technology triac with the same sensitivity. In other word, ACST2 is sensitive, but has an immunity reaching the one provided by non-sensitive device (IGT higher than 35 mA). 3 Ordering information scheme ACST 2 - 8 S FP -TR AC Switch series Current 2 = 2 ARMS Voltage 8 = 800 V Sensitivity S = 10 mA Package FP = TO-220FPAB B = DPAK Packing TR = Tape and reel (DPAK) Blank = Tube (TO-220FPAB, DPAK) 7/11 Package information 4 ACST2 Series Package information ● Epoxy meets UL94, V0 Table 5. TO-220FPAB dimensions Dimensions Ref. A B H Dia L6 L7 L2 L3 L5 F1 L4 F G 8/11 Inches Min. Max. Min. Max. A 4.4 4.6 0.173 0.181 B 2.5 2.7 0.098 0.106 D 2.5 2.75 0.098 0.108 E 0.45 0.70 0.018 0.027 F 0.75 1 0.030 0.039 F1 1.15 1.70 0.045 0.067 F2 1.15 1.70 0.045 0.067 G 4.95 5.20 0.195 0.205 G1 2.4 2.7 0.094 0.106 H 10 10.4 0.393 0.409 D F2 G1 Millimeters L2 E 16 Typ. 0.63 Typ. L3 28.6 30.6 1.126 1.205 L4 9.8 10.6 0.386 0.417 L5 2.9 3.6 0.114 0.142 L6 15.9 16.4 0.626 0.646 L7 9.00 9.30 0.354 0.366 Dia. 3.00 3.20 0.118 0.126 ACST2 Series Package information Table 6. DPAK dimensions Dimensions Ref. E A B2 C2 L2 Millimeters Inches Min. Max. Min. Max. A 2.20 2.40 0.086 0.094 A1 0.90 1.10 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.90 0.025 0.035 B2 5.20 5.40 0.204 0.212 C 0.45 0.60 0.017 0.023 C2 0.48 0.60 0.018 0.023 D 6.00 6.20 0.236 0.244 E 6.40 6.60 0.251 0.259 G 4.40 4.60 0.173 0.181 H 9.35 10.10 0.368 0.397 D R H L4 A1 B G R C A2 0.60 MIN. V2 L2 0.80 typ. 0.031 typ. L4 0.60 1.00 0.023 0.039 V2 0° 8° 0° 8° Figure 18. Footprint (dimensions in mm) 6.7 3 3 1.6 2.3 6.7 2.3 1.6 In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 9/11 Ordering information 5 6 10/11 ACST2 Series Ordering information Part number Marking Package Weight Base Qty Packing mode ACST2-8SFP ACST28S TO-220FPAB 2.4g 50 Tube ACST2-8SB ACST28S DPAK 0.3g 50 Tube ACST2-8SB-TR ACST28S DPAK 0.3g 2500 Tape and Reel Revision history Date Revision 01-Mar-2007 1 Changes Initial release. ACST2 Series Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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