EMIF03-SIM02M8 3 line IPAD™, EMI filter for SIM card applications Features 1 8 SIM card EMI low-pass filter ■ High efficiency in EMI filtering ■ Very low PCB space consumption: 1.7 mm x 1.5 mm ■ Very thin package: 0.6 mm max ■ High efficiency in ESD suppression on external pins (IEC 61000-4-2 level 4). ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging. ■ Lead free package ■ Easy layout and flexibility thanks to I/O topology ■ Low clamping voltage 7 GND 6 3 5 4 Micro QFN 1.7 mm x 1.5 mm (bottom view) Figure 1. Pin configuration (top view) Vcc Vcc RST in RST EXT CLK in CLK EXT Data in Data EXT Complies with following standards ■ ■ ■ IEC 61000-4-2 level 4 external pins – 15 kV (air discharge) – 8 kV (contact discharge) Figure 2. Device configuration Vcc RST in CLK in Data in ■ Computers and printers ■ Communication systems ■ MCU boards TM: IPAD is a trademark of STMicroelectronics October 2007 47 Ω CLK ext 100 Ω Data ext R3 Applications Keyboard for mobile phones RST ext R2 MIL STD 883G - Method 3015-7 Class 3A (all pins) ■ 100 Ω R1 IEC 61000-4-2 level 2 internal pins – 2 kV (air discharge) – 2 kV (contact discharge) Where EMI filtering in ESD sensitive equipment is required: 2 GND GND ■ GND Maximum line capacitance = 20 pF Description The EMIF03-SIM02M8 is a 3 line highly integrated device designed to suppress EMI/RFI noise in all systems exposed to electromagnetic interference. This filter includes ESD protection circuitry, which prevents damage to the application when subjected to ESD surges up to 15 kV on the external pins. Rev 1 1/10 www.st.com Characteristics EMIF03-SIM02M8 1 Characteristics Table 1. Absolute ratings (limiting values at Tamb = 25 °C unless otherwise specified) Symbol VPP Parameter Value Internal pins ESD discharge IEC 61000-4-2 air discharge ESD discharge IEC 61000-4-2 contact discharge External pins and VCC ESD discharge IEC 61000-4-2 air discharge ESD discharge IEC 61000-4-2 contact discharge All pins MIL STD 883G - Method 3015-7 Class 3A (human body model) Unit 2 2 kV 15 8 4 125 °C Top Operating temperature range -40 to + 85 °C Tstg Storage temperature range -55 to +150 °C Tj Table 2. Junction temperature Electrical characteristics (Tamb = 25 °C) Symbol Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage IPP Peak pulse current RI/O Series resistance between input and output Cline Input capacitance per line Symbol Test conditions VBR IR = 1 mA IRM VRM = 3 V I IF VBR VCL IPP Min. Typ. 6 Tolerance ± 20% 100 R2 Tolerance ± 20% 47 VR= 0 V, F = 1 MHz, VOSC = 30 mV 17 2/10 V IRM IR R1, R3 Cline VF VRM Max. Unit 7.9 V 0.2 µA Ω Ω 20 pF EMIF03-SIM02M8 Figure 3. Characteristics S21(db) attenuation (RST line) Figure 4. dB 0.00 dB 0.00 -5.00 -5.00 -10.00 -10.00 -15.00 -15.00 -20.00 -20.00 -25.00 -25.00 S21(db) attenuation (CLK line) -30.00 -30.00 F (Hz) F (Hz) -35.00 -35.00 300.0k Figure 5. 0.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 300.0k 3.0G S21(db) attenuation (DATA line) Figure 6. dB 0.00 1.0M 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G Analog cross talk measurements dB -10.00 -5.00 -20.00 -30.00 -10.00 -40.00 -50.00 -15.00 -60.00 -70.00 -20.00 -80.00 -90.00 -25.00 -100.00 -30.00 -110.00 F (Hz) -120.00 300.0k -35.00 300.0k 3.0M 10.0M 30.0M 100.0M 300.0M 1.0G ESD response to IEC 61000-4-2 (+15 kV air discharge) applied to external pin 3.0M ClkIn-RstExt 3.0G Figure 8. 10.0M 30.0M 100.0M 300.0M 1.0G 3.0G DataIn-Rst/Clk ESD response to IEC 61000-4-2 (-15 kV air discharge) applied to external pin 2 V/div 2 V/div 5 V/div 5 V/div Figure 7. 1.0M F (Hz) 1.0M 200 ns/div 200 ns/div 3/10 Application schematic ESD response to IEC 61000-4-2 (+2 kV air discharge) applied to internal pin Figure 10. ESD response to IEC 61000-4-2 (-2 kV air discharge) applied to internal pin 2 V/div 2 V/div 5 V/div 5 V/div Figure 9. EMIF03-SIM02M8 20 ns/div 2 20 ns/div Application schematic 3 Vcc CLK in Data in SIM CONNECTOR Vcc RST in GND SIM PROCESSOR Figure 11. Application schematic RST EXT CLK EXT Data EXT Ordering information scheme Figure 12. Ordering information scheme EMIF EMI Filter Number of lines Information xxx = application zz = version Package Mx = Micro QFN x leads 4/10 yy - xxx zz Mx EMIF03-SIM02M8 4 Package information Package information ● Epoxy meets UL94, V0 In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 3. QFN 1.7 x 1.5 package dimensions Dimensions Ref Millimeters inches MIN TYP MAX MIN TYP MAX A 0.50 0.55 0.60 0.20 0.22 0.24 A1 0.00 0.02 0.05 0.00 0.01 0.02 b 0.15 0.18 0.25 0.06 0.07 0.10 D D2 1.70 0.9 E E2 1.00 0.67 1.10 0.35 1.50 0.30 e 0.40 0.20 L 0.25 0.43 0.59 0.50 0.12 0.40 k 0.39 0.16 0.24 0.16 0.08 0.30 0.35 0.10 0.12 0.14 Figure 13. Footprint (dimensions in mm) Figure 14. Marking HA Dot: Pin 1 Identification 5/10 Package information EMIF03-SIM02M8 Figure 15. Tape and reel specification 3.5 +/- 0.03 1.70 XX XX XX 1.90 8.0 +/- 0.3 0.75 φ 1.5 +/- 0.1 4.00+/-0.1 1.75 +/- 0.1 2.0+/-0.05 4.00 User direction of unreeling Note: 6/10 Product marking may be rotated by 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. EMIF03-SIM02M8 Recommendation on PCB assembly 5 Recommendation on PCB assembly 5.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 16. Stencil opening dimensions L T b) W General Design Rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = ----- ≥ 1.5 T L×W Aspect Area = ---------------------------- ≥ 0.66 2T ( L + W ) 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for central exposed pad: Opening to footprint ratio is 50%. Example: Stencil opening L = 680 µm, W = 300 µm Footprint (see Figure 13) L = 1000 µm, W = 400 µm c) Stencil opening for leads: Opening to footprint ratio is 90%. Example: Stencil opening L = 570 µm, W = 190 µm Footprint (see Figure 13) L = 600 µm, W = 200 µm 5.2 Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed 4. Solder paste with fine particles: powder particle size is 20-45 µm. 7/10 Recommendation on PCB assembly 5.3 5.4 5.5 EMIF03-SIM02M8 Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. Reflow profile Figure 17. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) 260°C max 255°C 220°C 180°C 125 °C 2°C/s recommended 2°C/s recommended 6°C/s max 6°C/s max 3°C/s max 3°C/s max 0 0 1 2 3 4 5 10-30 sec 90 to 150 sec Note: 8/10 6 7 Time (min) 90 sec max Minimize air convection currents in the reflow oven to avoid component movement. EMIF03-SIM02M8 6 Ordering information Ordering information Table 4. 7 Ordering information Part number Marking Package Weight Base qty Delivery mode EMIF03-SIM02M8 HA Micro QFN 4 mg 3000 Tape and reel (7”) Revision history Table 5. Document revision history Date Revision 07-Oct-2007 1 Changes Initial release. 9/10 EMIF03-SIM02M8 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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