ESDA14V2-4BF3 Quad bidirectional Transil™ array for ESD protection Features ■ 4 Bidirectional Transil functions ■ ESD Protection: IEC61000-4-2 level 4 ■ Stand off voltage: 12 V Min. ■ Low leakage current < 0.5 µA ■ 50 W Peak pulse power (8/20 µs) Flip Chip (5 bumps) Benefits ■ High ESD protection level ■ High integrationSuitable for high density boards ■ Figure 1. Pin layout (bump side) 3 2 1 Suitable for high density boards A Complies with the following standards: ■ IEC 61000-4-2 – 15 kV (air discharge) – 8 kV (contact discharge) ■ MIL STD 883E- Method 3015-7: class3 – 25 kV (human body model) B C Figure 2. Configuration A1 A3 C1 C3 Applications Where transient overvoltage protection in ESD sensitive equipment is required, such as : ■ Computers ■ Printers ■ Communication systems and cellular phones ■ Video equipment B2 GND Description The ESDA14V2-4BF3 is a monolithic array designed to protect up to 4 lines in a bidirectional way against ESD transients.The device is ideal for situations where board space saving is requested. This device is particularly adapted to the protection of symmetrical signals. TM: Transil is ASD a trademark of STMicroelectronics. April 2008 Rev 3 1/8 www.st.com Characteristics 1 ESDA14V2-4BF3 Characteristics Table 1. Absolute ratings (limiting values) Symbol Parameter ± 25 ± 15 ±8 kV MIL STD 883E - Method 3015-7 IEC61000-4-2 air discharge IEC61000-4-2 contact discharge ESD discharge PPP Peak pulse power (8/20µs) 50 W Junction temperature 125 °C -55 to +150 °C 260 °C -40 to +125 °C Tstg Storage temperature range TL Lead solder temperature (10 seconds duration) Top Operating temperature range Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current C I VCL VBR VRM Order code ESDA14V2-4BF3 V Slope: 1 / Rd IPP Capacitance VBR @ IR IRM @ VRM Rd αT typ.(1) max.(2) max. 0 V bias max V V mA µA V Ω 10-4/C pF 14.2 18 1 0.5 0.1 12 3 3.2 10 15 Δ VBR = αT* (Tamb -25 °C) * VBR (25 °C) max. C min. 1. Square pulse, Ipp = 3 A, tp = 2.5 µs. 2/8 Unit VPP Tj 2. Value ESDA14V2-4BF3 Figure 3. Characteristics Clamping voltage versus peak Figure 4. pulse current (Tj initial = 25 °C) (Rectangular waveform, tp = 2.5 µs) Junction capacitance versus reverse applied voltage (typical values) C(pF) IPP(A) 10.0 16 tp =2.5 µs Tj initial =25 °C F=1 MHz VOSC=30 mV RMS Tj =25 °C 14 12 10 1.0 8 6 4 2 VCL(V) 0.1 VR(V) 0 0 Figure 5. 10 20 30 40 50 60 Relative variation of leakage current versus junction temperature (typical values) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 Figure 6. ESD response to IEC 61000-4-2 (+15 kV air discharge) Figure 8. Analog crosstalk measurements 5.0 IR [Tj ] / IR [Tj =25 °C] 100 10 T j(°C) 1 25 Figure 7. 50 75 100 ESD response to IEC 61000-4-2 (-15 kV air discharge) 125 0.00 -30.00 -60.00 -90.00 f/Hz -120.00 100.0k 1.0M 10.0M 100.0M 1.0G Xtalk 3/8 Application information Figure 9. 2 ESDA14V2-4BF3 Digital crosstalk measurements Application information Figure 10. Aplac model A1 A3 C1 C3 Ls Ls Ls Ls Rs Rs Rs Rs MODEL = D01 MODEL = D01 MODEL = D01 MODEL = D01 MODEL = D02 Rs Lgnd B2 4/8 aplacvar Ls 290pH aplacvar Lgnd 130pH aplacvar Rs 100m Model D01 BV=16 IBV=1m CJO=12p M=0.333 RS=2.9 VJ=0.6 TT=100n Model D02 BV=16 IBV=1m CJO=320p M=0.333 RS=80m VJ=0.6 TT=100n ESDA14V2-4BF3 3 Ordering information scheme Ordering information scheme Figure 11. Ordering information scheme ESDA 14V2 - 4 B Fx ESD Array Breakdown Voltage 14V2 = 14.2 Volts min. Number of line 4 = 4 lines Type B = Bidirectional Package F = Flip Chip x = 3: lead-free, pitch = 400µm, bump height = 255 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 12. Package dimensions 565 µm ± 40 605 µm ± 55 255 µm ± 40 µm ± 40 0.935 mm ± 30µm 185 µm ± 10 185 µm 0.935 mm ± 30µm 185 µm 40 0 4 5/8 Ordering information ESDA14V2-4BF3 Figure 13. Footprint Figure 14. Marking Dot xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 220 µm recommended 260 µm maximum Solder mask opening: 300 µm minimum x x z y ww Solder stencil opening: 220 µm recommended Figure 15. Flip Chip tape and reel specifications Dot identifying Pin A1 location 1.75 ± 0.1 Ø 1.5 ± 0.1 4 ± 0.1 3.5 ± 0.1 1.04 xxz yww 4 ± 0.1 User direction of unreeling All dimensions in mm Note: 1.04 xxz yww xxz yww 8 ± 0.3 0.69 ± 0.05 More information is available in the application notes: AN2348:"400 µm Flip Chip: Package description and recommendations for use" AN1751: EMI Filters: Recommendations and measurements 5 Ordering information Table 3. 6/8 Ordering information Order code Marking Package Weight Base qty Delivery mode ESDA14V2-4BF3 EF Flip Chip 1.10 mg 5000 Tape and reel 7” ESDA14V2-4BF3 6 Revision history Revision history Table 4. Document revision history Date Revision Changes 19-Sep-2005 1 Initial release. 15-Dec-2005 2 Dimension from center bump to corner bump changed in Figure 9 to indicate diagonal instead of perpendicular measurement. No values changed. ECOPACK statement added. Updated ordering information. 18-Apr-2008 3 Updated ECOPACK statement. Updated Figure 11, Figure 12 and Figure 15. Reformatted to current standards. 7/8 ESDA14V2-4BF3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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