STMICROELECTRONICS STP1N120

STP1N120
N-channel 1200V - 30Ω - 500mA - TO-220
Zener - protected SuperMESH™ Power MOSFET
PRELIMINARY DATA
General features
Type
VDSS
RDS(on)
ID
PW
STP1N120
1200V
< 38Ω
500mA
45W
■
100% avalanche tested
■
Extremely high dv/dt capability
■
ESD improved capability
■
New high voltage benchmark
■
Gate charge minimized
3
1
2
TO-220
Description
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt
capability for the most demanding applications.
Such series complements ST full range of high
voltage Power MOSFETs including revolutionary
MDmesh™ products.
Internal schematic diagram
Applications
■
Switching application
Order codes
Part number
Marking
Package
Packaging
STP1N120
P1N120
TO-220
Tube
September 2006
Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/10
www.st.com
10
Contents
STP1N120
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
Test circuit
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2/10
................................................ 6
STP1N120
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage (VGS=0)
1200
V
VGS
Gate-source voltage
± 30
V
ID
Drain current (continuous) at TC = 25°C
500
mA
ID
Drain current (continuous) at TC = 100°C
315
mA
2
A
0.36
W/°C
45
W
Tbd
V/ns
-55 to 150
°C
Value
Unit
Thermal resistance junction-case max
2.78
°C/W
Rthj-amb (1) Thermal resistance junction-amb max
62.5
°C/W
300
°C
IDM (1)
Drain current (pulsed)
Derating factor
PTOT
dv/dt (2)
Tj
Tstg
Total dissipation at TC = 25°C
Peak diode recovery voltage slope
Operating junction temperature
Storage temperature
1. Pulse width limited by safe operating area
2. ISD ≤1A, di/dt ≤200A/µs, VDD ≤960
Table 2.
Symbol
Rthj-case
Tl
Thermal data
Parameter
Maximum lead temperature for soldering
purpose
1. When mounted on 1inch² FR-4 board, 2 oz Cu
Table 3.
Avalanche characteristics
Symbol
Parameter
Max value
Unit
IAS
Avalanche current, repetitive or notrepetitive (pulse width limited by Tj max)
Tbd
A
EAS
Single pulse avalanche energy
(starting Tj=25°C, ID=IAS, VDD= 50V)
Tbd
mJ
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Electrical characteristics
2
STP1N120
Electrical characteristics
(TCASE=25°C unless otherwise specified)
Table 4.
Symbol
V(BR)DSS
Parameter
Drain-source breakdown
voltage
Test conditions
ID = 1mA, VGS= 0
Min.
Typ.
Max.
1200
Unit
V
VDS = Max rating,
VDS = Max rating,Tc=125°C
1
50
µA
µA
Gate body leakage current
(VDS = 0)
VGS = ±20V
±10
µA
VGS(th)
Gate threshold voltage
VDS= VGS, ID = 50µA
3.75
4.5
V
RDS(on)
Static drain-source on
resistance
VGS= 10V, ID= 0.25A
30
38
Ω
Typ.
Max.
Unit
IDSS
Zero gate voltage drain
current (VGS = 0)
IGSS
Table 5.
Symbol
Ciss
Coss
Crss
Qg
Qgs
Qgd
4/10
On/off states
3
Dynamic
Parameter
Input capacitance
Output capacitance
Reverse transfer
capacitance
Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
VDS =25V, f=1MHz, VGS=0
VDD=960V, ID = 500mA
VGS =10V
(see Figure 2)
Min.
130
22
3
pF
pF
pF
7
Tbd
Tbd
nC
nC
nC
STP1N120
Electrical characteristics
Table 6.
Symbol
td(on)
tr
td(off)
tf
Table 7.
Symbol
ISD
ISDM
VSD(1)
trr
Qrr
IRRM
trr
Qrr
IRRM
1.
Switching times
Parameter
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Min.
Typ.
Max.
Tbd
Tbd
Tbd
Tbd
Tbd
Unit
ns
ns
ns
ns
Source drain diode
Parameter
Test conditions
Min
Typ.
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD=1A, VGS=0
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD=1A, VDD=100V
Reverse recovery time
Reverse recovery charge
Reverse recovery current
di/dt = 50A/µs,Tj=25°C
(see Figure 6)
ISD=1A,VDD=100V
di/dt=50A/µs,Tj=150°C
(see Figure 6)
Max
Unit
500
2
mA
A
Tbd
V
Tbd
Tbd
Tbd
ns
nC
A
Tbd
Tbd
Tbd
ns
nC
A
Pulsed: pulse duration = 300µs, duty cycle 1.5%
Table 8.
Symbol
Gate-source zener diode
Parameter
Test conditions
BVGSO (1) Gate-source breakdown voltage Igs ± 1mA, (open drain)
Min
30
Typ.
Max
Unit
V
1. The built-in-back zener diodes have specifically been designed to enhance not only the device’s ESD
capability, but also to make them safely absorb possibile voltage transients that may occasionally be
applied from gate to source. In this respect the zener voltage is appropriate to achieve an efficient and osteffective intervention to protect the device’s integrity. These integrated zener diodes thus avoid the usage
of external components.
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Test circuit
STP1N120
3
Test circuit
Figure 1.
Switching times test circuit for
resistive load
Figure 3.
Test circuit for inductive load
Figure 4.
switching and diode recovery times
Unclamped inductive load test
circuit
Figure 5.
Unclamped inductive waveform
Switching time waveform
6/10
Figure 2.
Figure 6.
Gate charge test circuit
STP1N120
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect . The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
7/10
Package mechanical data
STP1N120
TO-220 MECHANICAL DATA
DIM.
mm.
MIN.
inch
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
b
0.61
0.88
0.024
0.034
b1
1.15
1.70
0.045
0.066
c
0.49
0.70
0.019
0.027
D
15.25
15.75
0.60
0.620
E
10
10.40
0.393
0.409
e
2.40
2.70
0.094
0.106
e1
4.95
5.15
0.194
0.202
F
1.23
1.32
0.048
0.052
H1
6.20
6.60
0.244
0.256
J1
2.40
2.72
0.094
0.107
0.551
L
13
14
0.511
L1
3.50
3.93
0.137
L20
16.40
L30
8/10
TYP
0.154
0.645
28.90
1.137
øP
3.75
3.85
0.147
0.151
Q
2.65
2.95
0.104
0.116
STP1N120
5
Revision history
Revision history
Table 9.
Revision history
Date
Revision
14-Sep-2006
1
Changes
First release
9/10
STP1N120
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