STW12NK90Z N-channel 900V - 0.72Ω - 11A - TO-247 Zener-protected SuperMESH™ Power MOSFET General features Type VDSS RDS(on) ID pW STW12NK90Z 900V <0.88Ω 11A 230W ■ Extremely high dv/dt capability ■ 100% avalanche tested ■ Gate charge minimized ■ Very low intrinsic capacitances ■ Very good manufacturing repeatibility TO-247 Description The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products. Internal schematic diagram Applications ■ Switching application Order codes Part number Marking Package Packaging STW12NK90Z W12NK90Z TO-247 Tube October 2006 Rev 5 1/14 www.st.com 14 Contents STW12NK90Z Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 2 Protection features of gate-to-source zener diodes . . . . . . . . . . . . . . . . . . 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2.1 Electrical characteristics (curves) ............................. 7 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/14 ................................................ 9 STW12NK90Z 1 Electrical ratings Electrical ratings Table 1. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage (VGS = 0) 900 V VGS Gate- source voltage ± 30 V ID Drain current (continuous) at TC = 25°C 11 A ID Drain current (continuous) at TC = 100°C 7 A Drain current (pulsed) 44 A Total dissipation at TC = 25°C 230 W Derating Factor 1.85 W/°C Gate source ESD(HBM-C=100pF, R=1.5KΩ) 6000 V 4.5 mJ -55 to 150 °C IDM (1) Ptot VESD(G-S) EAS (2) Tstg Tj Single pulse avalanche energy Storage temperature Max. operating junction temperature 1. Pulse width limited by safe operating area. 2. ISD ≤11A, di/dt ≤200A/µs, VDD ≤V(BR)DSS, Tj ≤TJMAX. Table 2. Thermal data Rthj-case Thermal resistance junction-case max Rthj-amb TJ Table 3. 0.54 °C/W Thermal resistance junction-ambient max 50 °C/W Maximum lead temperature for soldering purpose 300 °C Avalanche characteristics Symbol Parameter Max value Unit IAR Avalanche current, repetitive or not-repetitive (pulse width limited by Tj max) 11 A EAS Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) 500 mJ Table 4. Symbol BVGSO Gate-source zener diode Parameter Gate-source breakdown voltage Test conditions Igs=± 1mA (open drain) Min. 30 Typ. Max. Unit V 3/14 Electrical ratings 1.1 STW12NK90Z Protection features of gate-to-source zener diodes The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. 4/14 STW12NK90Z 2 Electrical characteristics Electrical characteristics (TCASE=25°C unless otherwise specified) Table 5. On/off states Symbol Parameter V(BR)DSS Drain-source breakdown voltage ID = 1mA, VGS =0 IDSS Zero gate voltage drain current (VGS = 0) VDS = max rating VDS = max rating, TC = 125°C 1 50 µA µA IGSS Gate-body leakage current (VDS = 0) VGS = ± 20V ±10 µA VGS(th) Gate threshold voltage VDS = VGS, ID = 100µA 3.75 4.5 V RDS(on) Static drain-source on resistance VGS = 10V, ID = 5.5A 0.72 0.88 Ω Typ. Max. Unit Table 6. Symbol Test conditions Min. Typ. Max. 900 3 Unit V Dynamic Parameter Test conditions Min. gfs (1) Forward transconductance VDS = 15V, ID = 5.5A 11 S Ciss Coss Crss Input capacitance Output capacitance Reverse transfer capacitance VDS = 25V, f = 1MHz, VGS = 0 3500 280 58 pF pF pF Coss eq(2) Equivalent output capacitance VGS = 0V, VDS = 0V to 800V 117 pF td(on) tr td(off) tf Turn-on delay time Rise time Turn-off delay time Fall time VDD = 450V, ID = 5A RG = 4.7Ω VGS = 10V (see Figure 13) 31 20 88 55 ns ns ns ns Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 720V, ID = 10A, VGS = 10V, RG = 4.7Ω (see Figure 14) 113 19 60 152 nC nC nC 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS. 5/14 Electrical characteristics Table 7. Symbol STW12NK90Z Source drain diode Parameter ISDM (1) Source-drain current Source-drain current (pulsed) VSD (2) Forward on voltage ISD trr Qrr IRRM trr Qrr IRRM Test conditions Typ. ISD = 11A, VGS = 0 Max. Unit 11 44 A A 1.6 V Reverse recovery time ISD = 10A, di/dt = 100A/µs, Reverse recovery charge VDD = 50V, Tj = 25°C Reverse recovery current (see Figure 15) 728 7.8 21.6 ns µC A Reverse recovery time ISD = 10A, di/dt = 100A/µs, Reverse recovery charge VDD = 50V, Tj = 150°C Reverse recovery current (see Figure 15) 964 11 23 ns µC A 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 6/14 Min. STW12NK90Z Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 7/14 Electrical characteristics STW12NK90Z Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Figure 11. Source-drain diode forward characteristics 8/14 Capacitance variations Figure 10. Normalized on resistance vs temperature Figure 12. Normalized breakdown voltage vs temperature STW12NK90Z 3 Test circuit Test circuit Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load Figure 16. Unclamped Inductive load test switching and diode recovery times circuit 9/14 Test circuit Figure 17. Unclamped inductive waveform 10/14 STW12NK90Z Figure 18. Switching time waveform STW12NK90Z 4 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 11/14 Package mechanical data STW12NK90Z TO-247 MECHANICAL DATA DIM. mm. MIN. inch MAX. MIN. TYP. MAX. A 4.85 5.15 0.19 0.20 A1 2.20 2.60 0.086 0.102 b 1.0 1.40 0.039 0.055 b1 2.0 2.40 0.079 0.094 0.134 b2 3.0 3.40 0.118 c 0.40 0.80 0.015 0.03 D 19.85 20.15 0.781 0.793 E 15.45 15.75 0.608 e 5.45 0.620 0.214 L 14.20 14.80 0.560 L1 3.70 4.30 0.14 L2 18.50 0.582 0.17 0.728 øP 3.55 3.65 0.140 0.143 øR 4.50 5.50 0.177 0.216 S 12/14 TYP 5.50 0.216 STW12NK90Z 5 Revision history Revision history Table 8. Revision history Date Revision Changes 21-Jun-2004 4 Complete version 17-Oct-2006 5 New template, no content change 13/14 STW12NK90Z Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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