STMICROELECTRONICS STQ1NE10L

STQ1NE10L
N-channel 100V - 0.3Ω - 1A - TO-92
STripFET™ Power MOSFET
General features
Type
VDSS
RDS(on)
ID
STQ1NE10L
100V
<0.4Ω
1A
■
Exceptional high dv/dt capability
■
100% avalanche tested
■
Avalanche rugged technology
■
Low threshold drive
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Description
This Power MOSFET is the latest development of
STMicroelectronics unique "Single Feature
Size™" strip-based process. The resulting
transistor shows extremely high packing density
for low on-resistance, rugged avalanche
characteristics and less critical alignment steps
therefore a remarkable manufacturing
reproducibility.
Applications
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Switching application
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TO-92
(Ammopack)
TO-92
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Internal schematic diagram
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Part number
Marking
Package
Packaging
STQ1NE10L
Q1NE10L
TO-92
Tube
STQ1NE10L-AP
Q1NE10L
TO-92
Ammopak
January 2007
Rev 5
1/13
www.st.com
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Contents
STQ1NE10L
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves)
............................ 6
3
Test circuit
................................................ 8
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
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STQ1NE10L
1
Electrical ratings
Electrical ratings
Table 1.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VDS
Drain-source voltage (VGS = 0)
100
V
VGS
Gate-source voltage
± 16
V
ID
Drain current (continuous) at TC = 25°C
1
A
ID
Drain current (continuous) at TC=100°C
0.6
A
IDG
Drain gate current (continuous)
± 50
mA
IGS
Gate source current (continuous)
± 50
mA
4
A
3
W
IDM
(1)
Drain current (pulsed)
PTOT(2) Total dissipation at TC = 25°C
Derating factor
0.025
dv/dt(3)
Peak diode recovery voltage slope
EAS(4)
Single pulse avalanche energy
Tstg
TJ
6
Storage temperature
Operating junction temperature
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1. Pulse width limited by safe operating area.
2.
Related to Rthj -l
3.
ISD ≤1A, di/dt ≤200A/µs, VDD ≤V(BR)DSS, TJ ≤TJMAX
4. Starting TJ = 25 oC, ID = 1A, VDD = 50V
Table 2.
Thermal data
(s)
Symbol
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Parameter
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RthJC
Thermal resistance junction-case max
RthJA
Thermal resistance junction-ambient max
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Maximum lead temperature for soldering
purpose
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400
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W/°C
V/ns
mJ
-55 to 150
°C
Value
Unit
40
°C/W
125
°C/W
260
°C
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Electrical characteristics
2
STQ1NE10L
Electrical characteristics
(TCASE = 25°C unless otherwise specified)
Table 3.
On/off states
Symbol
V(BR)DG
Parameter
Typ.
Max.
IDSS
Zero gate voltage
drain current (VGS = 0)
VDS = Max rating
VDS = Max rating
TC = 125°C
IGSS
Gate-body leakage
current (VDS = 0)
VGS = ±16 V
VGS(th)
Gate threshold voltage
VDS = VGS, ID = 250µA
Static drain-source ON
resistance
VGS = 10 V, ID = 0.5 A
0.30
0.40
RDS(on)
Ω
VGS = 5 V, ID = 0.5 A
0.35
0.45
Ω
Dynamic
gfs
Parameter
Forward transconductance
Ciss
Coss
Crss
Input capacitance
Output capacitance
Reverse transfer
capacitance
tr(on)
tf
Turn-on time
Rise time
td(off)
tf
Turn-off delay time
Fall time
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Qg
Qgs
Qgd
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Total gate charge
Gate-source charge
Gate-drain charge
Test conditions
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VDS = 15 V, ID = 0.5 µA
100
Unit
ID = 250µA, VGS = 0
Symbol
4/13
Min.
Clamped voltage
Table 4.
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Test conditions
V
1
µA
µA
±100
nA
2.5
V
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Min.
1
10
Typ.
)
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Max.
Unit
2
S
345
45
20
pF
pF
pF
VDD = 50 V, ID = 0.5 A,
RG = 4.7 Ω, VGS = 10 V
Figure 12
11
12
ns
ns
ns
VDD = 50 V, ID = 0.5 A
RG = 4.7Ω, VGS = 5 V
Figure 12
20
13
ns
ns
VDD = 80 V, ID = 1A,
VGS = 5V
Figure 13
7
1.5
3.5
nC
nC
nC
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VDS = 25 V, f = 1MHz, VGS = 0
STQ1NE10L
Electrical characteristics
Table 5.
Source drain diode
Symbol
Max
Unit
Source-drain current
1
A
ISDM(1)
Source-drain current (pulsed)
4
A
VSD(2)
Forward on voltage
ISD=1A, VGS=0
1.5
V
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 1A,
ISD
trr
Qrr
IRRM
Parameter
Test conditions
Min.
Typ.
52
90
3.5
di/dt = 100A/µs,
VDD=30V, TJ = 100°C
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
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Electrical characteristics
STQ1NE10L
2.1
Electrical characteristics (curves)
Figure 1.
Safe operating area
Figure 2.
Thermal impedance
Figure 3.
Output characteristics
Figure 4.
Transfer characteristics
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Figure 5.
Transconductance
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Figure 6.
Static drain-source on resistance
STQ1NE10L
Electrical characteristics
Figure 7.
Gate charge vs. gate-source voltage Figure 8.
Figure 9.
Normalized gate threshold voltage
vs. temperature
Capacitance variations
Figure 10. Normalized on resistance vs.
temperature
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Figure 11. Source-drain diode forward
characteristics
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Test circuit
3
STQ1NE10L
Test circuit
Figure 12. Switching times test circuit for
resistive load
Figure 13. Gate charge test circuit
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Figure 14. Test circuit for inductive load
Figure 15. Unclamped Inductive load test
switching and diode recovery times
circuit
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Figure 16. Unclamped inductive waveform
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STQ1NE10L
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
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Package mechanical data
STQ1NE10L
TO-92 MECHANICAL DATA
mm.
DIM.
MIN.
TYP
inch
MAX.
MIN.
4.32
4.95
0.170
0.194
b
0.36
0.51
0.014
0.020
D
4.45
4.95
0.175
0.194
E
3.30
3.94
0.130
0.155
e
2.41
2.67
0.094
0.105
e1
1.14
1.40
0.044
0.055
L
12.70
15.49
0.50
0.610
R
2.16
2.41
0.085
0.094
)
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S1
0.92
1.52
0.036
W
0.41
0.56
0.016
5°
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0.060
0.022
5°
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MAX.
A
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TYP.
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STQ1NE10L
Package mechanical data
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Revision history
5
STQ1NE10L
Revision history
Table 6.
Revision history
Date
Revision
Changes
21-Jun-2004
3
Complete version
31-Oct-2006
4
Document has been reformatted
31-Jan-2007
5
Typo mistake on Table 1.
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STQ1NE10L
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