SMP100MC Trisil™ for telecom equipment protection Features ■ Bidirectional crowbar protection ■ Voltage: range from 140 V to 400 V ■ Low VBO / VR ratio ■ Micro capacitance from 15 pF to 30 pF @ 50 V ■ Low leakage current: IR = 2 µA max ■ Holding current: IH = 150 mA min. ■ Repetitive peak pulse current: IPP = 100 A (10/1000 µs) SMB (JEDEC DO-214AA) Benefits ■ Trisils are not subject to ageing and provide a fail safe mode in short circuit for better protection. ■ Helps equipment meet main standards such as UL60950, IEC 950 / CSA C22.2 and UL1459. ■ Epoxy meets UL94, V0. ■ Package is JEDEC registered (DO-214AA). Complies with the following standards ■ GR-1089 Core ■ ITU-T-K20/K21 ■ IEC 61000-4-5 ■ TIA/EIA IS-968 ■ UL497B recognized, UL file E136224 Description The SMP100MC is a series of micro capacitance transient surge arrestors designed for the protection of high debit rate communication equipment. Its micro capacitance avoids any distortion of the signal and is compatible with digital transmission line cards (ADSL, VDSL, ISDN...). SMP100MC series has been tested and confirmed compatible with Cooper Bussmann Telecom Circuit Protector TCP 1.25 A. Applications Any sensitive equipment requiring protection against lightning strikes and power crossing: ■ Terminals (phone, fax, modem...) and central office equipment ■ ADSL2+ and low end VDSL TM: Trisil is a trademark of STMicroelectronics. February 2012 Doc ID 9699 Rev 5 1/13 www.st.com 13 Characteristics 1 SMP100MC Characteristics Table 1. 2/13 In compliance with the following standards Waveform voltage Required peak current (A) Current waveform Minimum serial resistor to meet standard (Ω) 2500 1000 2/10 µs 10/1000 µs 500 100 2/10 µs 10/1000 µs 0 0 GR-1089 Core Second level 5000 2/10 µs 500 2/10 µs 0 GR-1089 Core Intra-building 1500 2/10 µs 100 2/10 µs 0 ITU-T-K20/K21 6000 1500 10/700 µs 150 37.5 5/310 µs 0 0 ITU-T-K20 (IEC61000-4-2) 8000 15000 1/60 ns IEC61000-4-5 4000 4000 10/700 µs 1.2/50 µs 100 100 5/310 µs 8/20 µs 0 0 TIA/EIA IS-968, lightning surge type A 1500 800 10/160 µs 10/560 µs 200 100 10/160 µs 10/560 µs 0 0 TIA/EIA IS-968, lightning surge type B 1000 9/720 µs 25 5/320 µs 0 Standard Peak surge voltage (V) GR-1089 Core First level Doc ID 9699 Rev 5 ESD contact discharge ESD air discharge 0 0 SMP100MC Characteristics Table 2. Absolute ratings (Tamb = 25 °C) Symbol Parameter Value Units 10/1000 µs 8/20 µs 10/560 µs 5/310 µs 10/160 µs 1/20 µs 2/10 µs 100 300 140 150 200 300 500 A 8/20 µs 5 kA t = 0.2 s t=1s t=2s t = 15 mn 18 9 7 4 A t = 16.6 ms t = 20 ms 20 21 A²s Storage temperature range -55 to 150 °C Tj Operating junction temperature range -40 to 150 °C TL Maximum lead temperature for soldering during 10 s. 260 °C Value Unit IPP Repetitive peak pulse current IFS Fail-safe mode: maximum current(1) ITSM Non repetitive surge peak on-state current (sinusoidal) I2t Tstg I2t value for fusing 1. In fail safe mode the device acts as a short circuit. Table 3. Thermal resistances Symbol Parameter Rth(j-a) Junction to ambient (with recommended footprint) 100 °C/W Rth(j-l) Junction to leads 20 °C/W Figure 1. Electrical characteristics - definitions (Tamb = 25 °C) Symbol VRM VBO IRM IPP IBO IH VR IR C Parameter Stand-off voltage Breakover voltage Leakage current Peak pulse current Breakover current Holding current Continuous reverse voltage Leakage current at VR Capacitance Doc ID 9699 Rev 5 IPP I IBO IH IRM V VRM VR VBO 3/13 Characteristics SMP100MC Table 4. Electrical characteristics - values (Tamb = 25 °C) IRM @ VRM Types IR @ VR max. µA Dynamic Static VBO (1) VBO @ IBO(2) max. V µA C(4) C(5) max. max. max. min. typ. typ. V V V mA mA pF pF SMP100MC-140 126 140 180 175 30 60 SMP100MC-160 144 160 205 200 25 50 SMP100MC-200 180 200 255 250 20 45 230 295 285 20 40 SMP100MC-230 207 2 5 800 150 SMP100MC-270 243 270 345 335 20 40 SMP100MC-320 290 320 400 390 15 35 SMP100MC-360 325 360 460 450 15 35 SMP100MC-400 360 400 540 530 15 30 1. See Figure 16: Test circuit 1 for Dynamic IBO and VBO parameters 2. See Figure 17: Test circuit 2 for IBO and VBO parameters 3. See Figure 18: Test circuit 3 for dynamic IH parameter 4. VR = 50 V bias, VRMS=1V, F=1 MHz 5. VR = 2 V bias, VRMS=1V, F=1 MHz 4/13 IH(3) Doc ID 9699 Rev 5 SMP100MC Figure 2. Characteristics Pulse waveform %IPP Figure 3. ITSM(A) Repetitive peak pulse current 70 tr = rise time (µs) F=50Hz Tj initial = 25°C tp = pulse duration time (µs) 100 Non repetitive surge peak on-state current versus overload duration 60 50 40 50 30 20 10 0 tr Figure 4. t tp t(s) 0 1.E-02 On-state voltage versus on-state current (typical values) 1.E-01 Figure 5. IT(A) 1.E+00 1.E+01 1.E+02 1.E+03 Relative variation of holding current versus junction temperature IH[Tj] / IH[Tj=25°C] 2.2 100 2.0 Tj=25°C 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 VT(V) 0.2 Tj(°C) 0.0 10 0 Figure 6. 1 2 3 4 5 6 7 8 Relative variation of breakover voltage versus junction temperature -40 -30 -20 -10 Figure 7. 0 10 20 30 40 50 60 70 80 90 100 110 120 130 Relative variation of leakage current versus reverse voltage applied (typical values) IR[Tj] / IR[Tj=25°C] VBO[Tj] / VBO[Tj=25°C] 1.08 1.E+03 1.07 VR=243V 1.06 1.05 1.04 1.E+02 1.03 1.02 1.01 1.00 0.99 1.E+01 0.98 0.97 0.96 Tj(°C) 0.95 Tj(°C) 0.94 1.E+00 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130 25 Doc ID 9699 Rev 5 50 75 100 125 5/13 Application information Figure 8. SMP100MC Variation of thermal impedance junction to ambient versus pulse duration Figure 9. Zth(j-a)/Rth(j-a) C [VR] / C [VR=2V] 1.0 0.9 0.8 Relative variation of junction capacitance versus reverse voltage applied (typical values) 1.2 Printed circuit board - FR4, copper thickness = 35µm, recommended pad layout F =1MHz VOSC = 1VRMS Tj = 25°C 1.1 1.0 0.9 0.7 0.8 0.6 0.7 0.5 0.6 0.4 0.5 0.4 0.3 0.3 0.2 0.2 0.1 tp(s) 1.E-02 2 VR(V) 0.1 0.0 0.0 1.E-01 1.E+00 1.E+01 1.E+02 1.E+03 1 10 100 1000 Application information In wire line applications, analog or digital, both central office and subscriber sides have to be protected. This function is assumed by a combined series / parallel protection stage Figure 10. Examples of protection stages for line cards Line Ex. Analog line card Protection stage Line Protection stage Ring relay Ex. ADSL line card or terminal In such a stage, parallel function is assumed by one or several Trisil, and is used to protect against short duration surge (lightning). During this kind of surges the Trisil limits the voltage across the device to be protected at its break over value and then fires. The fuse assumes the series function, and is used to protect the module against long duration or very high current mains disturbances (50/60Hz). It acts by safe circuits opening. Lightning surge and mains disturbance surges are defined by standards like GR1089, TIA/EIA IS-968, ITU-T K20. 6/13 Doc ID 9699 Rev 5 SMP100MC Application information Figure 11. Typical circuits Fuse TCP 1.25A Tip L Tip S Fuse TCP 1.25A SMP100MC-xxx T1 SMP100MC-xxx Gnd Gnd SMP100MC-xxx T2 Fuse TCP 1.25A Ring L Typical circuit for subscriber side Ring S Typical circuit for central office side Figure 12. Test method of the board having fuse and Trisil I surge Surge Generator Line side Device to be protected Test board V Oscilloscope Current probe Voltage probe These topologies, using SMP100MC from ST and TCP1.25 A from Cooper Bussmann, have been functionally validated with a Trisil glued on the PCB. Following example was performed with SMP100MC-270 Trisil. For more information, see Application Note AN2064. Figure 13. Trisil turns on during lightning surge Test conditions: 2/10 µs + and -2.5 and 5 kV 500 A (10 pulses of each polarity), Tamb = 25 °C Test result: Fuse and Trisil OK after test in accordance with GR1089 requirements. Doc ID 9699 Rev 5 7/13 Application information SMP100MC Figure 14. Trisil action while the fuse remains operational Test conditions: 600 V 3 A 1.1 s (first level), Tamb = 25 °C Test result: Fuse and Trisil OK after test in accordance with GR1089 requirements Figure 15. High current power cross test: the fuse acts like a switch by opening the circuit Test conditions: 277 V 25 A (second level), Tamb = 25 °C Test result: Fuse safety opened and Trisil OK after test in accordance with GR1089 requirements. 8/13 Doc ID 9699 Rev 5 SMP100MC Application information Figure 16. Test circuit 1 for Dynamic IBO and VBO parameters 100 V / µs, di /dt < 10 A / µs, Ipp = 100 A 2Ω 83 Ω 45 Ω 10 µF U 66 Ω 46 µH 0.36 nF 470 Ω KeyTek 'System 2' generator with PN246I module 1 kV / µs, di /dt < 10 A / µs, Ipp = 10 A 250 Ω 26 µH 60 µF U 46 µH 47 Ω 12 Ω KeyTek 'System 2' generator with PN246I module Figure 17. Test circuit 2 for IBO and VBO parameters K ton = 20ms R1 = 140W R2 = 240W 220V 50Hz DUT Vout VBO measurement 1/4 IBO measurement TEST PROCEDURE Pulse test duration (tp = 20ms): ● for Bidirectional devices = Switch K is closed ● for Unidirectional devices = Switch K is open VOUT selection: ● Device with VBO < 200 V ➔ VOUT = 250 VRMS, R1 = 140 W ● Device with VBO ³ 200 V ➔ VOUT = 480 VRMS, R2 = 240 W Doc ID 9699 Rev 5 9/13 Ordering information scheme SMP100MC Figure 18. Test circuit 3 for dynamic IH parameter R Surge generator D.U.T VBAT = - 48 V This is a GO-NOGO test which allows to confirm the holding current (IH) level in a functional test circuit. TEST PROCEDURE 1/ Adjust the current level at the IH value by short circuiting the AK of the D.U.T. 2/ Fire the D.U.T. with a surge current ➔ IPP = 10 A, 10/1000 µs. 3/ The D.U.T. will come back off-state within 50 ms maximum. 3 Ordering information scheme Figure 19. Ordering information scheme SMP Trisil surface mount Repetitive peak pulse current 100 = 100A Capacitance MC = Micro capacitance Voltage 270 = 270V 10/13 Doc ID 9699 Rev 5 100 MC - xxx SMP100MC 4 Package information Package information ● Epoxy meets UL94, V0 ● Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 5. SMB dimensions Dimensions Ref. Millimeters Inches E1 D E A1 A2 C L b Figure 20. Footprint dimensions in mm (inches) 1.62 2.60 (0.064) (0.102) Min. Max. Min. Max. A1 1.90 2.45 0.075 0.096 A2 0.05 0.20 0.002 0.008 b 1.95 2.20 0.077 0.087 c 0.15 0.40 0.006 0.016 E 5.10 5.60 0.201 0.220 E1 4.05 4.60 0.159 0.181 D 3.30 3.95 0.130 0.156 L 0.75 1.50 0.030 0.059 Figure 21. Marking layout(1) 1.62 (0.064) Cathode bar ( unidirectional devices only ) 2.18 (0.086) 5.84 (0.23) e x x x z y ww e: ECOPACK compliance XXX: Marking Z: Manufacturing location Y: Year WW: week 1. Marking layout can vary according to assembly location. Doc ID 9699 Rev 5 11/13 Ordering information 5 Ordering information Table 6. 6 Ordering information Part Number Marking SMP100MC-140 ML14 SMP100MC-160 ML16 SMP100MC-200 ML20 SMP100MC-230 ML23 SMP100MC-270 ML27 SMP100MC-320 ML32 SMP100MC-360 ML36 SMP100MC-400 ML40 Package Weight Base qty Delivery mode SMB 98 mg 2500 Tape and reel Revision history Table 7. 12/13 SMP100MC Document revision history Date Revision Changes September-2003 0B 14-Dec-2004 1 Absolute ratings values, table 3 on page 2, updated. 11-May-2005 2 New types introduction. 20-Jun-2005 3 Telecom Circuit Protector added 05-Jan-2006 4 SMP100MC-320 / 360 / 400 in full production (“in development” mention removed) 09-Feb-2012 5 Added UL statement in Complies with the following standards. First issue. Doc ID 9699 Rev 5 SMP100MC Please Read Carefully: Information in this document is provided solely in connection with ST products. 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