STD5N52U STF5N52U, STI5N52U N-channel 525 V, 1.28 Ω, 4.4 A, DPAK, TO-220FP, I2PAK UltraFASTmesh™ Power MOSFET Features VDSS RDS(on) max ID Pw 525 V < 1.5 Ω 4.4 A 25 W Type STD5N52U STF5N52U 70 W STI5N52U ■ 100% avalanche tested ■ Outstanding dv/dt capability ■ Gate charge minimized ■ Very low intrinsic capacitances ■ Very low RDS(on) ■ Extremely low trr TAB TAB 3 70 W 1 DPAK 2 I2PAK TO-220FP Figure 1. Internal schematic diagram Applications ■ 3 12 3 1 D or TAB(2) Switching applications – High voltage inverters specific fo LCD TV – Lighting full bridge topology – Motor control G(1) Description These devices are N-channel Power MOSFETs developed using UltraFASTmesh™ technology, which combines the advantages of reduced onresistance, Zener gate protection and very high dv/dt capability with an enhanced fast body-drain recovery diode. Table 1. S(3) AM01476v1 Device summary Order code Marking Package Packaging STD5N52U 5N52U DPAK Tape and reel STF5N52U 5N52U TO-220FP Tube STI5N52U 5N52U I2PAK Tube September 2011 Doc ID 15684 Rev 2 1/18 www.st.com 18 Contents STD5N52U, STF5N52U, STI5N52U Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ........................... 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 2/18 .............................................. 9 Doc ID 15684 Rev 2 STD5N52U, STF5N52U, STI5N52U 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Value Symbol Parameter DPAK VGS TO-220FP I2PAK Unit Gate- source voltage ± 30 V ID Drain current (continuous) at TC = 25 °C 4.4 A ID Drain current (continuous) at TC = 100 °C 2.8 A Drain current (pulsed) 17.6 A IDM (1) PTOT Total dissipation at TC = 25 °C 70 25 70 W IAR Avalanche current, repetitive or not-repetitive (pulse width limited by TJ max) 4.4 A EAS Single pulse avalanche energy (starting TJ = 25 °C, ID = IAR, VDD = 50 V) 170 mJ Peak diode recovery voltage slope 20 V/ns 2800 V dv/dt(2) VESD(G-S) G-S ESD (HBM C=100 pF; R=1.5 kΩ) VISO Insulation withstand voltage (RMS) from all three leads to external heat sink (t=1 s;TC=25 °C) TJ Tstg Operating junction temperature Storage temperature 2500 V -55 to 150 °C 1. Pulse width limited by safe operating area. 2. ISD ≤ 4.4 A, di/dt ≤ 400 A/µs, peak VDS ≤V(BR)DSS Table 3. Thermal data Value Symbol Parameter Rthj-case Thermal resistance junction-case max Rthj-amb Thermal resistance junction-ambient max Rthj-pcb Thermal resistance junction-pcb Doc ID 15684 Rev 2 Unit DPAK TO-220FP I2PAK 1.78 5 1.78 °C/W 62.5 100 °C/W 50 °C/W 3/18 Electrical characteristics 2 STD5N52U, STF5N52U, STI5N52U Electrical characteristics (Tcase =25 °C unless otherwise specified) Table 4. Symbol V(BR)DSS On /off states Parameter Test conditions Drain-source breakdown voltage (VGS = 0) ID = 1 mA Min. Typ. Max. Unit 525 V IDSS VDS = 525 V Zero gate voltage drain current (VGS = 0) VDS = 525 V, TC=125 °C 10 500 µA µA IGSS Gate-body leakage current (VDS = 0) 10 µA 3.75 4.5 V 1.28 1.5 Ω Min. Typ. Max. Unit - pF pF pF VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 50 µA RDS(on) Static drain-source on resistance Table 5. Symbol 3 VGS = 10 V, ID = 2.2 A Dynamic Parameter Test conditions Input capacitance Output capacitance Reverse transfer capacitance VDS = 25 V, f = 1 MHz, VGS = 0 - 529 71 13.4 Equivalent capacitance time related VDS = 0 to 420 V, VGS = 0 - 11 - pF Rg Gate input resistance f=1 MHz open drain - 6 - Ω Qg Qgs Qgd Total gate charge Gate-source charge Gate-drain charge VDD = 416 V, ID = 4.4 A, VGS = 10 V (see Figure 17) - 16.9 4.2 8.4 - nC nC nC Ciss Coss Crss Co(tr)(1) 1. Coss eq. time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS Table 6. Switching times Symbol Parameter td(on) tr td(off) tf 4/18 Turn-on delay time Rise time Turn-off-delay time Fall time Test conditions VDD = 260 V, ID = 2.2 A, RG = 4.7 Ω, VGS = 10 V (see Figure 16) Doc ID 15684 Rev 2 Min. Typ. - 11.4 13.6 23.1 15 Max. Unit - ns ns ns ns STD5N52U, STF5N52U, STI5N52U Table 7. Symbol ISD ISDM (1) VSD (2) trr Qrr IRRM trr Qrr IRRM Electrical characteristics Source drain diode Parameter Test conditions Source-drain current Source-drain current (pulsed) Min. Typ. Max. Unit - 4.4 17.6 A A 1.6 V Forward on voltage ISD = 4.4 A, VGS = 0 - Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 4.4 A, di/dt = 100 A/µs VDD= 60 V (see Figure 18) - 55 95 3.5 ns µC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 4.4 A, di/dt = 100 A/µs VDD= 60 V TJ = 150 °C (see Figure 18) - 120 266 4.5 ns µC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Table 8. Symbol BVGSO Gate-source Zener diode Parameter Test conditions Gate-source breakdown voltage Igs=± 1 mA (open drain) Min. Typ. 30 - Max. Unit - V The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Doc ID 15684 Rev 2 5/18 Electrical characteristics STD5N52U, STF5N52U, STI5N52U 2.1 Electrical characteristics (curves) Figure 2. Safe operating area for DPAK and I2PAK Figure 3. Thermal impedance for DPAK and I2PAK Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP Figure 6. Output characteristics Figure 7. Transfer characteristics 6/18 Doc ID 15684 Rev 2 STD5N52U, STF5N52U, STI5N52U Electrical characteristics Figure 8. Normalized BVDSS vs temperature Figure 10. Gate charge vs gate-source voltage Figure 11. Capacitance variations Figure 12. Normalized gate threshold voltage vs temperature Figure 9. Static drain-source on resistance Figure 13. Normalized on resistance vs temperature Doc ID 15684 Rev 2 7/18 Electrical characteristics Figure 14. Source-drain diode forward characteristics 8/18 STD5N52U, STF5N52U, STI5N52U Figure 15. Maximum avalanche energy vs temperature Doc ID 15684 Rev 2 STD5N52U, STF5N52U, STI5N52U 3 Test circuits Test circuits Figure 16. Switching times test circuit for resistive load Figure 17. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 µF 2200 RL µF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 µF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 18. Test circuit for inductive load Figure 19. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100µH S 3.3 µF B 25 Ω 1000 µF D VDD 2200 µF 3.3 µF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 20. Unclamped inductive waveform AM01471v1 Figure 21. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 Doc ID 15684 Rev 2 10% AM01473v1 9/18 Package mechanical data 4 STD5N52U, STF5N52U, STI5N52U Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 10/18 Doc ID 15684 Rev 2 STD5N52U, STF5N52U, STI5N52U Table 9. Package mechanical data DPAK (TO-252) mechanical data mm Dim. Min. Typ. Max. A 2.20 2.40 A1 0.90 1.10 A2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 D 6.00 6.20 D1 E 5.10 6.40 6.60 E1 4.70 e 2.28 e1 4.40 4.60 H 9.35 10.10 L 1 1.50 L1 2.80 L2 0.80 L4 0.60 1 R V2 0.20 0° 8° Doc ID 15684 Rev 2 11/18 Package mechanical data STD5N52U, STF5N52U, STI5N52U Figure 22. DPAK (TO-252) drawing 0068772_H Figure 23. DPAK footprint(a) 6.7 1.8 3 1.6 2.3 6.7 2.3 1.6 a. All dimension are in millimeters 12/18 Doc ID 15684 Rev 2 AM08850v1 STD5N52U, STF5N52U, STI5N52U Table 10. Package mechanical data TO-220FP mechanical data mm Dim. Min. Typ. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 Figure 24. TO-220FP drawing L7 E A B D Dia L5 L6 F1 F2 F G H G1 L4 L2 L3 7012510_Rev_K Doc ID 15684 Rev 2 13/18 Package mechanical data Table 11. STD5N52U, STF5N52U, STI5N52U I²PAK (TO-262) mechanical data mm. DIM. min. typ max. A 4.40 4.60 A1 2.40 2.72 b 0.61 0.88 b1 1.14 1.70 c 0.49 0.70 c2 1.23 1.32 D 8.95 9.35 e 2.40 2.70 e1 4.95 5.15 E 10 10.40 L 13 14 L1 3.50 3.93 L2 1.27 1.40 Figure 25. I²PAK (TO-262) drawing 0004982_Rev_H 14/18 Doc ID 15684 Rev 2 STD5N52U, STF5N52U, STI5N52U 5 Packaging mechanical data Packaging mechanical data Table 12. DPAK (TO-252) tape and reel mechanical data Tape Reel mm mm Dim. Dim. Min. Max. A0 6.8 7 A B0 10.4 10.6 B 1.5 12.1 C 12.8 1.6 D 20.2 G 16.4 50 B1 Min. Max. 330 13.2 D 1.5 D1 1.5 E 1.65 1.85 N F 7.4 7.6 T K0 2.55 2.75 P0 3.9 4.1 Base qty. 2500 P1 7.9 8.1 Bulk qty. 2500 P2 1.9 2.1 R 40 T 0.25 0.35 W 15.7 16.3 Doc ID 15684 Rev 2 18.4 22.4 15/18 Packaging mechanical data STD5N52U, STF5N52U, STI5N52U Figure 26. Tape for DPAK (TO-252) 10 pitches cumulative tolerance on tape +/- 0.2 mm T P0 Top cover tape P2 D E F B1 W K0 B0 For machine ref. only including draft and radii concentric around B0 A0 P1 D1 User direction of feed R Bending radius User direction of feed AM08852v1 Figure 27. Reel for DPAK (TO-252) T REEL DIMENSIONS 40mm min. Access hole At sl ot location B D C N A Full radius Tape slot in core for tape start 25 mm min. width G measured at hub AM08851v2 16/18 Doc ID 15684 Rev 2 STD5N52U, STF5N52U, STI5N52U 6 Revision history Revision history Table 13. Document revision history Date Revision 06-May-2009 1 First release. 2 Inserted new device in I2PAK. Updated tables 1, 2 and 3 with the new package. Updated Section 4: Package mechanical data with the new package and Section 5: Packaging mechanical data. Minor text changes. 28-Sep-2011 Changes Doc ID 15684 Rev 2 17/18 STD5N52U, STF5N52U, STI5N52U Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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