STE140NF20D N-channel 200 V, 10 mΩ typ., 140 A STripFET™ II Power MOSFET (with fast diode) in an ISOTOP package Datasheet − production data Features Type VDSS RDS(on) max ID STE140NF20D 200 V < 0.012 Ω 140 A ■ Exceptional dv/dt capability ■ Low gate charge ■ 100% avalanche tested Applications ISOTOP Switching applications Description This Power MOSFET is produced using STMicroelectronics’ unique STripFETTM process, which is specifically designed to minimize input capacitance and gate charge. The device offers extremely fast switching performance thanks to the intrinsic fast body diode, making the device ideal for hard switching topologies. Table 1. Figure 1. Internal schematic diagram Device summary Order code Marking Package Packaging STE140NF20D 140NF20D ISOTOP Tube October 2012 This is information on a product in full production. Doc ID 15299 Rev 4 1/13 www.st.com 13 Contents STE140NF20D Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 2/13 .............................................. 9 Doc ID 15299 Rev 4 STE140NF20D 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 200 V VGS Gate-source voltage ± 20 V ID Drain current (continuous) at TC = 25 °C 140 A ID Drain current (continuous) at TC=100 °C 88 A IDM(1) Drain current (pulsed) 560 A PTOT Total dissipation at TC = 25 °C 500 W IAR(2) Avalanche current, repetitive or not repetitive 140 A EAS(3) Single pulse avalanche energy 800 mJ dv/dt(4) Peak diode recovery voltage slope 25 V/ns 2500 V - 55 to 150 °C Value Unit 0.25 °C/W 40 °C/W VISO TJ Tstg Insulation winthstand voltage (AC-RMS) Operating junction temperature Storage temperature 1. Pulse width limited by safe operating area 2. Pulse width limited by Tjmax 3. Strating Tj = 25 °C, ID = IAR, VDD = 50 V 4. ISD ≤ 140 A, di/dt ≤ 1000 A/µs, VDD ≤ 80% V(BR)DSS Table 3. Thermal resistance Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Doc ID 15299 Rev 4 3/13 Electrical characteristics 2 STE140NF20D Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. Symbol On/off states Parameter Test conditions Min. Typ. Max. Unit Drain-source breakdown voltage ID = 1 mA, VGS= 0 IDSS Zero gate voltage drain current (VGS = 0) VDS = 200 V, VDS = 200 V, TC = 125 °C 10 100 µA µA IGSS Gate body leakage current (VDS = 0) VGS = ±20 V ±100 nA VGS(th) Gate threshold voltage VDS= VGS, ID = 250 µA 3 4 V RDS(on) Static drain-source on resistance VGS= 10 V, ID= 70 A 10 12 mΩ Min. Typ. Max. Unit - 11100 2190 334 - pF pF pF - 1525 - pF - 1139 - pF V(BR)DSS Table 5. Symbol Ciss Coss Crss Co(tr) (1) Co(er) (2) 200 2 V Dynamic Parameter Test conditions Input capacitance Output capacitance Reverse transfer capacitance VDS = 25 V, f=1 MHz, VGS=0 Equivalent capacitance time related Equivalent capacitance energy related VDS = 0 to 160 V, VGS = 0, Rg Intrinsic gate resistance f = 1 MHz open drain - 1.4 - Ω Qg Total gate charge Gate-source charge Gate-drain charge VDD = 160 V, ID = 140 A, VGS= 10 V (see Figure 16) - 338 47 183 - nC nC nC Qgs Qgd 1. Time related is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS 2. Energy related is defined as a constant equivalent capacitance giving the same stored energy as Coss when VDS increases from 0 to 80% VDSS 4/13 Doc ID 15299 Rev 4 STE140NF20D Electrical characteristics Table 6. Switching times Symbol Parameter td(on) tr td(off) tf Table 7. Symbol VDD = 100 V, ID= 70 A, RG=4.7 Ω, VGS =10 V (see Figure 15) Min. Typ. Max. Unit - 232 218 283 250 - ns ns ns ns Min. Typ. Max. Unit Source drain diode Parameter Test conditions Source-drain current - 140 A (1) Source-drain current (pulsed) - 560 A (2) Forward on voltage ISD = 140 A, VGS=0 - 1.5 V Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 140 A, di/dt = 100 A/µs, VDD= 60 V - 190 1.4 14 ns nC A Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 140 A, di/dt = 100 A/µs, VDD= 60 V, Tj=150 °C - 257 2.4 18 ns µC A ISD ISDM VSD Turn-on delay time Rise time Turn-off delay time Fall time Test conditions trr Qrr IRRM trr Qrr IRRM 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Doc ID 15299 Rev 4 5/13 Electrical characteristics STE140NF20D 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 5. Transfer characteristics !-V )$ ! 4J # 4C # 3INGLEPULSE $ 3 ON / ,I PER M AT ITE IO D NI BY N M THI AX SA 2 RE A IS S S MS MS Figure 4. 6$36 Output characteristics !-V )$ ! 6'36 !-V )$ ! 6$36 6 6 6 Figure 6. 6$36 Gate charge vs gate-source voltage Figure 7. !-V 6$3 6'3 6 6$3 6 6$$6 )$! 6'36 Static drain-source on-resistance !-V 2$3ON /HM 6'36 6/13 1GN# Doc ID 15299 Rev 4 )$! STE140NF20D Figure 8. Electrical characteristics Capacitance variations Figure 9. !-V # P& Output capacitance stored energy !-V %OSS * #ISS #OSS #RSS 6$36 Figure 10. Normalized gate threshold voltage vs temperature !-V 6'3TH NORM 6$36 Figure 11. Normalized on resistance vs temperature !-V 2$3ON NORM 6'36 )$! )$! 4* # Figure 12. Source-drain diode forward characteristics 4* # Figure 13. Normalized BVDSS vs temperature !-V 63$ 6 4* # !-V "6$33 NORM )$M! 4* # 4* # )3$! Doc ID 15299 Rev 4 4* # 7/13 Electrical characteristics STE140NF20D Figure 14. Maximum avalanche energy vs starting Tj !-V %!3 M* )$! 6$$6 8/13 4* # Doc ID 15299 Rev 4 STE140NF20D 3 Test circuits Test circuits Figure 15. Switching times test circuit for resistive load Figure 16. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF VGS IG=CONST VDD 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 AM01469v1 Figure 17. Test circuit for inductive load Figure 18. Unclamped inductive load test switching and diode recovery times circuit A A D.U.T. FAST DIODE B B L A D G VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 Figure 19. Unclamped inductive waveform AM01471v1 Figure 20. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 0 Doc ID 15299 Rev 4 10% AM01473v1 9/13 Package mechanical data 4 STE140NF20D Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Table 8. ISOTOP mechanical data mm Dim. Min. 10/13 Typ. Max. A 11.76 12.19 A1 8.92 9.58 B 7.80 8.18 C 0.76 0.84 C2 1.98 2.13 D 38 38.20 D1 31.50 31.70 E 25.20 25.45 E2 24.59 25.07 G 14.91 15.09 G1 12.57 12.83 F 4.09 4.19 F1 4.67 4.93 φP 4.09 4.27 P1 4.06 4.32 Q 26.54 26.90 R 3.94 4.42 S 30.12 30.30 T 3.30 3.61 U 6.88 7.09 Doc ID 15299 Rev 4 STE140NF20D Figure 21. Package mechanical data ISOTOP drawing 0041565_Rev_I Doc ID 15299 Rev 4 11/13 Revision history 5 STE140NF20D Revision history Table 9. Document revision history Date Revision 27-Jan-2009 1 First release 18-Jan-2010 2 Document status promoted from preliminary data to datasheet. 01-Jul-2010 3 Inserted VISO parameter in Table 2: Absolute maximum ratings 4 Updated: Figure 1, 5, 6, 10, 11, 13. Updated: ISD value in note 4 (below Table 2: Absolute maximum ratings). Updated: IDSS and IGSS values (test conditions) in Table 4: On/off states. Updated: Section 4: Package mechanical data. Minor text changes. 17-Oct-2012 12/13 Changes Doc ID 15299 Rev 4 STE140NF20D Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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