ONSEMI 2N6427

ON Semiconductor
2N6426*
2N6427
Darlington Transistors
NPN Silicon
*ON Semiconductor Preferred Device
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Collector–Emitter Voltage
VCEO
40
Vdc
Collector–Base Voltage
VCBO
40
Vdc
Emitter–Base Voltage
VEBO
12
Vdc
Collector Current — Continuous
IC
500
mAdc
Total Device Dissipation @ TA = 25°C
Derate above 25°C
PD
625
5.0
mW
mW/°C
Total Device Dissipation @ TC = 25°C
Derate above 25°C
PD
1.5
12
Watts
mW/°C
TJ, Tstg
–55 to +150
°C
Symbol
Max
Unit
Thermal Resistance, Junction to Ambient
RJA
200
°C/W
Thermal Resistance, Junction to Case
RJC
83.3
°C/W
Operating and Storage Junction
Temperature Range
1
2
3
CASE 29–04, STYLE 1
TO–92 (TO–226AA)
THERMAL CHARACTERISTICS
Characteristic
COLLECTOR 3
BASE
2
EMITTER 1
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Collector–Emitter Breakdown Voltage (1)
(IC = 10 mAdc, VBE = 0)
V(BR)CEO
40
—
—
Vdc
Collector–Base Breakdown Voltage
(IC = 100 Adc, IE = 0)
V(BR)CBO
40
—
—
Vdc
Emitter–Base Breakdown Voltage
(IE = 10 Adc, IC = 0)
V(BR)EBO
12
—
—
Vdc
Collector Cutoff Current
(VCE = 25 Vdc, IB = 0)
ICES
—
—
1.0
Adc
Collector Cutoff Current
(VCB= 30 Vdc, IE = 0)
ICBO
—
—
50
nAdc
Emitter Cutoff Current
(VEB= 10 Vdc, IC = 0)
IEBO
—
—
50
nAdc
Characteristic
OFF CHARACTERISTICS
1. Pulse Test: Pulse Width 300 s; Duty Cycle 2.0%.
 Semiconductor Components Industries, LLC, 2001
February, 2001 – Rev.1
1
Publication Order Number:
2N6426/D
2N6426 2N6427
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) (Continued)
Symbol
Min
Typ
Max
2N6426
2N6427
20,000
10,000
—
—
200,000
100,000
(IC = 100 mAdc, VCE = 5.0 Vdc)
2N6426
2N6427
30,000
20,000
—
—
300,000
200,000
(IC = 500 mAdc, VCE = 5.0 Vdc)
2N6426
2N6427
20,000
14,000
—
—
200,000
140,000
—
—
0.71
0.9
1.2
1.5
Characteristic
Unit
ON CHARACTERISTICS
DC Current Gain(1)
(IC = 10 mAdc, VCE = 5.0 Vdc)
hFE
—
Collector–Emitter Saturation Voltage
(IC = 50 mAdc, IB = 0.5 mAdc)
(IC = 500 mAdc, IB = 0.5 mAdc
VCE(sat)
Vdc
Base–Emitter Saturation Voltage
(IC = 500 mAdc, IB = 0.5 mAdc)
VBE(sat)
—
1.52
2.0
Vdc
Base–Emitter On Voltage
(IC = 50 mAdc, VCE = 5.0 Vdc)
VBE(on)
—
1.24
1.75
Vdc
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 1.0 MHz)
Cobo
—
5.4
7.0
pF
Input Capacitance
(VEB = 1.0 Vdc, IC = 0, f = 1.0 MHz)
Cibo
—
10
15
pF
100
50
—
—
2000
1000
20,000
10,000
—
—
—
—
1.5
1.3
2.4
2.4
—
—
SMALL–SIGNAL CHARACTERISTICS
Input Impedance
(IC = 10 mAdc, VCE = 5.0 Vdc, f = 1.0 kHz)
hie
2N6426
2N6427
Small–Signal Current Gain
(IC = 10 mAdc, VCE = 5.0 Vdc, f = 1.0 kHz)
kΩ
hfe
2N6426
2N6427
Current–Gain — High Frequency
(IC = 10 mAdc, VCE = 5.0 Vdc, f = 100 MHz)
—
|hfe|
2N6426
2N6427
—
Output Admittance
(IC = 10 mAdc, VCE = 5.0 Vdc, f = 1.0 kHz)
hoe
—
—
1000
mhos
Noise Figure
(IC = 1.0 mAdc, VCE = 5.0 Vdc, RS = 100 kΩ, f = 1.0 kHz)
NF
—
3.0
10
dB
1. Pulse Test: Pulse Width 300 s; Duty Cycle 2.0%.
RS
in
en
IDEAL
TRANSISTOR
Figure 1. Transistor Noise Model
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2
2N6426 2N6427
NOISE CHARACTERISTICS
(VCE = 5.0 Vdc, TA = 25°C)
2.0
BANDWIDTH = 1.0 Hz
RS ≈ 0
200
i n, NOISE CURRENT (pA)
en, NOISE VOLTAGE (nV)
500
100
10 µA
50
100 µA
20
IC = 1.0 mA
10
5.0
BANDWIDTH = 1.0 Hz
1.0
0.7
0.5
IC = 1.0 mA
0.3
0.2
100 µA
0.1
0.07
0.05
10 µA
0.03
10 20
50 100 200
500 1k 2k 5k 10k 20k
f, FREQUENCY (Hz)
50k 100k
0.02
10 20
50 100 200
14
200
IC = 10 µA
70
50
100 µA
30
20
10
1.0 mA
1.0
2.0
BANDWIDTH = 10 Hz TO 15.7 kHz
12
BANDWIDTH = 10 Hz TO 15.7 kHz
100
50k 100k
Figure 3. Noise Current
NF, NOISE FIGURE (dB)
VT, TOTAL WIDEBAND NOISE VOLTAGE (nV)
Figure 2. Noise Voltage
500 1k 2k 5k 10k 20k
f, FREQUENCY (Hz)
10
10 µA
8.0
100 µA
6.0
4.0
IC = 1.0 mA
2.0
5.0
10
20
50 100 200
RS, SOURCE RESISTANCE (kΩ)
500
1000
0
1.0
Figure 4. Total Wideband Noise Voltage
2.0
5.0
10
20
50 100 200
RS, SOURCE RESISTANCE (kΩ)
Figure 5. Wideband Noise Figure
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3
500
1000
2N6426 2N6427
SMALL–SIGNALCHARACTERISTICS
4.0
|h fe |, SMALL-SIGNAL CURRENT GAIN
C, CAPACITANCE (pF)
20
TJ = 25°C
10
7.0
Cibo
Cobo
5.0
3.0
2.0
0.04
0.1
0.2
0.4
1.0 2.0 4.0
10
VR, REVERSE VOLTAGE (VOLTS)
20
2.0
1.0
0.8
0.6
0.4
0.2
0.5
40
hFE, DC CURRENT GAIN
TJ = 125°C
100k
70k
50k
25°C
30k
20k
10k
7.0k
5.0k
-55°C
3.0k
2.0k
5.0 7.0
10
VCE = 5.0 V
20 30
50 70 100
200 300
IC, COLLECTOR CURRENT (mA)
500
RθV, TEMPERATURE COEFFICIENTS (mV/°C)
TJ = 25°C
V, VOLTAGE (VOLTS)
1.4
VBE(sat) @ IC/IB = 1000
1.2
VBE(on) @ VCE = 5.0 V
1.0
VCE(sat) @ IC/IB = 1000
5.0 7.0
10
0.5 10 20
50
100 200
IC, COLLECTOR CURRENT (mA)
500
TJ = 25°C
2.5
IC = 10 mA
50 mA
250 mA
500 mA
2.0
1.5
1.0
0.5
0.1 0.2
0.5 1.0 2.0 5.0 10 20 50 100 200
IB, BASE CURRENT (µA)
500 1000
Figure 9. Collector Saturation Region
1.6
0.6
2.0
3.0
Figure 8. DC Current Gain
0.8
1.0
Figure 7. High Frequency Current Gain
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 6. Capacitance
200k
VCE = 5.0 V
f = 100 MHz
TJ = 25°C
20 30
50 70 100 200 300
IC, COLLECTOR CURRENT (mA)
500
-1.0
-2.0
*APPLIES FOR IC/IB ≤ hFE/3.0
25°C TO 125°C
*RVC FOR VCE(sat)
-55°C TO 25°C
-3.0
25°C TO 125°C
-4.0
VB FOR VBE
-5.0
-55°C TO 25°C
-6.0
5.0 7.0 10
Figure 10. “On” Voltages
20 30
50 70 100
200 300
IC, COLLECTOR CURRENT (mA)
Figure 11. Temperature Coefficients
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4
500
1.0
0.7
0.5
D = 0.5
0.2
0.3
0.2
0.1
SINGLE PULSE
0.05
0.1
0.07
0.05
SINGLE PULSE
0.03
ZθJC(t) = r(t) • RθJCTJ(pk) - TC = P(pk) ZθJC(t)
ZθJA(t) = r(t) • RθJATJ(pk) - TA = P(pk) ZθJA(t)
0.02
0.01
0.1
0.2
0.5
1.0
2.0
5.0
10
20
50
t, TIME (ms)
100
200
500
1.0k
2.0k
5.0k
10k
Figure 12. Thermal Response
1.0k
700
500
IC, COLLECTOR CURRENT (mA)
RESISTANCE (NORMALIZED)
2N6426 2N6427
300
200
FIGURE A
1.0 ms
TA = 25°C
TC = 25°C
tP
100 µs
PP
1.0 s
100
70
50
PP
t1
30
20
10
0.4 0.6
CURRENT LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
1/f
1.0
2.0
4.0 6.0
10
20
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
t
DUTYCYCLE t1f 1
tP
PEAK PULSE POWER = PP
40
Figure 13. Active Region Safe Operating Area
Design Note: Use of Transient Thermal Resistance Data
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5
2N6426 2N6427
PACKAGE DIMENSIONS
CASE 029–04
(TO–226AA)
ISSUE AD
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. DIMENSION F APPLIES BETWEEN P AND L.
DIMENSION D AND J APPLY BETWEEN L AND K
MINIMUM. LEAD DIMENSION IS UNCONTROLLED
IN P AND BEYOND DIMENSION K MINIMUM.
B
R
P
L
F
SEATING
PLANE
K
DIM
A
B
C
D
F
G
H
J
K
L
N
P
R
V
D
J
X X
G
H
V
C
1
SECTION X–X
N
N
INCHES
MIN
MAX
0.175
0.205
0.170
0.210
0.125
0.165
0.016
0.022
0.016
0.019
0.045
0.055
0.095
0.105
0.015
0.020
0.500
--0.250
--0.080
0.105
--0.100
0.115
--0.135
---
STYLE 1:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
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6
MILLIMETERS
MIN
MAX
4.45
5.20
4.32
5.33
3.18
4.19
0.41
0.55
0.41
0.48
1.15
1.39
2.42
2.66
0.39
0.50
12.70
--6.35
--2.04
2.66
--2.54
2.93
--3.43
---
2N6426 2N6427
Notes
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7
2N6426 2N6427
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
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2N6426/D